Blar i Institutt for elektroniske systemer på tidsskrift "IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC)"
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Tunnel FET Analog Benchmarking and Circuit Design
(Journal article; Peer reviewed, 2018)A platform for benchmarking tunnel field-effect transistors (TFETs) for analog applications is presented and used to compare selected TFETs to FinFET technology at the 14-nm node. This benchmarking is enabled by the ...