Buoyancy Firmware  1.0
Buoyancy Vehicle Firmware Documentation
core configuration file

Core configuration file. More...

Macros

#define BSP_BTN_BLE_ENABLED   1
 
#define BLE_ADVERTISING_ENABLED   1
 
#define BLE_DTM_ENABLED   0
 
#define BLE_RACP_ENABLED   0
 
#define NRF_BLE_CONN_PARAMS_ENABLED   1
 
#define NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION   499
 
#define NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION   65535
 
#define NRF_BLE_GATT_ENABLED   1
 
#define NRF_BLE_QWR_ENABLED   1
 
#define NRF_BLE_QWR_MAX_ATTR   6
 
#define PEER_MANAGER_ENABLED   1
 
#define PM_MAX_REGISTRANTS   3
 
#define PM_FLASH_BUFFERS   4
 
#define PM_CENTRAL_ENABLED   0
 
#define PM_SERVICE_CHANGED_ENABLED   1
 
#define PM_PEER_RANKS_ENABLED   1
 
#define PM_LESC_ENABLED   0
 
#define PM_RA_PROTECTION_ENABLED   0
 
#define PM_RA_PROTECTION_TRACKED_PEERS_NUM   8
 
#define PM_RA_PROTECTION_MIN_WAIT_INTERVAL   4000
 
#define PM_RA_PROTECTION_MAX_WAIT_INTERVAL   64000
 
#define PM_RA_PROTECTION_REWARD_PERIOD   10000
 
#define PM_HANDLER_SEC_DELAY_MS   0
 
#define BLE_ANCS_C_ENABLED   0
 
#define BLE_ANS_C_ENABLED   0
 
#define BLE_BAS_C_ENABLED   0
 
#define BLE_BAS_ENABLED   0
 
#define BLE_BAS_CONFIG_LOG_ENABLED   0
 
#define BLE_BAS_CONFIG_LOG_LEVEL   3
 
#define BLE_BAS_CONFIG_INFO_COLOR   0
 
#define BLE_BAS_CONFIG_DEBUG_COLOR   0
 
#define BLE_CSCS_ENABLED   0
 
#define BLE_CTS_C_ENABLED   0
 
#define BLE_DIS_ENABLED   0
 
#define BLE_GLS_ENABLED   0
 
#define BLE_HIDS_ENABLED   0
 
#define BLE_HRS_C_ENABLED   0
 
#define BLE_HRS_ENABLED   0
 
#define BLE_HTS_ENABLED   0
 
#define BLE_IAS_C_ENABLED   0
 
#define BLE_IAS_ENABLED   0
 
#define BLE_IAS_CONFIG_LOG_ENABLED   0
 
#define BLE_IAS_CONFIG_LOG_LEVEL   3
 
#define BLE_IAS_CONFIG_INFO_COLOR   0
 
#define BLE_IAS_CONFIG_DEBUG_COLOR   0
 
#define BLE_LBS_C_ENABLED   0
 
#define BLE_LBS_ENABLED   0
 
#define BLE_LLS_ENABLED   0
 
#define BLE_NUS_C_ENABLED   0
 
#define BLE_NUS_ENABLED   1
 
#define BLE_NUS_CONFIG_LOG_ENABLED   1
 
#define BLE_NUS_CONFIG_LOG_LEVEL   4
 
#define BLE_NUS_CONFIG_INFO_COLOR   0
 
#define BLE_NUS_CONFIG_DEBUG_COLOR   3
 
#define BLE_RSCS_C_ENABLED   0
 
#define BLE_RSCS_ENABLED   0
 
#define BLE_TPS_ENABLED   0
 
#define NRF_MPU_LIB_ENABLED   0
 
#define NRF_MPU_LIB_CLI_CMDS   0
 
#define NRF_STACK_GUARD_ENABLED   0
 
#define NRF_STACK_GUARD_CONFIG_SIZE   7
 
#define NRF_CRYPTO_ENABLED   1
 
#define NRF_CRYPTO_ALLOCATOR   0
 
#define NRF_CRYPTO_BACKEND_CC310_BL_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE   4096
 
#define NRF_CRYPTO_BACKEND_CC310_BL_INTERRUPTS_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CC310_INTERRUPTS_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_CIFRA_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_NRF_SW_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_OBERON_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED   1
 
#define NRF_CRYPTO_BACKEND_OPTIGA_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_OPTIGA_RNG_ENABLED   0
 
#define NRF_CRYPTO_BACKEND_OPTIGA_ECC_SECP256R1_ENABLED   1
 
#define NRF_CRYPTO_CURVE25519_BIG_ENDIAN_ENABLED   0
 
#define BLE_DFU_ENABLED   0
 
#define NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS   0
 
#define COMP_ENABLED   0
 
#define COMP_CONFIG_REF   1
 
#define COMP_CONFIG_MAIN_MODE   0
 
#define COMP_CONFIG_SPEED_MODE   2
 
#define COMP_CONFIG_HYST   0
 
#define COMP_CONFIG_ISOURCE   0
 
#define COMP_CONFIG_INPUT   0
 
#define COMP_CONFIG_IRQ_PRIORITY   6
 
#define EGU_ENABLED   0
 
#define GPIOTE_ENABLED   1
 
#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS   4
 
#define GPIOTE_CONFIG_IRQ_PRIORITY   7
 
#define I2S_ENABLED   0
 
#define I2S_CONFIG_SCK_PIN   31
 
#define I2S_CONFIG_LRCK_PIN   30
 
#define I2S_CONFIG_MCK_PIN   255
 
#define I2S_CONFIG_SDOUT_PIN   29
 
#define I2S_CONFIG_SDIN_PIN   28
 
#define I2S_CONFIG_MASTER   0
 
#define I2S_CONFIG_FORMAT   0
 
#define I2S_CONFIG_ALIGN   0
 
#define I2S_CONFIG_SWIDTH   1
 
#define I2S_CONFIG_CHANNELS   1
 
#define I2S_CONFIG_MCK_SETUP   536870912
 
#define I2S_CONFIG_RATIO   2000
 
#define I2S_CONFIG_IRQ_PRIORITY   6
 
#define I2S_CONFIG_LOG_ENABLED   0
 
#define I2S_CONFIG_LOG_LEVEL   3
 
#define I2S_CONFIG_INFO_COLOR   0
 
#define I2S_CONFIG_DEBUG_COLOR   0
 
#define LPCOMP_ENABLED   0
 
#define LPCOMP_CONFIG_REFERENCE   3
 
#define LPCOMP_CONFIG_DETECTION   2
 
#define LPCOMP_CONFIG_INPUT   0
 
#define LPCOMP_CONFIG_HYST   0
 
#define LPCOMP_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_CLOCK_ENABLED   1
 
#define NRFX_CLOCK_CONFIG_LF_SRC   0
 
#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_CLOCK_CONFIG_LOG_ENABLED   0
 
#define NRFX_CLOCK_CONFIG_LOG_LEVEL   3
 
#define NRFX_CLOCK_CONFIG_INFO_COLOR   0
 
#define NRFX_CLOCK_CONFIG_DEBUG_COLOR   0
 
#define NRFX_COMP_ENABLED   0
 
#define NRFX_COMP_CONFIG_REF   1
 
#define NRFX_COMP_CONFIG_MAIN_MODE   0
 
#define NRFX_COMP_CONFIG_SPEED_MODE   2
 
#define NRFX_COMP_CONFIG_HYST   0
 
#define NRFX_COMP_CONFIG_ISOURCE   0
 
#define NRFX_COMP_CONFIG_INPUT   0
 
#define NRFX_COMP_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_COMP_CONFIG_LOG_ENABLED   0
 
#define NRFX_COMP_CONFIG_LOG_LEVEL   3
 
#define NRFX_COMP_CONFIG_INFO_COLOR   0
 
#define NRFX_COMP_CONFIG_DEBUG_COLOR   0
 
#define NRFX_GPIOTE_ENABLED   1
 
#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS   1
 
#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY   7
 
#define NRFX_GPIOTE_CONFIG_LOG_ENABLED   0
 
#define NRFX_GPIOTE_CONFIG_LOG_LEVEL   3
 
#define NRFX_GPIOTE_CONFIG_INFO_COLOR   0
 
#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR   0
 
#define NRFX_I2S_ENABLED   0
 
#define NRFX_I2S_CONFIG_SCK_PIN   31
 
#define NRFX_I2S_CONFIG_LRCK_PIN   30
 
#define NRFX_I2S_CONFIG_MCK_PIN   255
 
#define NRFX_I2S_CONFIG_SDOUT_PIN   29
 
#define NRFX_I2S_CONFIG_SDIN_PIN   28
 
#define NRFX_I2S_CONFIG_MASTER   0
 
#define NRFX_I2S_CONFIG_FORMAT   0
 
#define NRFX_I2S_CONFIG_ALIGN   0
 
#define NRFX_I2S_CONFIG_SWIDTH   1
 
#define NRFX_I2S_CONFIG_CHANNELS   1
 
#define NRFX_I2S_CONFIG_MCK_SETUP   536870912
 
#define NRFX_I2S_CONFIG_RATIO   2000
 
#define NRFX_I2S_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_I2S_CONFIG_LOG_ENABLED   0
 
#define NRFX_I2S_CONFIG_LOG_LEVEL   3
 
#define NRFX_I2S_CONFIG_INFO_COLOR   0
 
#define NRFX_I2S_CONFIG_DEBUG_COLOR   0
 
#define NRFX_LPCOMP_ENABLED   0
 
#define NRFX_LPCOMP_CONFIG_REFERENCE   3
 
#define NRFX_LPCOMP_CONFIG_DETECTION   2
 
#define NRFX_LPCOMP_CONFIG_INPUT   0
 
#define NRFX_LPCOMP_CONFIG_HYST   0
 
#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_LPCOMP_CONFIG_LOG_ENABLED   0
 
#define NRFX_LPCOMP_CONFIG_LOG_LEVEL   3
 
#define NRFX_LPCOMP_CONFIG_INFO_COLOR   0
 
#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR   0
 
#define NRFX_NFCT_ENABLED   0
 
#define NRFX_NFCT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_NFCT_CONFIG_LOG_ENABLED   0
 
#define NRFX_NFCT_CONFIG_LOG_LEVEL   3
 
#define NRFX_NFCT_CONFIG_INFO_COLOR   0
 
#define NRFX_NFCT_CONFIG_DEBUG_COLOR   0
 
#define NRFX_PDM_ENABLED   0
 
#define NRFX_PDM_CONFIG_MODE   1
 
#define NRFX_PDM_CONFIG_EDGE   0
 
#define NRFX_PDM_CONFIG_CLOCK_FREQ   138412032
 
#define NRFX_PDM_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_PDM_CONFIG_LOG_ENABLED   0
 
#define NRFX_PDM_CONFIG_LOG_LEVEL   3
 
#define NRFX_PDM_CONFIG_INFO_COLOR   0
 
#define NRFX_PDM_CONFIG_DEBUG_COLOR   0
 
#define NRFX_POWER_ENABLED   0
 
#define NRFX_POWER_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN   0
 
#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV   0
 
#define NRFX_PPI_ENABLED   0
 
#define NRFX_PPI_CONFIG_LOG_ENABLED   0
 
#define NRFX_PPI_CONFIG_LOG_LEVEL   3
 
#define NRFX_PPI_CONFIG_INFO_COLOR   0
 
#define NRFX_PPI_CONFIG_DEBUG_COLOR   0
 
#define NRFX_PRS_ENABLED   1
 
#define NRFX_PRS_BOX_0_ENABLED   0
 
#define NRFX_PRS_BOX_1_ENABLED   0
 
#define NRFX_PRS_BOX_2_ENABLED   0
 
#define NRFX_PRS_BOX_3_ENABLED   0
 
#define NRFX_PRS_BOX_4_ENABLED   1
 
#define NRFX_PRS_CONFIG_LOG_ENABLED   0
 
#define NRFX_PRS_CONFIG_LOG_LEVEL   3
 
#define NRFX_PRS_CONFIG_INFO_COLOR   0
 
#define NRFX_PRS_CONFIG_DEBUG_COLOR   0
 
#define NRFX_PWM_ENABLED   1
 
#define NRFX_PWM0_ENABLED   0
 
#define NRFX_PWM1_ENABLED   0
 
#define NRFX_PWM2_ENABLED   0
 
#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN   31
 
#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN   31
 
#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN   31
 
#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN   31
 
#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK   4
 
#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE   0
 
#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE   1000
 
#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE   0
 
#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE   0
 
#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_PWM_CONFIG_LOG_ENABLED   0
 
#define NRFX_PWM_CONFIG_LOG_LEVEL   3
 
#define NRFX_PWM_CONFIG_INFO_COLOR   0
 
#define NRFX_PWM_CONFIG_DEBUG_COLOR   0
 
#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0
 
#define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE   5
 
#define NRFX_QDEC_ENABLED   0
 
#define NRFX_QDEC_CONFIG_REPORTPER   0
 
#define NRFX_QDEC_CONFIG_SAMPLEPER   7
 
#define NRFX_QDEC_CONFIG_PIO_A   31
 
#define NRFX_QDEC_CONFIG_PIO_B   31
 
#define NRFX_QDEC_CONFIG_PIO_LED   31
 
#define NRFX_QDEC_CONFIG_LEDPRE   511
 
#define NRFX_QDEC_CONFIG_LEDPOL   1
 
#define NRFX_QDEC_CONFIG_DBFEN   0
 
#define NRFX_QDEC_CONFIG_SAMPLE_INTEN   0
 
#define NRFX_QDEC_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_QDEC_CONFIG_LOG_ENABLED   0
 
#define NRFX_QDEC_CONFIG_LOG_LEVEL   3
 
#define NRFX_QDEC_CONFIG_INFO_COLOR   0
 
#define NRFX_QDEC_CONFIG_DEBUG_COLOR   0
 
#define NRFX_RNG_ENABLED   0
 
#define NRFX_RNG_CONFIG_ERROR_CORRECTION   1
 
#define NRFX_RNG_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_RNG_CONFIG_LOG_ENABLED   0
 
#define NRFX_RNG_CONFIG_LOG_LEVEL   3
 
#define NRFX_RNG_CONFIG_INFO_COLOR   0
 
#define NRFX_RNG_CONFIG_DEBUG_COLOR   0
 
#define NRFX_RTC_ENABLED   0
 
#define NRFX_RTC0_ENABLED   0
 
#define NRFX_RTC1_ENABLED   0
 
#define NRFX_RTC2_ENABLED   0
 
#define NRFX_RTC_MAXIMUM_LATENCY_US   2000
 
#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY   32768
 
#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE   0
 
#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_RTC_CONFIG_LOG_ENABLED   0
 
#define NRFX_RTC_CONFIG_LOG_LEVEL   3
 
#define NRFX_RTC_CONFIG_INFO_COLOR   0
 
#define NRFX_RTC_CONFIG_DEBUG_COLOR   0
 
#define NRFX_SAADC_ENABLED   1
 
#define NRFX_SAADC_CONFIG_RESOLUTION   3
 
#define NRFX_SAADC_CONFIG_OVERSAMPLE   6
 
#define NRFX_SAADC_CONFIG_LP_MODE   0
 
#define NRFX_SAADC_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_SAADC_CONFIG_LOG_ENABLED   1
 
#define NRFX_SAADC_CONFIG_LOG_LEVEL   1
 
#define NRFX_SAADC_CONFIG_INFO_COLOR   0
 
#define NRFX_SAADC_CONFIG_DEBUG_COLOR   3
 
#define NRFX_SPIM_ENABLED   1
 
#define NRFX_SPIM0_ENABLED   1
 
#define NRFX_SPIM1_ENABLED   1
 
#define NRFX_SPIM2_ENABLED   0
 
#define NRFX_SPIM_MISO_PULL_CFG   3
 
#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_SPIM_CONFIG_LOG_ENABLED   0
 
#define NRFX_SPIM_CONFIG_LOG_LEVEL   3
 
#define NRFX_SPIM_CONFIG_INFO_COLOR   0
 
#define NRFX_SPIM_CONFIG_DEBUG_COLOR   0
 
#define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0
 
#define NRFX_SPIS_ENABLED   0
 
#define NRFX_SPIS0_ENABLED   0
 
#define NRFX_SPIS1_ENABLED   0
 
#define NRFX_SPIS2_ENABLED   0
 
#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_SPIS_DEFAULT_DEF   255
 
#define NRFX_SPIS_DEFAULT_ORC   255
 
#define NRFX_SPIS_CONFIG_LOG_ENABLED   0
 
#define NRFX_SPIS_CONFIG_LOG_LEVEL   3
 
#define NRFX_SPIS_CONFIG_INFO_COLOR   0
 
#define NRFX_SPIS_CONFIG_DEBUG_COLOR   0
 
#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0
 
#define NRFX_SPI_ENABLED   0
 
#define NRFX_SPI0_ENABLED   0
 
#define NRFX_SPI1_ENABLED   0
 
#define NRFX_SPI2_ENABLED   0
 
#define NRFX_SPI_MISO_PULL_CFG   1
 
#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_SPI_CONFIG_LOG_ENABLED   0
 
#define NRFX_SPI_CONFIG_LOG_LEVEL   3
 
#define NRFX_SPI_CONFIG_INFO_COLOR   0
 
#define NRFX_SPI_CONFIG_DEBUG_COLOR   0
 
#define NRFX_SWI_ENABLED   0
 
#define NRFX_EGU_ENABLED   0
 
#define NRFX_SWI0_DISABLED   0
 
#define NRFX_SWI1_DISABLED   0
 
#define NRFX_SWI2_DISABLED   0
 
#define NRFX_SWI3_DISABLED   0
 
#define NRFX_SWI4_DISABLED   0
 
#define NRFX_SWI5_DISABLED   0
 
#define NRFX_SWI_CONFIG_LOG_ENABLED   0
 
#define NRFX_SWI_CONFIG_LOG_LEVEL   3
 
#define NRFX_SWI_CONFIG_INFO_COLOR   0
 
#define NRFX_SWI_CONFIG_DEBUG_COLOR   0
 
#define NRFX_SYSTICK_ENABLED   1
 
#define NRFX_TIMER_ENABLED   1
 
#define NRFX_TIMER0_ENABLED   1
 
#define NRFX_TIMER1_ENABLED   1
 
#define NRFX_TIMER2_ENABLED   2
 
#define NRFX_TIMER3_ENABLED   0
 
#define NRFX_TIMER4_ENABLED   0
 
#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY   0
 
#define NRFX_TIMER_DEFAULT_CONFIG_MODE   0
 
#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH   0
 
#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_TIMER_CONFIG_LOG_ENABLED   0
 
#define NRFX_TIMER_CONFIG_LOG_LEVEL   4
 
#define NRFX_TIMER_CONFIG_INFO_COLOR   0
 
#define NRFX_TIMER_CONFIG_DEBUG_COLOR   0
 
#define NRFX_TWIM_ENABLED   1
 
#define NRFX_TWIM0_ENABLED   1
 
#define NRFX_TWIM1_ENABLED   0
 
#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY   104857600
 
#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT   0
 
#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_TWIM_CONFIG_LOG_ENABLED   1
 
#define NRFX_TWIM_CONFIG_LOG_LEVEL   4
 
#define NRFX_TWIM_CONFIG_INFO_COLOR   0
 
#define NRFX_TWIM_CONFIG_DEBUG_COLOR   3
 
#define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   1
 
#define NRFX_TWIS_ENABLED   0
 
#define NRFX_TWIS0_ENABLED   0
 
#define NRFX_TWIS1_ENABLED   0
 
#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY   0
 
#define NRFX_TWIS_NO_SYNC_MODE   0
 
#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0   0
 
#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1   0
 
#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL   0
 
#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL   0
 
#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_TWIS_CONFIG_LOG_ENABLED   0
 
#define NRFX_TWIS_CONFIG_LOG_LEVEL   3
 
#define NRFX_TWIS_CONFIG_INFO_COLOR   0
 
#define NRFX_TWIS_CONFIG_DEBUG_COLOR   0
 
#define NRFX_TWI_ENABLED   1
 
#define NRFX_TWI0_ENABLED   1
 
#define NRFX_TWI1_ENABLED   0
 
#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY   26738688
 
#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT   0
 
#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_TWI_CONFIG_LOG_ENABLED   1
 
#define NRFX_TWI_CONFIG_LOG_LEVEL   4
 
#define NRFX_TWI_CONFIG_INFO_COLOR   0
 
#define NRFX_TWI_CONFIG_DEBUG_COLOR   3
 
#define NRFX_UARTE_ENABLED   1
 
#define NRFX_UARTE0_ENABLED   1
 
#define NRFX_UARTE_DEFAULT_CONFIG_HWFC   0
 
#define NRFX_UARTE_DEFAULT_CONFIG_PARITY   0
 
#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE   2576384
 
#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY   7
 
#define NRFX_UARTE_CONFIG_LOG_ENABLED   1
 
#define NRFX_UARTE_CONFIG_LOG_LEVEL   4
 
#define NRFX_UARTE_CONFIG_INFO_COLOR   0
 
#define NRFX_UARTE_CONFIG_DEBUG_COLOR   3
 
#define NRFX_UART_ENABLED   0
 
#define NRFX_UART0_ENABLED   0
 
#define NRFX_UART_DEFAULT_CONFIG_HWFC   0
 
#define NRFX_UART_DEFAULT_CONFIG_PARITY   0
 
#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE   30924800
 
#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY   7
 
#define NRFX_UART_CONFIG_LOG_ENABLED   1
 
#define NRFX_UART_CONFIG_LOG_LEVEL   4
 
#define NRFX_UART_CONFIG_INFO_COLOR   3
 
#define NRFX_UART_CONFIG_DEBUG_COLOR   0
 
#define NRFX_WDT_ENABLED   0
 
#define NRFX_WDT_CONFIG_BEHAVIOUR   1
 
#define NRFX_WDT_CONFIG_RELOAD_VALUE   2000
 
#define NRFX_WDT_CONFIG_NO_IRQ   0
 
#define NRFX_WDT_CONFIG_IRQ_PRIORITY   6
 
#define NRFX_WDT_CONFIG_LOG_ENABLED   0
 
#define NRFX_WDT_CONFIG_LOG_LEVEL   3
 
#define NRFX_WDT_CONFIG_INFO_COLOR   0
 
#define NRFX_WDT_CONFIG_DEBUG_COLOR   0
 
#define NRF_CLOCK_ENABLED   1
 
#define CLOCK_CONFIG_LF_SRC   1
 
#define CLOCK_CONFIG_LF_CAL_ENABLED   0
 
#define CLOCK_CONFIG_IRQ_PRIORITY   6
 
#define PDM_ENABLED   0
 
#define PDM_CONFIG_MODE   1
 
#define PDM_CONFIG_EDGE   0
 
#define PDM_CONFIG_CLOCK_FREQ   138412032
 
#define PDM_CONFIG_IRQ_PRIORITY   6
 
#define POWER_ENABLED   0
 
#define POWER_CONFIG_IRQ_PRIORITY   6
 
#define POWER_CONFIG_DEFAULT_DCDCEN   0
 
#define POWER_CONFIG_DEFAULT_DCDCENHV   0
 
#define PPI_ENABLED   0
 
#define PWM_ENABLED   1
 
#define PWM_DEFAULT_CONFIG_OUT0_PIN   31
 
#define PWM_DEFAULT_CONFIG_OUT1_PIN   31
 
#define PWM_DEFAULT_CONFIG_OUT2_PIN   31
 
#define PWM_DEFAULT_CONFIG_OUT3_PIN   31
 
#define PWM_DEFAULT_CONFIG_BASE_CLOCK   4
 
#define PWM_DEFAULT_CONFIG_COUNT_MODE   0
 
#define PWM_DEFAULT_CONFIG_TOP_VALUE   1000
 
#define PWM_DEFAULT_CONFIG_LOAD_MODE   0
 
#define PWM_DEFAULT_CONFIG_STEP_MODE   0
 
#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define PWM0_ENABLED   1
 
#define PWM1_ENABLED   1
 
#define PWM2_ENABLED   1
 
#define PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0
 
#define PWM_NRF52_ANOMALY_109_EGU_INSTANCE   5
 
#define QDEC_ENABLED   0
 
#define QDEC_CONFIG_REPORTPER   0
 
#define QDEC_CONFIG_SAMPLEPER   7
 
#define QDEC_CONFIG_PIO_A   31
 
#define QDEC_CONFIG_PIO_B   31
 
#define QDEC_CONFIG_PIO_LED   31
 
#define QDEC_CONFIG_LEDPRE   511
 
#define QDEC_CONFIG_LEDPOL   1
 
#define QDEC_CONFIG_DBFEN   0
 
#define QDEC_CONFIG_SAMPLE_INTEN   0
 
#define QDEC_CONFIG_IRQ_PRIORITY   6
 
#define QSPI_ENABLED   0
 
#define QSPI_CONFIG_SCK_DELAY   1
 
#define QSPI_CONFIG_XIP_OFFSET   0
 
#define QSPI_CONFIG_READOC   0
 
#define QSPI_CONFIG_WRITEOC   0
 
#define QSPI_CONFIG_ADDRMODE   0
 
#define QSPI_CONFIG_MODE   0
 
#define QSPI_CONFIG_FREQUENCY   15
 
#define QSPI_PIN_SCK   NRF_QSPI_PIN_NOT_CONNECTED
 
#define QSPI_PIN_CSN   NRF_QSPI_PIN_NOT_CONNECTED
 
#define QSPI_PIN_IO0   NRF_QSPI_PIN_NOT_CONNECTED
 
#define QSPI_PIN_IO1   NRF_QSPI_PIN_NOT_CONNECTED
 
#define QSPI_PIN_IO2   NRF_QSPI_PIN_NOT_CONNECTED
 
#define QSPI_PIN_IO3   NRF_QSPI_PIN_NOT_CONNECTED
 
#define QSPI_CONFIG_IRQ_PRIORITY   6
 
#define RNG_ENABLED   0
 
#define RNG_CONFIG_ERROR_CORRECTION   1
 
#define RNG_CONFIG_POOL_SIZE   64
 
#define RNG_CONFIG_IRQ_PRIORITY   6
 
#define RTC_ENABLED   0
 
#define RTC_DEFAULT_CONFIG_FREQUENCY   32768
 
#define RTC_DEFAULT_CONFIG_RELIABLE   0
 
#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define RTC0_ENABLED   0
 
#define RTC1_ENABLED   0
 
#define RTC2_ENABLED   0
 
#define NRF_MAXIMUM_LATENCY_US   2000
 
#define SAADC_ENABLED   1
 
#define SAADC_CONFIG_RESOLUTION   3
 
#define SAADC_CONFIG_OVERSAMPLE   8
 
#define SAADC_CONFIG_LP_MODE   1
 
#define SAADC_CONFIG_IRQ_PRIORITY   6
 
#define SPIS_ENABLED   0
 
#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define SPIS_DEFAULT_MODE   0
 
#define SPIS_DEFAULT_BIT_ORDER   0
 
#define SPIS_DEFAULT_DEF   255
 
#define SPIS_DEFAULT_ORC   255
 
#define SPIS0_ENABLED   0
 
#define SPIS1_ENABLED   0
 
#define SPIS2_ENABLED   0
 
#define SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0
 
#define SPI_ENABLED   1
 
#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define NRF_SPI_DRV_MISO_PULLUP_CFG   3
 
#define SPI0_ENABLED   0
 
#define SPI0_USE_EASY_DMA   1
 
#define SPI1_ENABLED   1
 
#define SPI1_USE_EASY_DMA   1
 
#define SPI2_ENABLED   0
 
#define SPI2_USE_EASY_DMA   1
 
#define SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0
 
#define TIMER_ENABLED   1
 
#define TIMER_DEFAULT_CONFIG_FREQUENCY   0
 
#define TIMER_DEFAULT_CONFIG_MODE   0
 
#define TIMER_DEFAULT_CONFIG_BIT_WIDTH   0
 
#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define TIMER0_ENABLED   1
 
#define TIMER1_ENABLED   1
 
#define TIMER2_ENABLED   1
 
#define TIMER3_ENABLED   0
 
#define TIMER4_ENABLED   0
 
#define TWIS_ENABLED   0
 
#define TWIS0_ENABLED   0
 
#define TWIS1_ENABLED   0
 
#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY   0
 
#define TWIS_NO_SYNC_MODE   0
 
#define TWIS_DEFAULT_CONFIG_ADDR0   0
 
#define TWIS_DEFAULT_CONFIG_ADDR1   0
 
#define TWIS_DEFAULT_CONFIG_SCL_PULL   0
 
#define TWIS_DEFAULT_CONFIG_SDA_PULL   0
 
#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define TWI_ENABLED   1
 
#define TWI_DEFAULT_CONFIG_FREQUENCY   26738688
 
#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT   0
 
#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT   0
 
#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY   6
 
#define TWI0_ENABLED   1
 
#define TWI0_USE_EASY_DMA   1
 
#define TWI1_ENABLED   0
 
#define TWI1_USE_EASY_DMA   0
 
#define TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   1
 
#define UART_ENABLED   1
 
#define UART_DEFAULT_CONFIG_HWFC   0
 
#define UART_DEFAULT_CONFIG_PARITY   0
 
#define UART_DEFAULT_CONFIG_BAUDRATE   30801920
 
#define UART_DEFAULT_CONFIG_IRQ_PRIORITY   7
 
#define UART_EASY_DMA_SUPPORT   1
 
#define UART_LEGACY_SUPPORT   1
 
#define UART0_ENABLED   1
 
#define UART0_CONFIG_USE_EASY_DMA   1
 
#define USBD_ENABLED   0
 
#define USBD_CONFIG_IRQ_PRIORITY   6
 
#define USBD_CONFIG_DMASCHEDULER_MODE   0
 
#define USBD_CONFIG_DMASCHEDULER_ISO_BOOST   1
 
#define USBD_CONFIG_ISO_IN_ZLP   0
 
#define WDT_ENABLED   0
 
#define WDT_CONFIG_BEHAVIOUR   1
 
#define WDT_CONFIG_RELOAD_VALUE   2000
 
#define WDT_CONFIG_IRQ_PRIORITY   6
 
#define NRF_TWI_SENSOR_ENABLED   0
 
#define APP_FIFO_ENABLED   1
 
#define APP_UART_ENABLED   1
 
#define APP_UART_DRIVER_INSTANCE   0
 
#define APP_GPIOTE_ENABLED   0
 
#define APP_PWM_ENABLED   0
 
#define APP_SCHEDULER_ENABLED   0
 
#define APP_SCHEDULER_WITH_PAUSE   0
 
#define APP_SCHEDULER_WITH_PROFILER   0
 
#define APP_SDCARD_ENABLED   1
 
#define APP_SDCARD_SPI_INSTANCE   1
 
#define APP_SDCARD_FREQ_INIT   33554432
 
#define APP_SDCARD_FREQ_DATA   33554432
 
#define APP_TIMER_ENABLED   1
 
#define APP_TIMER_CONFIG_RTC_FREQUENCY   0
 
#define APP_TIMER_CONFIG_IRQ_PRIORITY   6
 
#define APP_TIMER_CONFIG_OP_QUEUE_SIZE   10
 
#define APP_TIMER_CONFIG_USE_SCHEDULER   0
 
#define APP_TIMER_KEEPS_RTC_ACTIVE   0
 
#define APP_TIMER_SAFE_WINDOW_MS   300000
 
#define APP_TIMER_WITH_PROFILER   0
 
#define APP_TIMER_CONFIG_SWI_NUMBER   0
 
#define APP_USBD_AUDIO_ENABLED   0
 
#define APP_USBD_ENABLED   0
 
#define APP_USBD_VID   0
 
#define APP_USBD_PID   0
 
#define APP_USBD_DEVICE_VER_MAJOR   1
 
#define APP_USBD_DEVICE_VER_MINOR   0
 
#define APP_USBD_DEVICE_VER_SUB   0
 
#define APP_USBD_CONFIG_SELF_POWERED   1
 
#define APP_USBD_CONFIG_MAX_POWER   100
 
#define APP_USBD_CONFIG_POWER_EVENTS_PROCESS   1
 
#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE   1
 
#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE   32
 
#define APP_USBD_CONFIG_SOF_HANDLING_MODE   2
 
#define APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE   0
 
#define APP_USBD_CONFIG_DESC_STRING_SIZE   31
 
#define APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED   1
 
#define APP_USBD_STRINGS_LANGIDS   APP_USBD_LANG_AND_SUBLANG(APP_USBD_LANG_ENGLISH, APP_USBD_SUBLANG_ENGLISH_US)
 
#define APP_USBD_STRING_ID_MANUFACTURER   1
 
#define APP_USBD_STRINGS_MANUFACTURER_EXTERN   0
 
#define APP_USBD_STRINGS_MANUFACTURER   APP_USBD_STRING_DESC("Nordic Semiconductor")
 
#define APP_USBD_STRING_ID_PRODUCT   2
 
#define APP_USBD_STRINGS_PRODUCT_EXTERN   0
 
#define APP_USBD_STRINGS_PRODUCT   APP_USBD_STRING_DESC("nRF52 USB Product")
 
#define APP_USBD_STRING_ID_SERIAL   3
 
#define APP_USBD_STRING_SERIAL_EXTERN   0
 
#define APP_USBD_STRING_SERIAL   APP_USBD_STRING_DESC("000000000000")
 
#define APP_USBD_STRING_ID_CONFIGURATION   4
 
#define APP_USBD_STRING_CONFIGURATION_EXTERN   0
 
#define APP_USBD_STRINGS_CONFIGURATION   APP_USBD_STRING_DESC("Default configuration")
 
#define APP_USBD_STRINGS_USER   X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))
 
#define APP_USBD_HID_ENABLED   0
 
#define APP_USBD_HID_DEFAULT_IDLE_RATE   0
 
#define APP_USBD_HID_REPORT_IDLE_TABLE_SIZE   4
 
#define APP_USBD_HID_GENERIC_ENABLED   0
 
#define APP_USBD_HID_KBD_ENABLED   0
 
#define APP_USBD_HID_MOUSE_ENABLED   0
 
#define APP_USBD_MSC_ENABLED   0
 
#define CRC16_ENABLED   1
 
#define CRC32_ENABLED   0
 
#define ECC_ENABLED   0
 
#define FDS_ENABLED   1
 
#define FDS_VIRTUAL_PAGES   3
 
#define FDS_VIRTUAL_PAGE_SIZE   1024
 
#define FDS_VIRTUAL_PAGES_RESERVED   0
 
#define FDS_BACKEND   2
 
#define FDS_OP_QUEUE_SIZE   4
 
#define FDS_CRC_CHECK_ON_READ   0
 
#define FDS_CRC_CHECK_ON_WRITE   0
 
#define FDS_MAX_USERS   4
 
#define HARDFAULT_HANDLER_ENABLED   0
 
#define HCI_MEM_POOL_ENABLED   0
 
#define HCI_TX_BUF_SIZE   600
 
#define HCI_RX_BUF_SIZE   600
 
#define HCI_RX_BUF_QUEUE_SIZE   4
 
#define HCI_SLIP_ENABLED   0
 
#define HCI_UART_BAUDRATE   30801920
 
#define HCI_UART_FLOW_CONTROL   0
 
#define HCI_UART_RX_PIN   8
 
#define HCI_UART_TX_PIN   6
 
#define HCI_UART_RTS_PIN   5
 
#define HCI_UART_CTS_PIN   7
 
#define HCI_TRANSPORT_ENABLED   0
 
#define HCI_MAX_PACKET_SIZE_IN_BITS   8000
 
#define LED_SOFTBLINK_ENABLED   0
 
#define LOW_POWER_PWM_ENABLED   0
 
#define MEM_MANAGER_ENABLED   0
 
#define MEMORY_MANAGER_SMALL_BLOCK_COUNT   1
 
#define MEMORY_MANAGER_SMALL_BLOCK_SIZE   32
 
#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT   0
 
#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE   256
 
#define MEMORY_MANAGER_LARGE_BLOCK_COUNT   0
 
#define MEMORY_MANAGER_LARGE_BLOCK_SIZE   256
 
#define MEMORY_MANAGER_XLARGE_BLOCK_COUNT   0
 
#define MEMORY_MANAGER_XLARGE_BLOCK_SIZE   1320
 
#define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT   0
 
#define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE   3444
 
#define MEMORY_MANAGER_XSMALL_BLOCK_COUNT   0
 
#define MEMORY_MANAGER_XSMALL_BLOCK_SIZE   64
 
#define MEMORY_MANAGER_XXSMALL_BLOCK_COUNT   0
 
#define MEMORY_MANAGER_XXSMALL_BLOCK_SIZE   32
 
#define MEM_MANAGER_CONFIG_LOG_ENABLED   0
 
#define MEM_MANAGER_CONFIG_LOG_LEVEL   3
 
#define MEM_MANAGER_CONFIG_INFO_COLOR   0
 
#define MEM_MANAGER_CONFIG_DEBUG_COLOR   0
 
#define MEM_MANAGER_DISABLE_API_PARAM_CHECK   0
 
#define NRF_BALLOC_ENABLED   1
 
#define NRF_BALLOC_CONFIG_DEBUG_ENABLED   0
 
#define NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS   1
 
#define NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS   1
 
#define NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED   0
 
#define NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED   0
 
#define NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED   0
 
#define NRF_BALLOC_CLI_CMDS   0
 
#define NRF_CSENSE_ENABLED   0
 
#define NRF_CSENSE_PAD_HYSTERESIS   15
 
#define NRF_CSENSE_PAD_DEVIATION   70
 
#define NRF_CSENSE_MIN_PAD_VALUE   20
 
#define NRF_CSENSE_MAX_PADS_NUMBER   20
 
#define NRF_CSENSE_MAX_VALUE   1000
 
#define NRF_CSENSE_OUTPUT_PIN   26
 
#define NRF_DRV_CSENSE_ENABLED   0
 
#define USE_COMP   0
 
#define TIMER0_FOR_CSENSE   1
 
#define TIMER1_FOR_CSENSE   2
 
#define MEASUREMENT_PERIOD   20
 
#define NRF_FSTORAGE_ENABLED   1
 
#define NRF_FSTORAGE_PARAM_CHECK_DISABLED   0
 
#define NRF_FSTORAGE_SD_QUEUE_SIZE   4
 
#define NRF_FSTORAGE_SD_MAX_RETRIES   8
 
#define NRF_FSTORAGE_SD_MAX_WRITE_SIZE   4096
 
#define NRF_GFX_ENABLED   0
 
#define NRF_MEMOBJ_ENABLED   1
 
#define NRF_PWR_MGMT_ENABLED   1
 
#define NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED   0
 
#define NRF_PWR_MGMT_SLEEP_DEBUG_PIN   31
 
#define NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED   0
 
#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED   0
 
#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S   3
 
#define NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED   1
 
#define NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY   1
 
#define NRF_PWR_MGMT_CONFIG_USE_SCHEDULER   0
 
#define NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT   3
 
#define NRF_QUEUE_ENABLED   0
 
#define NRF_QUEUE_CLI_CMDS   0
 
#define NRF_SECTION_ITER_ENABLED   1
 
#define NRF_SORTLIST_ENABLED   1
 
#define NRF_SPI_MNGR_ENABLED   0
 
#define NRF_STRERROR_ENABLED   1
 
#define NRF_TWI_MNGR_ENABLED   1
 
#define SLIP_ENABLED   0
 
#define TASK_MANAGER_ENABLED   0
 
#define TASK_MANAGER_CLI_CMDS   0
 
#define TASK_MANAGER_CONFIG_MAX_TASKS   2
 
#define TASK_MANAGER_CONFIG_STACK_SIZE   1024
 
#define TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED   1
 
#define TASK_MANAGER_CONFIG_STACK_GUARD   7
 
#define BUTTON_ENABLED   1
 
#define BUTTON_HIGH_ACCURACY_ENABLED   0
 
#define APP_USBD_CDC_ACM_ENABLED   0
 
#define APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE   1
 
#define NRF_CLI_ENABLED   0
 
#define NRF_CLI_ARGC_MAX   12
 
#define NRF_CLI_BUILD_IN_CMDS_ENABLED   1
 
#define NRF_CLI_CMD_BUFF_SIZE   128
 
#define NRF_CLI_ECHO_STATUS   1
 
#define NRF_CLI_WILDCARD_ENABLED   0
 
#define NRF_CLI_METAKEYS_ENABLED   0
 
#define NRF_CLI_PRINTF_BUFF_SIZE   23
 
#define NRF_CLI_HISTORY_ENABLED   1
 
#define NRF_CLI_HISTORY_ELEMENT_SIZE   32
 
#define NRF_CLI_HISTORY_ELEMENT_COUNT   8
 
#define NRF_CLI_VT100_COLORS_ENABLED   1
 
#define NRF_CLI_STATISTICS_ENABLED   1
 
#define NRF_CLI_LOG_BACKEND   1
 
#define NRF_CLI_USES_TASK_MANAGER_ENABLED   0
 
#define NRF_FPRINTF_ENABLED   1
 
#define NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED   1
 
#define NRF_FPRINTF_DOUBLE_ENABLED   0
 
#define NRF_LOG_BACKEND_RTT_ENABLED   1
 
#define NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE   64
 
#define NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS   1
 
#define NRF_LOG_BACKEND_RTT_TX_RETRY_CNT   3
 
#define NRF_LOG_BACKEND_UART_ENABLED   0
 
#define NRF_LOG_BACKEND_UART_TX_PIN   6
 
#define NRF_LOG_BACKEND_UART_BAUDRATE   30801920
 
#define NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE   64
 
#define NRF_LOG_ENABLED   1
 
#define NRF_LOG_MSGPOOL_ELEMENT_SIZE   20
 
#define NRF_LOG_MSGPOOL_ELEMENT_COUNT   8
 
#define NRF_LOG_ALLOW_OVERFLOW   1
 
#define NRF_LOG_BUFSIZE   1024
 
#define NRF_LOG_CLI_CMDS   1
 
#define NRF_LOG_DEFAULT_LEVEL   4
 
#define NRF_LOG_DEFERRED   0
 
#define NRF_LOG_FILTERS_ENABLED   0
 
#define NRF_LOG_NON_DEFFERED_CRITICAL_REGION_ENABLED   0
 
#define NRF_LOG_STR_PUSH_BUFFER_SIZE   128
 
#define NRF_LOG_USES_COLORS   1
 
#define NRF_LOG_COLOR_DEFAULT   0
 
#define NRF_LOG_ERROR_COLOR   2
 
#define NRF_LOG_WARNING_COLOR   4
 
#define NRF_LOG_USES_TIMESTAMP   0
 
#define NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY   0
 
#define NRF_MPU_LIB_CONFIG_LOG_ENABLED   1
 
#define NRF_MPU_LIB_CONFIG_LOG_LEVEL   3
 
#define NRF_MPU_LIB_CONFIG_INFO_COLOR   0
 
#define NRF_MPU_LIB_CONFIG_DEBUG_COLOR   0
 
#define NRF_STACK_GUARD_CONFIG_LOG_ENABLED   0
 
#define NRF_STACK_GUARD_CONFIG_LOG_LEVEL   3
 
#define NRF_STACK_GUARD_CONFIG_INFO_COLOR   0
 
#define NRF_STACK_GUARD_CONFIG_DEBUG_COLOR   0
 
#define TASK_MANAGER_CONFIG_LOG_ENABLED   0
 
#define TASK_MANAGER_CONFIG_LOG_LEVEL   3
 
#define TASK_MANAGER_CONFIG_INFO_COLOR   0
 
#define TASK_MANAGER_CONFIG_DEBUG_COLOR   0
 
#define CLOCK_CONFIG_LOG_ENABLED   0
 
#define CLOCK_CONFIG_LOG_LEVEL   3
 
#define CLOCK_CONFIG_INFO_COLOR   0
 
#define CLOCK_CONFIG_DEBUG_COLOR   0
 
#define COMP_CONFIG_LOG_ENABLED   0
 
#define COMP_CONFIG_LOG_LEVEL   3
 
#define COMP_CONFIG_INFO_COLOR   0
 
#define COMP_CONFIG_DEBUG_COLOR   0
 
#define GPIOTE_CONFIG_LOG_ENABLED   0
 
#define GPIOTE_CONFIG_LOG_LEVEL   3
 
#define GPIOTE_CONFIG_INFO_COLOR   0
 
#define GPIOTE_CONFIG_DEBUG_COLOR   0
 
#define LPCOMP_CONFIG_LOG_ENABLED   0
 
#define LPCOMP_CONFIG_LOG_LEVEL   3
 
#define LPCOMP_CONFIG_INFO_COLOR   0
 
#define LPCOMP_CONFIG_DEBUG_COLOR   0
 
#define MAX3421E_HOST_CONFIG_LOG_ENABLED   0
 
#define MAX3421E_HOST_CONFIG_LOG_LEVEL   3
 
#define MAX3421E_HOST_CONFIG_INFO_COLOR   0
 
#define MAX3421E_HOST_CONFIG_DEBUG_COLOR   0
 
#define NRFX_USBD_CONFIG_LOG_ENABLED   0
 
#define NRFX_USBD_CONFIG_LOG_LEVEL   3
 
#define NRFX_USBD_CONFIG_INFO_COLOR   0
 
#define NRFX_USBD_CONFIG_DEBUG_COLOR   0
 
#define PDM_CONFIG_LOG_ENABLED   0
 
#define PDM_CONFIG_LOG_LEVEL   3
 
#define PDM_CONFIG_INFO_COLOR   0
 
#define PDM_CONFIG_DEBUG_COLOR   0
 
#define PPI_CONFIG_LOG_ENABLED   0
 
#define PPI_CONFIG_LOG_LEVEL   3
 
#define PPI_CONFIG_INFO_COLOR   0
 
#define PPI_CONFIG_DEBUG_COLOR   0
 
#define PWM_CONFIG_LOG_ENABLED   0
 
#define PWM_CONFIG_LOG_LEVEL   3
 
#define PWM_CONFIG_INFO_COLOR   0
 
#define PWM_CONFIG_DEBUG_COLOR   0
 
#define QDEC_CONFIG_LOG_ENABLED   0
 
#define QDEC_CONFIG_LOG_LEVEL   3
 
#define QDEC_CONFIG_INFO_COLOR   0
 
#define QDEC_CONFIG_DEBUG_COLOR   0
 
#define RNG_CONFIG_LOG_ENABLED   0
 
#define RNG_CONFIG_LOG_LEVEL   3
 
#define RNG_CONFIG_INFO_COLOR   0
 
#define RNG_CONFIG_DEBUG_COLOR   0
 
#define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED   0
 
#define RTC_CONFIG_LOG_ENABLED   0
 
#define RTC_CONFIG_LOG_LEVEL   3
 
#define RTC_CONFIG_INFO_COLOR   0
 
#define RTC_CONFIG_DEBUG_COLOR   0
 
#define SAADC_CONFIG_LOG_ENABLED   1
 
#define SAADC_CONFIG_LOG_LEVEL   1
 
#define SAADC_CONFIG_INFO_COLOR   0
 
#define SAADC_CONFIG_DEBUG_COLOR   0
 
#define SPIS_CONFIG_LOG_ENABLED   0
 
#define SPIS_CONFIG_LOG_LEVEL   3
 
#define SPIS_CONFIG_INFO_COLOR   0
 
#define SPIS_CONFIG_DEBUG_COLOR   0
 
#define SPI_CONFIG_LOG_ENABLED   0
 
#define SPI_CONFIG_LOG_LEVEL   3
 
#define SPI_CONFIG_INFO_COLOR   0
 
#define SPI_CONFIG_DEBUG_COLOR   0
 
#define TIMER_CONFIG_LOG_ENABLED   0
 
#define TIMER_CONFIG_LOG_LEVEL   3
 
#define TIMER_CONFIG_INFO_COLOR   0
 
#define TIMER_CONFIG_DEBUG_COLOR   0
 
#define TWIS_CONFIG_LOG_ENABLED   0
 
#define TWIS_CONFIG_LOG_LEVEL   3
 
#define TWIS_CONFIG_INFO_COLOR   0
 
#define TWIS_CONFIG_DEBUG_COLOR   0
 
#define TWI_CONFIG_LOG_ENABLED   0
 
#define TWI_CONFIG_LOG_LEVEL   3
 
#define TWI_CONFIG_INFO_COLOR   0
 
#define TWI_CONFIG_DEBUG_COLOR   0
 
#define UART_CONFIG_LOG_ENABLED   0
 
#define UART_CONFIG_LOG_LEVEL   3
 
#define UART_CONFIG_INFO_COLOR   0
 
#define UART_CONFIG_DEBUG_COLOR   0
 
#define USBD_CONFIG_LOG_ENABLED   0
 
#define USBD_CONFIG_LOG_LEVEL   3
 
#define USBD_CONFIG_INFO_COLOR   0
 
#define USBD_CONFIG_DEBUG_COLOR   0
 
#define WDT_CONFIG_LOG_ENABLED   0
 
#define WDT_CONFIG_LOG_LEVEL   3
 
#define WDT_CONFIG_INFO_COLOR   0
 
#define WDT_CONFIG_DEBUG_COLOR   0
 
#define APP_BUTTON_CONFIG_LOG_ENABLED   0
 
#define APP_BUTTON_CONFIG_LOG_LEVEL   3
 
#define APP_BUTTON_CONFIG_INITIAL_LOG_LEVEL   3
 
#define APP_BUTTON_CONFIG_INFO_COLOR   0
 
#define APP_BUTTON_CONFIG_DEBUG_COLOR   0
 
#define APP_TIMER_CONFIG_LOG_ENABLED   0
 
#define APP_TIMER_CONFIG_LOG_LEVEL   3
 
#define APP_TIMER_CONFIG_INITIAL_LOG_LEVEL   3
 
#define APP_TIMER_CONFIG_INFO_COLOR   0
 
#define APP_TIMER_CONFIG_DEBUG_COLOR   0
 
#define APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED   0
 
#define APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL   3
 
#define APP_USBD_CDC_ACM_CONFIG_INFO_COLOR   0
 
#define APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR   0
 
#define APP_USBD_CONFIG_LOG_ENABLED   0
 
#define APP_USBD_CONFIG_LOG_LEVEL   3
 
#define APP_USBD_CONFIG_INFO_COLOR   0
 
#define APP_USBD_CONFIG_DEBUG_COLOR   0
 
#define APP_USBD_DUMMY_CONFIG_LOG_ENABLED   0
 
#define APP_USBD_DUMMY_CONFIG_LOG_LEVEL   3
 
#define APP_USBD_DUMMY_CONFIG_INFO_COLOR   0
 
#define APP_USBD_DUMMY_CONFIG_DEBUG_COLOR   0
 
#define APP_USBD_MSC_CONFIG_LOG_ENABLED   0
 
#define APP_USBD_MSC_CONFIG_LOG_LEVEL   3
 
#define APP_USBD_MSC_CONFIG_INFO_COLOR   0
 
#define APP_USBD_MSC_CONFIG_DEBUG_COLOR   0
 
#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED   0
 
#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL   3
 
#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR   0
 
#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR   0
 
#define NRF_ATFIFO_CONFIG_LOG_ENABLED   1
 
#define NRF_ATFIFO_CONFIG_LOG_LEVEL   3
 
#define NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL   3
 
#define NRF_ATFIFO_CONFIG_INFO_COLOR   0
 
#define NRF_ATFIFO_CONFIG_DEBUG_COLOR   0
 
#define NRF_BALLOC_CONFIG_LOG_ENABLED   0
 
#define NRF_BALLOC_CONFIG_LOG_LEVEL   3
 
#define NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL   3
 
#define NRF_BALLOC_CONFIG_INFO_COLOR   0
 
#define NRF_BALLOC_CONFIG_DEBUG_COLOR   0
 
#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_ENABLED   0
 
#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_LEVEL   3
 
#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_INIT_FILTER_LEVEL   3
 
#define NRF_BLOCK_DEV_EMPTY_CONFIG_INFO_COLOR   0
 
#define NRF_BLOCK_DEV_EMPTY_CONFIG_DEBUG_COLOR   0
 
#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED   0
 
#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL   3
 
#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_INIT_FILTER_LEVEL   3
 
#define NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR   0
 
#define NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR   0
 
#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED   0
 
#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL   3
 
#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_INIT_FILTER_LEVEL   3
 
#define NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR   0
 
#define NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR   0
 
#define NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED   0
 
#define NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL   3
 
#define NRF_CLI_BLE_UART_CONFIG_INFO_COLOR   0
 
#define NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR   0
 
#define NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED   0
 
#define NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL   3
 
#define NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR   0
 
#define NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR   0
 
#define NRF_CLI_UART_CONFIG_LOG_ENABLED   0
 
#define NRF_CLI_UART_CONFIG_LOG_LEVEL   3
 
#define NRF_CLI_UART_CONFIG_INFO_COLOR   0
 
#define NRF_CLI_UART_CONFIG_DEBUG_COLOR   0
 
#define NRF_LIBUARTE_CONFIG_LOG_ENABLED   0
 
#define NRF_LIBUARTE_CONFIG_LOG_LEVEL   3
 
#define NRF_LIBUARTE_CONFIG_INFO_COLOR   0
 
#define NRF_LIBUARTE_CONFIG_DEBUG_COLOR   0
 
#define NRF_MEMOBJ_CONFIG_LOG_ENABLED   0
 
#define NRF_MEMOBJ_CONFIG_LOG_LEVEL   3
 
#define NRF_MEMOBJ_CONFIG_INFO_COLOR   0
 
#define NRF_MEMOBJ_CONFIG_DEBUG_COLOR   0
 
#define NRF_PWR_MGMT_CONFIG_LOG_ENABLED   0
 
#define NRF_PWR_MGMT_CONFIG_LOG_LEVEL   3
 
#define NRF_PWR_MGMT_CONFIG_INFO_COLOR   0
 
#define NRF_PWR_MGMT_CONFIG_DEBUG_COLOR   0
 
#define NRF_QUEUE_CONFIG_LOG_ENABLED   0
 
#define NRF_QUEUE_CONFIG_LOG_LEVEL   3
 
#define NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL   3
 
#define NRF_QUEUE_CONFIG_INFO_COLOR   0
 
#define NRF_QUEUE_CONFIG_DEBUG_COLOR   0
 
#define NRF_SDH_ANT_LOG_ENABLED   0
 
#define NRF_SDH_ANT_LOG_LEVEL   3
 
#define NRF_SDH_ANT_INFO_COLOR   0
 
#define NRF_SDH_ANT_DEBUG_COLOR   0
 
#define NRF_SDH_BLE_LOG_ENABLED   1
 
#define NRF_SDH_BLE_LOG_LEVEL   4
 
#define NRF_SDH_BLE_INFO_COLOR   0
 
#define NRF_SDH_BLE_DEBUG_COLOR   0
 
#define NRF_SDH_LOG_ENABLED   1
 
#define NRF_SDH_LOG_LEVEL   4
 
#define NRF_SDH_INFO_COLOR   0
 
#define NRF_SDH_DEBUG_COLOR   0
 
#define NRF_SDH_SOC_LOG_ENABLED   1
 
#define NRF_SDH_SOC_LOG_LEVEL   3
 
#define NRF_SDH_SOC_INFO_COLOR   0
 
#define NRF_SDH_SOC_DEBUG_COLOR   0
 
#define NRF_SORTLIST_CONFIG_LOG_ENABLED   0
 
#define NRF_SORTLIST_CONFIG_LOG_LEVEL   3
 
#define NRF_SORTLIST_CONFIG_INFO_COLOR   0
 
#define NRF_SORTLIST_CONFIG_DEBUG_COLOR   0
 
#define NRF_TWI_SENSOR_CONFIG_LOG_ENABLED   0
 
#define NRF_TWI_SENSOR_CONFIG_LOG_LEVEL   3
 
#define NRF_TWI_SENSOR_CONFIG_INFO_COLOR   0
 
#define NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR   0
 
#define PM_LOG_ENABLED   1
 
#define PM_LOG_LEVEL   3
 
#define PM_LOG_INFO_COLOR   0
 
#define PM_LOG_DEBUG_COLOR   0
 
#define SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED   0
 
#define SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL   3
 
#define SER_HAL_TRANSPORT_CONFIG_INFO_COLOR   0
 
#define SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR   0
 
#define NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED   1
 
#define NFC_AC_REC_ENABLED   0
 
#define NFC_AC_REC_PARSER_ENABLED   0
 
#define NFC_BLE_OOB_ADVDATA_ENABLED   0
 
#define ADVANCED_ADVDATA_SUPPORT   0
 
#define NFC_BLE_OOB_ADVDATA_PARSER_ENABLED   0
 
#define NFC_BLE_PAIR_LIB_ENABLED   0
 
#define NFC_BLE_PAIR_LIB_LOG_ENABLED   0
 
#define NFC_BLE_PAIR_LIB_LOG_LEVEL   3
 
#define NFC_BLE_PAIR_LIB_INFO_COLOR   0
 
#define NFC_BLE_PAIR_LIB_DEBUG_COLOR   0
 
#define BLE_NFC_SEC_PARAM_BOND   1
 
#define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC   1
 
#define BLE_NFC_SEC_PARAM_KDIST_OWN_ID   1
 
#define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC   1
 
#define BLE_NFC_SEC_PARAM_KDIST_PEER_ID   1
 
#define BLE_NFC_SEC_PARAM_MIN_KEY_SIZE   7
 
#define BLE_NFC_SEC_PARAM_MAX_KEY_SIZE   16
 
#define NFC_BLE_PAIR_MSG_ENABLED   0
 
#define NFC_CH_COMMON_ENABLED   0
 
#define NFC_EP_OOB_REC_ENABLED   0
 
#define NFC_HS_REC_ENABLED   0
 
#define NFC_LE_OOB_REC_ENABLED   0
 
#define NFC_LE_OOB_REC_PARSER_ENABLED   0
 
#define NFC_NDEF_LAUNCHAPP_MSG_ENABLED   0
 
#define NFC_NDEF_LAUNCHAPP_REC_ENABLED   0
 
#define NFC_NDEF_MSG_ENABLED   0
 
#define NFC_NDEF_MSG_TAG_TYPE   2
 
#define NFC_NDEF_MSG_PARSER_ENABLED   0
 
#define NFC_NDEF_MSG_PARSER_LOG_ENABLED   0
 
#define NFC_NDEF_MSG_PARSER_LOG_LEVEL   3
 
#define NFC_NDEF_MSG_PARSER_INFO_COLOR   0
 
#define NFC_NDEF_RECORD_ENABLED   0
 
#define NFC_NDEF_RECORD_PARSER_ENABLED   0
 
#define NFC_NDEF_RECORD_PARSER_LOG_ENABLED   0
 
#define NFC_NDEF_RECORD_PARSER_LOG_LEVEL   3
 
#define NFC_NDEF_RECORD_PARSER_INFO_COLOR   0
 
#define NFC_NDEF_TEXT_RECORD_ENABLED   0
 
#define NFC_NDEF_URI_MSG_ENABLED   0
 
#define NFC_NDEF_URI_REC_ENABLED   0
 
#define NFC_PLATFORM_ENABLED   0
 
#define NFC_PLATFORM_LOG_ENABLED   0
 
#define NFC_PLATFORM_LOG_LEVEL   3
 
#define NFC_PLATFORM_INFO_COLOR   0
 
#define NFC_PLATFORM_DEBUG_COLOR   0
 
#define NFC_T2T_PARSER_ENABLED   0
 
#define NFC_T2T_PARSER_LOG_ENABLED   0
 
#define NFC_T2T_PARSER_LOG_LEVEL   3
 
#define NFC_T2T_PARSER_INFO_COLOR   0
 
#define NFC_T4T_APDU_ENABLED   0
 
#define NFC_T4T_APDU_LOG_ENABLED   0
 
#define NFC_T4T_APDU_LOG_LEVEL   3
 
#define NFC_T4T_APDU_LOG_COLOR   0
 
#define NFC_T4T_CC_FILE_PARSER_ENABLED   0
 
#define NFC_T4T_CC_FILE_PARSER_LOG_ENABLED   0
 
#define NFC_T4T_CC_FILE_PARSER_LOG_LEVEL   3
 
#define NFC_T4T_CC_FILE_PARSER_INFO_COLOR   0
 
#define NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED   0
 
#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED   0
 
#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL   3
 
#define NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR   0
 
#define APDU_BUFF_SIZE   250
 
#define CC_STORAGE_BUFF_SIZE   64
 
#define NFC_T4T_TLV_BLOCK_PARSER_ENABLED   0
 
#define NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED   0
 
#define NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL   3
 
#define NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR   0
 
#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP   512
 
#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS   2
 
#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN   16
 
#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS   2
 
#define SEGGER_RTT_CONFIG_DEFAULT_MODE   0
 
#define NRF_SDH_BLE_ENABLED   1
 
#define NRF_SDH_BLE_GAP_DATA_LENGTH   101
 
#define NRF_SDH_BLE_PERIPHERAL_LINK_COUNT   1
 
#define NRF_SDH_BLE_CENTRAL_LINK_COUNT   0
 
#define NRF_SDH_BLE_TOTAL_LINK_COUNT   1
 
#define NRF_SDH_BLE_GAP_EVENT_LENGTH   40
 
#define NRF_SDH_BLE_GATT_MAX_MTU_SIZE   104
 
#define NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE   1408
 
#define NRF_SDH_BLE_VS_UUID_COUNT   1
 
#define NRF_SDH_BLE_SERVICE_CHANGED   1
 
#define NRF_SDH_BLE_OBSERVER_PRIO_LEVELS   4
 
#define BLE_ADV_BLE_OBSERVER_PRIO   1
 
#define BLE_ANCS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_ANS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_BAS_BLE_OBSERVER_PRIO   2
 
#define BLE_BAS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_BPS_BLE_OBSERVER_PRIO   2
 
#define BLE_CONN_PARAMS_BLE_OBSERVER_PRIO   1
 
#define BLE_CONN_STATE_BLE_OBSERVER_PRIO   0
 
#define BLE_CSCS_BLE_OBSERVER_PRIO   2
 
#define BLE_CTS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_DB_DISC_BLE_OBSERVER_PRIO   1
 
#define BLE_DFU_BLE_OBSERVER_PRIO   2
 
#define BLE_DIS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_GLS_BLE_OBSERVER_PRIO   2
 
#define BLE_HIDS_BLE_OBSERVER_PRIO   2
 
#define BLE_HRS_BLE_OBSERVER_PRIO   2
 
#define BLE_HRS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_HTS_BLE_OBSERVER_PRIO   2
 
#define BLE_IAS_BLE_OBSERVER_PRIO   2
 
#define BLE_IAS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_LBS_BLE_OBSERVER_PRIO   2
 
#define BLE_LBS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_LLS_BLE_OBSERVER_PRIO   2
 
#define BLE_LNS_BLE_OBSERVER_PRIO   2
 
#define BLE_NUS_BLE_OBSERVER_PRIO   2
 
#define BLE_NUS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_OTS_BLE_OBSERVER_PRIO   2
 
#define BLE_OTS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_RSCS_BLE_OBSERVER_PRIO   2
 
#define BLE_RSCS_C_BLE_OBSERVER_PRIO   2
 
#define BLE_TPS_BLE_OBSERVER_PRIO   2
 
#define BSP_BTN_BLE_OBSERVER_PRIO   1
 
#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO   1
 
#define NRF_BLE_BMS_BLE_OBSERVER_PRIO   2
 
#define NRF_BLE_CGMS_BLE_OBSERVER_PRIO   2
 
#define NRF_BLE_ES_BLE_OBSERVER_PRIO   2
 
#define NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO   2
 
#define NRF_BLE_GATT_BLE_OBSERVER_PRIO   3
 
#define NRF_BLE_GQ_BLE_OBSERVER_PRIO   1
 
#define NRF_BLE_QWR_BLE_OBSERVER_PRIO   3
 
#define NRF_BLE_SCAN_OBSERVER_PRIO   1
 
#define PM_BLE_OBSERVER_PRIO   1
 
#define NRF_SDH_ENABLED   1
 
#define NRF_SDH_DISPATCH_MODEL   0
 
#define NRF_SDH_CLOCK_LF_SRC   0
 
#define NRF_SDH_CLOCK_LF_RC_CTIV   16
 
#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV   2
 
#define NRF_SDH_CLOCK_LF_ACCURACY   7
 
#define NRF_SDH_REQ_OBSERVER_PRIO_LEVELS   2
 
#define NRF_SDH_STATE_OBSERVER_PRIO_LEVELS   2
 
#define NRF_SDH_STACK_OBSERVER_PRIO_LEVELS   2
 
#define CLOCK_CONFIG_STATE_OBSERVER_PRIO   0
 
#define POWER_CONFIG_STATE_OBSERVER_PRIO   0
 
#define RNG_CONFIG_STATE_OBSERVER_PRIO   0
 
#define NRF_SDH_ANT_STACK_OBSERVER_PRIO   0
 
#define NRF_SDH_BLE_STACK_OBSERVER_PRIO   0
 
#define NRF_SDH_SOC_STACK_OBSERVER_PRIO   0
 
#define NRF_SDH_SOC_ENABLED   1
 
#define NRF_SDH_SOC_OBSERVER_PRIO_LEVELS   2
 
#define BLE_DFU_SOC_OBSERVER_PRIO   1
 
#define CLOCK_CONFIG_SOC_OBSERVER_PRIO   0
 
#define POWER_CONFIG_SOC_OBSERVER_PRIO   0
 

Detailed Description

Core configuration file.

Macro Definition Documentation

◆ ADVANCED_ADVDATA_SUPPORT

#define ADVANCED_ADVDATA_SUPPORT   0

◆ APDU_BUFF_SIZE

#define APDU_BUFF_SIZE   250

◆ APP_BUTTON_CONFIG_DEBUG_COLOR

#define APP_BUTTON_CONFIG_DEBUG_COLOR   0

◆ APP_BUTTON_CONFIG_INFO_COLOR

#define APP_BUTTON_CONFIG_INFO_COLOR   0

◆ APP_BUTTON_CONFIG_INITIAL_LOG_LEVEL

#define APP_BUTTON_CONFIG_INITIAL_LOG_LEVEL   3

◆ APP_BUTTON_CONFIG_LOG_ENABLED

#define APP_BUTTON_CONFIG_LOG_ENABLED   0

◆ APP_BUTTON_CONFIG_LOG_LEVEL

#define APP_BUTTON_CONFIG_LOG_LEVEL   3

◆ APP_FIFO_ENABLED

#define APP_FIFO_ENABLED   1

◆ APP_GPIOTE_ENABLED

#define APP_GPIOTE_ENABLED   0

◆ APP_PWM_ENABLED

#define APP_PWM_ENABLED   0

◆ APP_SCHEDULER_ENABLED

#define APP_SCHEDULER_ENABLED   0

◆ APP_SCHEDULER_WITH_PAUSE

#define APP_SCHEDULER_WITH_PAUSE   0

◆ APP_SCHEDULER_WITH_PROFILER

#define APP_SCHEDULER_WITH_PROFILER   0

◆ APP_SDCARD_ENABLED

#define APP_SDCARD_ENABLED   1

◆ APP_SDCARD_FREQ_DATA

#define APP_SDCARD_FREQ_DATA   33554432

◆ APP_SDCARD_FREQ_INIT

#define APP_SDCARD_FREQ_INIT   33554432

◆ APP_SDCARD_SPI_INSTANCE

#define APP_SDCARD_SPI_INSTANCE   1

◆ APP_TIMER_CONFIG_DEBUG_COLOR

#define APP_TIMER_CONFIG_DEBUG_COLOR   0

◆ APP_TIMER_CONFIG_INFO_COLOR

#define APP_TIMER_CONFIG_INFO_COLOR   0

◆ APP_TIMER_CONFIG_INITIAL_LOG_LEVEL

#define APP_TIMER_CONFIG_INITIAL_LOG_LEVEL   3

◆ APP_TIMER_CONFIG_IRQ_PRIORITY

#define APP_TIMER_CONFIG_IRQ_PRIORITY   6

◆ APP_TIMER_CONFIG_LOG_ENABLED

#define APP_TIMER_CONFIG_LOG_ENABLED   0

◆ APP_TIMER_CONFIG_LOG_LEVEL

#define APP_TIMER_CONFIG_LOG_LEVEL   3

◆ APP_TIMER_CONFIG_OP_QUEUE_SIZE

#define APP_TIMER_CONFIG_OP_QUEUE_SIZE   10

◆ APP_TIMER_CONFIG_RTC_FREQUENCY

#define APP_TIMER_CONFIG_RTC_FREQUENCY   0

◆ APP_TIMER_CONFIG_SWI_NUMBER

#define APP_TIMER_CONFIG_SWI_NUMBER   0

◆ APP_TIMER_CONFIG_USE_SCHEDULER

#define APP_TIMER_CONFIG_USE_SCHEDULER   0

◆ APP_TIMER_ENABLED

#define APP_TIMER_ENABLED   1

◆ APP_TIMER_KEEPS_RTC_ACTIVE

#define APP_TIMER_KEEPS_RTC_ACTIVE   0

◆ APP_TIMER_SAFE_WINDOW_MS

#define APP_TIMER_SAFE_WINDOW_MS   300000

◆ APP_TIMER_WITH_PROFILER

#define APP_TIMER_WITH_PROFILER   0

◆ APP_UART_DRIVER_INSTANCE

#define APP_UART_DRIVER_INSTANCE   0

◆ APP_UART_ENABLED

#define APP_UART_ENABLED   1

◆ APP_USBD_AUDIO_ENABLED

#define APP_USBD_AUDIO_ENABLED   0

◆ APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR

#define APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR   0

◆ APP_USBD_CDC_ACM_CONFIG_INFO_COLOR

#define APP_USBD_CDC_ACM_CONFIG_INFO_COLOR   0

◆ APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED

#define APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED   0

◆ APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL

#define APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL   3

◆ APP_USBD_CDC_ACM_ENABLED

#define APP_USBD_CDC_ACM_ENABLED   0

◆ APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE

#define APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE   1

◆ APP_USBD_CONFIG_DEBUG_COLOR

#define APP_USBD_CONFIG_DEBUG_COLOR   0

◆ APP_USBD_CONFIG_DESC_STRING_SIZE

#define APP_USBD_CONFIG_DESC_STRING_SIZE   31

◆ APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED

#define APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED   1

◆ APP_USBD_CONFIG_EVENT_QUEUE_ENABLE

#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE   1

◆ APP_USBD_CONFIG_EVENT_QUEUE_SIZE

#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE   32

◆ APP_USBD_CONFIG_INFO_COLOR

#define APP_USBD_CONFIG_INFO_COLOR   0

◆ APP_USBD_CONFIG_LOG_ENABLED

#define APP_USBD_CONFIG_LOG_ENABLED   0

◆ APP_USBD_CONFIG_LOG_LEVEL

#define APP_USBD_CONFIG_LOG_LEVEL   3

◆ APP_USBD_CONFIG_MAX_POWER

#define APP_USBD_CONFIG_MAX_POWER   100

◆ APP_USBD_CONFIG_POWER_EVENTS_PROCESS

#define APP_USBD_CONFIG_POWER_EVENTS_PROCESS   1

◆ APP_USBD_CONFIG_SELF_POWERED

#define APP_USBD_CONFIG_SELF_POWERED   1

◆ APP_USBD_CONFIG_SOF_HANDLING_MODE

#define APP_USBD_CONFIG_SOF_HANDLING_MODE   2

◆ APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE

#define APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE   0

◆ APP_USBD_DEVICE_VER_MAJOR

#define APP_USBD_DEVICE_VER_MAJOR   1

◆ APP_USBD_DEVICE_VER_MINOR

#define APP_USBD_DEVICE_VER_MINOR   0

◆ APP_USBD_DEVICE_VER_SUB

#define APP_USBD_DEVICE_VER_SUB   0

◆ APP_USBD_DUMMY_CONFIG_DEBUG_COLOR

#define APP_USBD_DUMMY_CONFIG_DEBUG_COLOR   0

◆ APP_USBD_DUMMY_CONFIG_INFO_COLOR

#define APP_USBD_DUMMY_CONFIG_INFO_COLOR   0

◆ APP_USBD_DUMMY_CONFIG_LOG_ENABLED

#define APP_USBD_DUMMY_CONFIG_LOG_ENABLED   0

◆ APP_USBD_DUMMY_CONFIG_LOG_LEVEL

#define APP_USBD_DUMMY_CONFIG_LOG_LEVEL   3

◆ APP_USBD_ENABLED

#define APP_USBD_ENABLED   0

◆ APP_USBD_HID_DEFAULT_IDLE_RATE

#define APP_USBD_HID_DEFAULT_IDLE_RATE   0

◆ APP_USBD_HID_ENABLED

#define APP_USBD_HID_ENABLED   0

◆ APP_USBD_HID_GENERIC_ENABLED

#define APP_USBD_HID_GENERIC_ENABLED   0

◆ APP_USBD_HID_KBD_ENABLED

#define APP_USBD_HID_KBD_ENABLED   0

◆ APP_USBD_HID_MOUSE_ENABLED

#define APP_USBD_HID_MOUSE_ENABLED   0

◆ APP_USBD_HID_REPORT_IDLE_TABLE_SIZE

#define APP_USBD_HID_REPORT_IDLE_TABLE_SIZE   4

◆ APP_USBD_MSC_CONFIG_DEBUG_COLOR

#define APP_USBD_MSC_CONFIG_DEBUG_COLOR   0

◆ APP_USBD_MSC_CONFIG_INFO_COLOR

#define APP_USBD_MSC_CONFIG_INFO_COLOR   0

◆ APP_USBD_MSC_CONFIG_LOG_ENABLED

#define APP_USBD_MSC_CONFIG_LOG_ENABLED   0

◆ APP_USBD_MSC_CONFIG_LOG_LEVEL

#define APP_USBD_MSC_CONFIG_LOG_LEVEL   3

◆ APP_USBD_MSC_ENABLED

#define APP_USBD_MSC_ENABLED   0

◆ APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR

#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR   0

◆ APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR

#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR   0

◆ APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED

#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED   0

◆ APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL

#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL   3

◆ APP_USBD_PID

#define APP_USBD_PID   0

◆ APP_USBD_STRING_CONFIGURATION_EXTERN

#define APP_USBD_STRING_CONFIGURATION_EXTERN   0

◆ APP_USBD_STRING_ID_CONFIGURATION

#define APP_USBD_STRING_ID_CONFIGURATION   4

◆ APP_USBD_STRING_ID_MANUFACTURER

#define APP_USBD_STRING_ID_MANUFACTURER   1

◆ APP_USBD_STRING_ID_PRODUCT

#define APP_USBD_STRING_ID_PRODUCT   2

◆ APP_USBD_STRING_ID_SERIAL

#define APP_USBD_STRING_ID_SERIAL   3

◆ APP_USBD_STRING_SERIAL

#define APP_USBD_STRING_SERIAL   APP_USBD_STRING_DESC("000000000000")

◆ APP_USBD_STRING_SERIAL_EXTERN

#define APP_USBD_STRING_SERIAL_EXTERN   0

◆ APP_USBD_STRINGS_CONFIGURATION

#define APP_USBD_STRINGS_CONFIGURATION   APP_USBD_STRING_DESC("Default configuration")

◆ APP_USBD_STRINGS_LANGIDS

#define APP_USBD_STRINGS_LANGIDS   APP_USBD_LANG_AND_SUBLANG(APP_USBD_LANG_ENGLISH, APP_USBD_SUBLANG_ENGLISH_US)

◆ APP_USBD_STRINGS_MANUFACTURER

#define APP_USBD_STRINGS_MANUFACTURER   APP_USBD_STRING_DESC("Nordic Semiconductor")

◆ APP_USBD_STRINGS_MANUFACTURER_EXTERN

#define APP_USBD_STRINGS_MANUFACTURER_EXTERN   0

◆ APP_USBD_STRINGS_PRODUCT

#define APP_USBD_STRINGS_PRODUCT   APP_USBD_STRING_DESC("nRF52 USB Product")

◆ APP_USBD_STRINGS_PRODUCT_EXTERN

#define APP_USBD_STRINGS_PRODUCT_EXTERN   0

◆ APP_USBD_STRINGS_USER

#define APP_USBD_STRINGS_USER   X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))

◆ APP_USBD_VID

#define APP_USBD_VID   0

◆ BLE_ADV_BLE_OBSERVER_PRIO

#define BLE_ADV_BLE_OBSERVER_PRIO   1

◆ BLE_ADVERTISING_ENABLED

#define BLE_ADVERTISING_ENABLED   1

◆ BLE_ANCS_C_BLE_OBSERVER_PRIO

#define BLE_ANCS_C_BLE_OBSERVER_PRIO   2

◆ BLE_ANCS_C_ENABLED

#define BLE_ANCS_C_ENABLED   0

◆ BLE_ANS_C_BLE_OBSERVER_PRIO

#define BLE_ANS_C_BLE_OBSERVER_PRIO   2

◆ BLE_ANS_C_ENABLED

#define BLE_ANS_C_ENABLED   0

◆ BLE_BAS_BLE_OBSERVER_PRIO

#define BLE_BAS_BLE_OBSERVER_PRIO   2

◆ BLE_BAS_C_BLE_OBSERVER_PRIO

#define BLE_BAS_C_BLE_OBSERVER_PRIO   2

◆ BLE_BAS_C_ENABLED

#define BLE_BAS_C_ENABLED   0

◆ BLE_BAS_CONFIG_DEBUG_COLOR

#define BLE_BAS_CONFIG_DEBUG_COLOR   0

◆ BLE_BAS_CONFIG_INFO_COLOR

#define BLE_BAS_CONFIG_INFO_COLOR   0

◆ BLE_BAS_CONFIG_LOG_ENABLED

#define BLE_BAS_CONFIG_LOG_ENABLED   0

◆ BLE_BAS_CONFIG_LOG_LEVEL

#define BLE_BAS_CONFIG_LOG_LEVEL   3

◆ BLE_BAS_ENABLED

#define BLE_BAS_ENABLED   0

◆ BLE_BPS_BLE_OBSERVER_PRIO

#define BLE_BPS_BLE_OBSERVER_PRIO   2

◆ BLE_CONN_PARAMS_BLE_OBSERVER_PRIO

#define BLE_CONN_PARAMS_BLE_OBSERVER_PRIO   1

◆ BLE_CONN_STATE_BLE_OBSERVER_PRIO

#define BLE_CONN_STATE_BLE_OBSERVER_PRIO   0

◆ BLE_CSCS_BLE_OBSERVER_PRIO

#define BLE_CSCS_BLE_OBSERVER_PRIO   2

◆ BLE_CSCS_ENABLED

#define BLE_CSCS_ENABLED   0

◆ BLE_CTS_C_BLE_OBSERVER_PRIO

#define BLE_CTS_C_BLE_OBSERVER_PRIO   2

◆ BLE_CTS_C_ENABLED

#define BLE_CTS_C_ENABLED   0

◆ BLE_DB_DISC_BLE_OBSERVER_PRIO

#define BLE_DB_DISC_BLE_OBSERVER_PRIO   1

◆ BLE_DFU_BLE_OBSERVER_PRIO

#define BLE_DFU_BLE_OBSERVER_PRIO   2

◆ BLE_DFU_ENABLED

#define BLE_DFU_ENABLED   0

◆ BLE_DFU_SOC_OBSERVER_PRIO

#define BLE_DFU_SOC_OBSERVER_PRIO   1

◆ BLE_DIS_C_BLE_OBSERVER_PRIO

#define BLE_DIS_C_BLE_OBSERVER_PRIO   2

◆ BLE_DIS_ENABLED

#define BLE_DIS_ENABLED   0

◆ BLE_DTM_ENABLED

#define BLE_DTM_ENABLED   0

◆ BLE_GLS_BLE_OBSERVER_PRIO

#define BLE_GLS_BLE_OBSERVER_PRIO   2

◆ BLE_GLS_ENABLED

#define BLE_GLS_ENABLED   0

◆ BLE_HIDS_BLE_OBSERVER_PRIO

#define BLE_HIDS_BLE_OBSERVER_PRIO   2

◆ BLE_HIDS_ENABLED

#define BLE_HIDS_ENABLED   0

◆ BLE_HRS_BLE_OBSERVER_PRIO

#define BLE_HRS_BLE_OBSERVER_PRIO   2

◆ BLE_HRS_C_BLE_OBSERVER_PRIO

#define BLE_HRS_C_BLE_OBSERVER_PRIO   2

◆ BLE_HRS_C_ENABLED

#define BLE_HRS_C_ENABLED   0

◆ BLE_HRS_ENABLED

#define BLE_HRS_ENABLED   0

◆ BLE_HTS_BLE_OBSERVER_PRIO

#define BLE_HTS_BLE_OBSERVER_PRIO   2

◆ BLE_HTS_ENABLED

#define BLE_HTS_ENABLED   0

◆ BLE_IAS_BLE_OBSERVER_PRIO

#define BLE_IAS_BLE_OBSERVER_PRIO   2

◆ BLE_IAS_C_BLE_OBSERVER_PRIO

#define BLE_IAS_C_BLE_OBSERVER_PRIO   2

◆ BLE_IAS_C_ENABLED

#define BLE_IAS_C_ENABLED   0

◆ BLE_IAS_CONFIG_DEBUG_COLOR

#define BLE_IAS_CONFIG_DEBUG_COLOR   0

◆ BLE_IAS_CONFIG_INFO_COLOR

#define BLE_IAS_CONFIG_INFO_COLOR   0

◆ BLE_IAS_CONFIG_LOG_ENABLED

#define BLE_IAS_CONFIG_LOG_ENABLED   0

◆ BLE_IAS_CONFIG_LOG_LEVEL

#define BLE_IAS_CONFIG_LOG_LEVEL   3

◆ BLE_IAS_ENABLED

#define BLE_IAS_ENABLED   0

◆ BLE_LBS_BLE_OBSERVER_PRIO

#define BLE_LBS_BLE_OBSERVER_PRIO   2

◆ BLE_LBS_C_BLE_OBSERVER_PRIO

#define BLE_LBS_C_BLE_OBSERVER_PRIO   2

◆ BLE_LBS_C_ENABLED

#define BLE_LBS_C_ENABLED   0

◆ BLE_LBS_ENABLED

#define BLE_LBS_ENABLED   0

◆ BLE_LLS_BLE_OBSERVER_PRIO

#define BLE_LLS_BLE_OBSERVER_PRIO   2

◆ BLE_LLS_ENABLED

#define BLE_LLS_ENABLED   0

◆ BLE_LNS_BLE_OBSERVER_PRIO

#define BLE_LNS_BLE_OBSERVER_PRIO   2

◆ BLE_NFC_SEC_PARAM_BOND

#define BLE_NFC_SEC_PARAM_BOND   1

◆ BLE_NFC_SEC_PARAM_KDIST_OWN_ENC

#define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC   1

◆ BLE_NFC_SEC_PARAM_KDIST_OWN_ID

#define BLE_NFC_SEC_PARAM_KDIST_OWN_ID   1

◆ BLE_NFC_SEC_PARAM_KDIST_PEER_ENC

#define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC   1

◆ BLE_NFC_SEC_PARAM_KDIST_PEER_ID

#define BLE_NFC_SEC_PARAM_KDIST_PEER_ID   1

◆ BLE_NFC_SEC_PARAM_MAX_KEY_SIZE

#define BLE_NFC_SEC_PARAM_MAX_KEY_SIZE   16

◆ BLE_NFC_SEC_PARAM_MIN_KEY_SIZE

#define BLE_NFC_SEC_PARAM_MIN_KEY_SIZE   7

◆ BLE_NUS_BLE_OBSERVER_PRIO

#define BLE_NUS_BLE_OBSERVER_PRIO   2

◆ BLE_NUS_C_BLE_OBSERVER_PRIO

#define BLE_NUS_C_BLE_OBSERVER_PRIO   2

◆ BLE_NUS_C_ENABLED

#define BLE_NUS_C_ENABLED   0

◆ BLE_NUS_CONFIG_DEBUG_COLOR

#define BLE_NUS_CONFIG_DEBUG_COLOR   3

◆ BLE_NUS_CONFIG_INFO_COLOR

#define BLE_NUS_CONFIG_INFO_COLOR   0

◆ BLE_NUS_CONFIG_LOG_ENABLED

#define BLE_NUS_CONFIG_LOG_ENABLED   1

◆ BLE_NUS_CONFIG_LOG_LEVEL

#define BLE_NUS_CONFIG_LOG_LEVEL   4

◆ BLE_NUS_ENABLED

#define BLE_NUS_ENABLED   1

◆ BLE_OTS_BLE_OBSERVER_PRIO

#define BLE_OTS_BLE_OBSERVER_PRIO   2

◆ BLE_OTS_C_BLE_OBSERVER_PRIO

#define BLE_OTS_C_BLE_OBSERVER_PRIO   2

◆ BLE_RACP_ENABLED

#define BLE_RACP_ENABLED   0

◆ BLE_RSCS_BLE_OBSERVER_PRIO

#define BLE_RSCS_BLE_OBSERVER_PRIO   2

◆ BLE_RSCS_C_BLE_OBSERVER_PRIO

#define BLE_RSCS_C_BLE_OBSERVER_PRIO   2

◆ BLE_RSCS_C_ENABLED

#define BLE_RSCS_C_ENABLED   0

◆ BLE_RSCS_ENABLED

#define BLE_RSCS_ENABLED   0

◆ BLE_TPS_BLE_OBSERVER_PRIO

#define BLE_TPS_BLE_OBSERVER_PRIO   2

◆ BLE_TPS_ENABLED

#define BLE_TPS_ENABLED   0

◆ BSP_BTN_BLE_ENABLED

#define BSP_BTN_BLE_ENABLED   1

◆ BSP_BTN_BLE_OBSERVER_PRIO

#define BSP_BTN_BLE_OBSERVER_PRIO   1

◆ BUTTON_ENABLED

#define BUTTON_ENABLED   1

◆ BUTTON_HIGH_ACCURACY_ENABLED

#define BUTTON_HIGH_ACCURACY_ENABLED   0

◆ CC_STORAGE_BUFF_SIZE

#define CC_STORAGE_BUFF_SIZE   64

◆ CLOCK_CONFIG_DEBUG_COLOR

#define CLOCK_CONFIG_DEBUG_COLOR   0

◆ CLOCK_CONFIG_INFO_COLOR

#define CLOCK_CONFIG_INFO_COLOR   0

◆ CLOCK_CONFIG_IRQ_PRIORITY

#define CLOCK_CONFIG_IRQ_PRIORITY   6

◆ CLOCK_CONFIG_LF_CAL_ENABLED

#define CLOCK_CONFIG_LF_CAL_ENABLED   0

◆ CLOCK_CONFIG_LF_SRC

#define CLOCK_CONFIG_LF_SRC   1

◆ CLOCK_CONFIG_LOG_ENABLED

#define CLOCK_CONFIG_LOG_ENABLED   0

◆ CLOCK_CONFIG_LOG_LEVEL

#define CLOCK_CONFIG_LOG_LEVEL   3

◆ CLOCK_CONFIG_SOC_OBSERVER_PRIO

#define CLOCK_CONFIG_SOC_OBSERVER_PRIO   0

◆ CLOCK_CONFIG_STATE_OBSERVER_PRIO

#define CLOCK_CONFIG_STATE_OBSERVER_PRIO   0

◆ COMP_CONFIG_DEBUG_COLOR

#define COMP_CONFIG_DEBUG_COLOR   0

◆ COMP_CONFIG_HYST

#define COMP_CONFIG_HYST   0

◆ COMP_CONFIG_INFO_COLOR

#define COMP_CONFIG_INFO_COLOR   0

◆ COMP_CONFIG_INPUT

#define COMP_CONFIG_INPUT   0

◆ COMP_CONFIG_IRQ_PRIORITY

#define COMP_CONFIG_IRQ_PRIORITY   6

◆ COMP_CONFIG_ISOURCE

#define COMP_CONFIG_ISOURCE   0

◆ COMP_CONFIG_LOG_ENABLED

#define COMP_CONFIG_LOG_ENABLED   0

◆ COMP_CONFIG_LOG_LEVEL

#define COMP_CONFIG_LOG_LEVEL   3

◆ COMP_CONFIG_MAIN_MODE

#define COMP_CONFIG_MAIN_MODE   0

◆ COMP_CONFIG_REF

#define COMP_CONFIG_REF   1

◆ COMP_CONFIG_SPEED_MODE

#define COMP_CONFIG_SPEED_MODE   2

◆ COMP_ENABLED

#define COMP_ENABLED   0

◆ CRC16_ENABLED

#define CRC16_ENABLED   1

◆ CRC32_ENABLED

#define CRC32_ENABLED   0

◆ ECC_ENABLED

#define ECC_ENABLED   0

◆ EGU_ENABLED

#define EGU_ENABLED   0

◆ FDS_BACKEND

#define FDS_BACKEND   2

◆ FDS_CRC_CHECK_ON_READ

#define FDS_CRC_CHECK_ON_READ   0

◆ FDS_CRC_CHECK_ON_WRITE

#define FDS_CRC_CHECK_ON_WRITE   0

◆ FDS_ENABLED

#define FDS_ENABLED   1

◆ FDS_MAX_USERS

#define FDS_MAX_USERS   4

◆ FDS_OP_QUEUE_SIZE

#define FDS_OP_QUEUE_SIZE   4

◆ FDS_VIRTUAL_PAGE_SIZE

#define FDS_VIRTUAL_PAGE_SIZE   1024

◆ FDS_VIRTUAL_PAGES

#define FDS_VIRTUAL_PAGES   3

◆ FDS_VIRTUAL_PAGES_RESERVED

#define FDS_VIRTUAL_PAGES_RESERVED   0

◆ GPIOTE_CONFIG_DEBUG_COLOR

#define GPIOTE_CONFIG_DEBUG_COLOR   0

◆ GPIOTE_CONFIG_INFO_COLOR

#define GPIOTE_CONFIG_INFO_COLOR   0

◆ GPIOTE_CONFIG_IRQ_PRIORITY

#define GPIOTE_CONFIG_IRQ_PRIORITY   7

◆ GPIOTE_CONFIG_LOG_ENABLED

#define GPIOTE_CONFIG_LOG_ENABLED   0

◆ GPIOTE_CONFIG_LOG_LEVEL

#define GPIOTE_CONFIG_LOG_LEVEL   3

◆ GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS

#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS   4

◆ GPIOTE_ENABLED

#define GPIOTE_ENABLED   1

◆ HARDFAULT_HANDLER_ENABLED

#define HARDFAULT_HANDLER_ENABLED   0

◆ HCI_MAX_PACKET_SIZE_IN_BITS

#define HCI_MAX_PACKET_SIZE_IN_BITS   8000

◆ HCI_MEM_POOL_ENABLED

#define HCI_MEM_POOL_ENABLED   0

◆ HCI_RX_BUF_QUEUE_SIZE

#define HCI_RX_BUF_QUEUE_SIZE   4

◆ HCI_RX_BUF_SIZE

#define HCI_RX_BUF_SIZE   600

◆ HCI_SLIP_ENABLED

#define HCI_SLIP_ENABLED   0

◆ HCI_TRANSPORT_ENABLED

#define HCI_TRANSPORT_ENABLED   0

◆ HCI_TX_BUF_SIZE

#define HCI_TX_BUF_SIZE   600

◆ HCI_UART_BAUDRATE

#define HCI_UART_BAUDRATE   30801920

◆ HCI_UART_CTS_PIN

#define HCI_UART_CTS_PIN   7

◆ HCI_UART_FLOW_CONTROL

#define HCI_UART_FLOW_CONTROL   0

◆ HCI_UART_RTS_PIN

#define HCI_UART_RTS_PIN   5

◆ HCI_UART_RX_PIN

#define HCI_UART_RX_PIN   8

◆ HCI_UART_TX_PIN

#define HCI_UART_TX_PIN   6

◆ I2S_CONFIG_ALIGN

#define I2S_CONFIG_ALIGN   0

◆ I2S_CONFIG_CHANNELS

#define I2S_CONFIG_CHANNELS   1

◆ I2S_CONFIG_DEBUG_COLOR

#define I2S_CONFIG_DEBUG_COLOR   0

◆ I2S_CONFIG_FORMAT

#define I2S_CONFIG_FORMAT   0

◆ I2S_CONFIG_INFO_COLOR

#define I2S_CONFIG_INFO_COLOR   0

◆ I2S_CONFIG_IRQ_PRIORITY

#define I2S_CONFIG_IRQ_PRIORITY   6

◆ I2S_CONFIG_LOG_ENABLED

#define I2S_CONFIG_LOG_ENABLED   0

◆ I2S_CONFIG_LOG_LEVEL

#define I2S_CONFIG_LOG_LEVEL   3

◆ I2S_CONFIG_LRCK_PIN

#define I2S_CONFIG_LRCK_PIN   30

◆ I2S_CONFIG_MASTER

#define I2S_CONFIG_MASTER   0

◆ I2S_CONFIG_MCK_PIN

#define I2S_CONFIG_MCK_PIN   255

◆ I2S_CONFIG_MCK_SETUP

#define I2S_CONFIG_MCK_SETUP   536870912

◆ I2S_CONFIG_RATIO

#define I2S_CONFIG_RATIO   2000

◆ I2S_CONFIG_SCK_PIN

#define I2S_CONFIG_SCK_PIN   31

◆ I2S_CONFIG_SDIN_PIN

#define I2S_CONFIG_SDIN_PIN   28

◆ I2S_CONFIG_SDOUT_PIN

#define I2S_CONFIG_SDOUT_PIN   29

◆ I2S_CONFIG_SWIDTH

#define I2S_CONFIG_SWIDTH   1

◆ I2S_ENABLED

#define I2S_ENABLED   0

◆ LED_SOFTBLINK_ENABLED

#define LED_SOFTBLINK_ENABLED   0

◆ LOW_POWER_PWM_ENABLED

#define LOW_POWER_PWM_ENABLED   0

◆ LPCOMP_CONFIG_DEBUG_COLOR

#define LPCOMP_CONFIG_DEBUG_COLOR   0

◆ LPCOMP_CONFIG_DETECTION

#define LPCOMP_CONFIG_DETECTION   2

◆ LPCOMP_CONFIG_HYST

#define LPCOMP_CONFIG_HYST   0

◆ LPCOMP_CONFIG_INFO_COLOR

#define LPCOMP_CONFIG_INFO_COLOR   0

◆ LPCOMP_CONFIG_INPUT

#define LPCOMP_CONFIG_INPUT   0

◆ LPCOMP_CONFIG_IRQ_PRIORITY

#define LPCOMP_CONFIG_IRQ_PRIORITY   6

◆ LPCOMP_CONFIG_LOG_ENABLED

#define LPCOMP_CONFIG_LOG_ENABLED   0

◆ LPCOMP_CONFIG_LOG_LEVEL

#define LPCOMP_CONFIG_LOG_LEVEL   3

◆ LPCOMP_CONFIG_REFERENCE

#define LPCOMP_CONFIG_REFERENCE   3

◆ LPCOMP_ENABLED

#define LPCOMP_ENABLED   0

◆ MAX3421E_HOST_CONFIG_DEBUG_COLOR

#define MAX3421E_HOST_CONFIG_DEBUG_COLOR   0

◆ MAX3421E_HOST_CONFIG_INFO_COLOR

#define MAX3421E_HOST_CONFIG_INFO_COLOR   0

◆ MAX3421E_HOST_CONFIG_LOG_ENABLED

#define MAX3421E_HOST_CONFIG_LOG_ENABLED   0

◆ MAX3421E_HOST_CONFIG_LOG_LEVEL

#define MAX3421E_HOST_CONFIG_LOG_LEVEL   3

◆ MEASUREMENT_PERIOD

#define MEASUREMENT_PERIOD   20

◆ MEM_MANAGER_CONFIG_DEBUG_COLOR

#define MEM_MANAGER_CONFIG_DEBUG_COLOR   0

◆ MEM_MANAGER_CONFIG_INFO_COLOR

#define MEM_MANAGER_CONFIG_INFO_COLOR   0

◆ MEM_MANAGER_CONFIG_LOG_ENABLED

#define MEM_MANAGER_CONFIG_LOG_ENABLED   0

◆ MEM_MANAGER_CONFIG_LOG_LEVEL

#define MEM_MANAGER_CONFIG_LOG_LEVEL   3

◆ MEM_MANAGER_DISABLE_API_PARAM_CHECK

#define MEM_MANAGER_DISABLE_API_PARAM_CHECK   0

◆ MEM_MANAGER_ENABLED

#define MEM_MANAGER_ENABLED   0

◆ MEMORY_MANAGER_LARGE_BLOCK_COUNT

#define MEMORY_MANAGER_LARGE_BLOCK_COUNT   0

◆ MEMORY_MANAGER_LARGE_BLOCK_SIZE

#define MEMORY_MANAGER_LARGE_BLOCK_SIZE   256

◆ MEMORY_MANAGER_MEDIUM_BLOCK_COUNT

#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT   0

◆ MEMORY_MANAGER_MEDIUM_BLOCK_SIZE

#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE   256

◆ MEMORY_MANAGER_SMALL_BLOCK_COUNT

#define MEMORY_MANAGER_SMALL_BLOCK_COUNT   1

◆ MEMORY_MANAGER_SMALL_BLOCK_SIZE

#define MEMORY_MANAGER_SMALL_BLOCK_SIZE   32

◆ MEMORY_MANAGER_XLARGE_BLOCK_COUNT

#define MEMORY_MANAGER_XLARGE_BLOCK_COUNT   0

◆ MEMORY_MANAGER_XLARGE_BLOCK_SIZE

#define MEMORY_MANAGER_XLARGE_BLOCK_SIZE   1320

◆ MEMORY_MANAGER_XSMALL_BLOCK_COUNT

#define MEMORY_MANAGER_XSMALL_BLOCK_COUNT   0

◆ MEMORY_MANAGER_XSMALL_BLOCK_SIZE

#define MEMORY_MANAGER_XSMALL_BLOCK_SIZE   64

◆ MEMORY_MANAGER_XXLARGE_BLOCK_COUNT

#define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT   0

◆ MEMORY_MANAGER_XXLARGE_BLOCK_SIZE

#define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE   3444

◆ MEMORY_MANAGER_XXSMALL_BLOCK_COUNT

#define MEMORY_MANAGER_XXSMALL_BLOCK_COUNT   0

◆ MEMORY_MANAGER_XXSMALL_BLOCK_SIZE

#define MEMORY_MANAGER_XXSMALL_BLOCK_SIZE   32

◆ NFC_AC_REC_ENABLED

#define NFC_AC_REC_ENABLED   0

◆ NFC_AC_REC_PARSER_ENABLED

#define NFC_AC_REC_PARSER_ENABLED   0

◆ NFC_BLE_OOB_ADVDATA_ENABLED

#define NFC_BLE_OOB_ADVDATA_ENABLED   0

◆ NFC_BLE_OOB_ADVDATA_PARSER_ENABLED

#define NFC_BLE_OOB_ADVDATA_PARSER_ENABLED   0

◆ NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO

#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO   1

◆ NFC_BLE_PAIR_LIB_DEBUG_COLOR

#define NFC_BLE_PAIR_LIB_DEBUG_COLOR   0

◆ NFC_BLE_PAIR_LIB_ENABLED

#define NFC_BLE_PAIR_LIB_ENABLED   0

◆ NFC_BLE_PAIR_LIB_INFO_COLOR

#define NFC_BLE_PAIR_LIB_INFO_COLOR   0

◆ NFC_BLE_PAIR_LIB_LOG_ENABLED

#define NFC_BLE_PAIR_LIB_LOG_ENABLED   0

◆ NFC_BLE_PAIR_LIB_LOG_LEVEL

#define NFC_BLE_PAIR_LIB_LOG_LEVEL   3

◆ NFC_BLE_PAIR_MSG_ENABLED

#define NFC_BLE_PAIR_MSG_ENABLED   0

◆ NFC_CH_COMMON_ENABLED

#define NFC_CH_COMMON_ENABLED   0

◆ NFC_EP_OOB_REC_ENABLED

#define NFC_EP_OOB_REC_ENABLED   0

◆ NFC_HS_REC_ENABLED

#define NFC_HS_REC_ENABLED   0

◆ NFC_LE_OOB_REC_ENABLED

#define NFC_LE_OOB_REC_ENABLED   0

◆ NFC_LE_OOB_REC_PARSER_ENABLED

#define NFC_LE_OOB_REC_PARSER_ENABLED   0

◆ NFC_NDEF_LAUNCHAPP_MSG_ENABLED

#define NFC_NDEF_LAUNCHAPP_MSG_ENABLED   0

◆ NFC_NDEF_LAUNCHAPP_REC_ENABLED

#define NFC_NDEF_LAUNCHAPP_REC_ENABLED   0

◆ NFC_NDEF_MSG_ENABLED

#define NFC_NDEF_MSG_ENABLED   0

◆ NFC_NDEF_MSG_PARSER_ENABLED

#define NFC_NDEF_MSG_PARSER_ENABLED   0

◆ NFC_NDEF_MSG_PARSER_INFO_COLOR

#define NFC_NDEF_MSG_PARSER_INFO_COLOR   0

◆ NFC_NDEF_MSG_PARSER_LOG_ENABLED

#define NFC_NDEF_MSG_PARSER_LOG_ENABLED   0

◆ NFC_NDEF_MSG_PARSER_LOG_LEVEL

#define NFC_NDEF_MSG_PARSER_LOG_LEVEL   3

◆ NFC_NDEF_MSG_TAG_TYPE

#define NFC_NDEF_MSG_TAG_TYPE   2

◆ NFC_NDEF_RECORD_ENABLED

#define NFC_NDEF_RECORD_ENABLED   0

◆ NFC_NDEF_RECORD_PARSER_ENABLED

#define NFC_NDEF_RECORD_PARSER_ENABLED   0

◆ NFC_NDEF_RECORD_PARSER_INFO_COLOR

#define NFC_NDEF_RECORD_PARSER_INFO_COLOR   0

◆ NFC_NDEF_RECORD_PARSER_LOG_ENABLED

#define NFC_NDEF_RECORD_PARSER_LOG_ENABLED   0

◆ NFC_NDEF_RECORD_PARSER_LOG_LEVEL

#define NFC_NDEF_RECORD_PARSER_LOG_LEVEL   3

◆ NFC_NDEF_TEXT_RECORD_ENABLED

#define NFC_NDEF_TEXT_RECORD_ENABLED   0

◆ NFC_NDEF_URI_MSG_ENABLED

#define NFC_NDEF_URI_MSG_ENABLED   0

◆ NFC_NDEF_URI_REC_ENABLED

#define NFC_NDEF_URI_REC_ENABLED   0

◆ NFC_PLATFORM_DEBUG_COLOR

#define NFC_PLATFORM_DEBUG_COLOR   0

◆ NFC_PLATFORM_ENABLED

#define NFC_PLATFORM_ENABLED   0

◆ NFC_PLATFORM_INFO_COLOR

#define NFC_PLATFORM_INFO_COLOR   0

◆ NFC_PLATFORM_LOG_ENABLED

#define NFC_PLATFORM_LOG_ENABLED   0

◆ NFC_PLATFORM_LOG_LEVEL

#define NFC_PLATFORM_LOG_LEVEL   3

◆ NFC_T2T_PARSER_ENABLED

#define NFC_T2T_PARSER_ENABLED   0

◆ NFC_T2T_PARSER_INFO_COLOR

#define NFC_T2T_PARSER_INFO_COLOR   0

◆ NFC_T2T_PARSER_LOG_ENABLED

#define NFC_T2T_PARSER_LOG_ENABLED   0

◆ NFC_T2T_PARSER_LOG_LEVEL

#define NFC_T2T_PARSER_LOG_LEVEL   3

◆ NFC_T4T_APDU_ENABLED

#define NFC_T4T_APDU_ENABLED   0

◆ NFC_T4T_APDU_LOG_COLOR

#define NFC_T4T_APDU_LOG_COLOR   0

◆ NFC_T4T_APDU_LOG_ENABLED

#define NFC_T4T_APDU_LOG_ENABLED   0

◆ NFC_T4T_APDU_LOG_LEVEL

#define NFC_T4T_APDU_LOG_LEVEL   3

◆ NFC_T4T_CC_FILE_PARSER_ENABLED

#define NFC_T4T_CC_FILE_PARSER_ENABLED   0

◆ NFC_T4T_CC_FILE_PARSER_INFO_COLOR

#define NFC_T4T_CC_FILE_PARSER_INFO_COLOR   0

◆ NFC_T4T_CC_FILE_PARSER_LOG_ENABLED

#define NFC_T4T_CC_FILE_PARSER_LOG_ENABLED   0

◆ NFC_T4T_CC_FILE_PARSER_LOG_LEVEL

#define NFC_T4T_CC_FILE_PARSER_LOG_LEVEL   3

◆ NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED

#define NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED   0

◆ NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR

#define NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR   0

◆ NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED

#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED   0

◆ NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL

#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL   3

◆ NFC_T4T_TLV_BLOCK_PARSER_ENABLED

#define NFC_T4T_TLV_BLOCK_PARSER_ENABLED   0

◆ NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR

#define NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR   0

◆ NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED

#define NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED   0

◆ NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL

#define NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL   3

◆ NRF_ATFIFO_CONFIG_DEBUG_COLOR

#define NRF_ATFIFO_CONFIG_DEBUG_COLOR   0

◆ NRF_ATFIFO_CONFIG_INFO_COLOR

#define NRF_ATFIFO_CONFIG_INFO_COLOR   0

◆ NRF_ATFIFO_CONFIG_LOG_ENABLED

#define NRF_ATFIFO_CONFIG_LOG_ENABLED   1

◆ NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL

#define NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL   3

◆ NRF_ATFIFO_CONFIG_LOG_LEVEL

#define NRF_ATFIFO_CONFIG_LOG_LEVEL   3

◆ NRF_BALLOC_CLI_CMDS

#define NRF_BALLOC_CLI_CMDS   0

◆ NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED

#define NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED   0

◆ NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED

#define NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED   0

◆ NRF_BALLOC_CONFIG_DEBUG_COLOR

#define NRF_BALLOC_CONFIG_DEBUG_COLOR   0

◆ NRF_BALLOC_CONFIG_DEBUG_ENABLED

#define NRF_BALLOC_CONFIG_DEBUG_ENABLED   0

◆ NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED

#define NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED   0

◆ NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS

#define NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS   1

◆ NRF_BALLOC_CONFIG_INFO_COLOR

#define NRF_BALLOC_CONFIG_INFO_COLOR   0

◆ NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL

#define NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL   3

◆ NRF_BALLOC_CONFIG_LOG_ENABLED

#define NRF_BALLOC_CONFIG_LOG_ENABLED   0

◆ NRF_BALLOC_CONFIG_LOG_LEVEL

#define NRF_BALLOC_CONFIG_LOG_LEVEL   3

◆ NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS

#define NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS   1

◆ NRF_BALLOC_ENABLED

#define NRF_BALLOC_ENABLED   1

◆ NRF_BLE_BMS_BLE_OBSERVER_PRIO

#define NRF_BLE_BMS_BLE_OBSERVER_PRIO   2

◆ NRF_BLE_CGMS_BLE_OBSERVER_PRIO

#define NRF_BLE_CGMS_BLE_OBSERVER_PRIO   2

◆ NRF_BLE_CONN_PARAMS_ENABLED

#define NRF_BLE_CONN_PARAMS_ENABLED   1

◆ NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION

#define NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION   499

◆ NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION

#define NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION   65535

◆ NRF_BLE_ES_BLE_OBSERVER_PRIO

#define NRF_BLE_ES_BLE_OBSERVER_PRIO   2

◆ NRF_BLE_GATT_BLE_OBSERVER_PRIO

#define NRF_BLE_GATT_BLE_OBSERVER_PRIO   3

◆ NRF_BLE_GATT_ENABLED

#define NRF_BLE_GATT_ENABLED   1

◆ NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO

#define NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO   2

◆ NRF_BLE_GQ_BLE_OBSERVER_PRIO

#define NRF_BLE_GQ_BLE_OBSERVER_PRIO   1

◆ NRF_BLE_QWR_BLE_OBSERVER_PRIO

#define NRF_BLE_QWR_BLE_OBSERVER_PRIO   3

◆ NRF_BLE_QWR_ENABLED

#define NRF_BLE_QWR_ENABLED   1

◆ NRF_BLE_QWR_MAX_ATTR

#define NRF_BLE_QWR_MAX_ATTR   6

◆ NRF_BLE_SCAN_OBSERVER_PRIO

#define NRF_BLE_SCAN_OBSERVER_PRIO   1

◆ NRF_BLOCK_DEV_EMPTY_CONFIG_DEBUG_COLOR

#define NRF_BLOCK_DEV_EMPTY_CONFIG_DEBUG_COLOR   0

◆ NRF_BLOCK_DEV_EMPTY_CONFIG_INFO_COLOR

#define NRF_BLOCK_DEV_EMPTY_CONFIG_INFO_COLOR   0

◆ NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_ENABLED

#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_ENABLED   0

◆ NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_INIT_FILTER_LEVEL

#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_INIT_FILTER_LEVEL   3

◆ NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_LEVEL

#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_LEVEL   3

◆ NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR

#define NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR   0

◆ NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR

#define NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR   0

◆ NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED

#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED   0

◆ NRF_BLOCK_DEV_QSPI_CONFIG_LOG_INIT_FILTER_LEVEL

#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_INIT_FILTER_LEVEL   3

◆ NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL

#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL   3

◆ NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR

#define NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR   0

◆ NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR

#define NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR   0

◆ NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED

#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED   0

◆ NRF_BLOCK_DEV_RAM_CONFIG_LOG_INIT_FILTER_LEVEL

#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_INIT_FILTER_LEVEL   3

◆ NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL

#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL   3

◆ NRF_CLI_ARGC_MAX

#define NRF_CLI_ARGC_MAX   12

◆ NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR

#define NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR   0

◆ NRF_CLI_BLE_UART_CONFIG_INFO_COLOR

#define NRF_CLI_BLE_UART_CONFIG_INFO_COLOR   0

◆ NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED

#define NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED   0

◆ NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL

#define NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL   3

◆ NRF_CLI_BUILD_IN_CMDS_ENABLED

#define NRF_CLI_BUILD_IN_CMDS_ENABLED   1

◆ NRF_CLI_CMD_BUFF_SIZE

#define NRF_CLI_CMD_BUFF_SIZE   128

◆ NRF_CLI_ECHO_STATUS

#define NRF_CLI_ECHO_STATUS   1

◆ NRF_CLI_ENABLED

#define NRF_CLI_ENABLED   0

◆ NRF_CLI_HISTORY_ELEMENT_COUNT

#define NRF_CLI_HISTORY_ELEMENT_COUNT   8

◆ NRF_CLI_HISTORY_ELEMENT_SIZE

#define NRF_CLI_HISTORY_ELEMENT_SIZE   32

◆ NRF_CLI_HISTORY_ENABLED

#define NRF_CLI_HISTORY_ENABLED   1

◆ NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR

#define NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR   0

◆ NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR

#define NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR   0

◆ NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED

#define NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED   0

◆ NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL

#define NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL   3

◆ NRF_CLI_LOG_BACKEND

#define NRF_CLI_LOG_BACKEND   1

◆ NRF_CLI_METAKEYS_ENABLED

#define NRF_CLI_METAKEYS_ENABLED   0

◆ NRF_CLI_PRINTF_BUFF_SIZE

#define NRF_CLI_PRINTF_BUFF_SIZE   23

◆ NRF_CLI_STATISTICS_ENABLED

#define NRF_CLI_STATISTICS_ENABLED   1

◆ NRF_CLI_UART_CONFIG_DEBUG_COLOR

#define NRF_CLI_UART_CONFIG_DEBUG_COLOR   0

◆ NRF_CLI_UART_CONFIG_INFO_COLOR

#define NRF_CLI_UART_CONFIG_INFO_COLOR   0

◆ NRF_CLI_UART_CONFIG_LOG_ENABLED

#define NRF_CLI_UART_CONFIG_LOG_ENABLED   0

◆ NRF_CLI_UART_CONFIG_LOG_LEVEL

#define NRF_CLI_UART_CONFIG_LOG_LEVEL   3

◆ NRF_CLI_USES_TASK_MANAGER_ENABLED

#define NRF_CLI_USES_TASK_MANAGER_ENABLED   0

◆ NRF_CLI_VT100_COLORS_ENABLED

#define NRF_CLI_VT100_COLORS_ENABLED   1

◆ NRF_CLI_WILDCARD_ENABLED

#define NRF_CLI_WILDCARD_ENABLED   0

◆ NRF_CLOCK_ENABLED

#define NRF_CLOCK_ENABLED   1

◆ NRF_CRYPTO_ALLOCATOR

#define NRF_CRYPTO_ALLOCATOR   0

◆ NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED   0

◆ NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_BL_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_BL_ENABLED   0

◆ NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED   0

◆ NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE

#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE   4096

◆ NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_BL_INTERRUPTS_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_BL_INTERRUPTS_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_ENABLED   0

◆ NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_INTERRUPTS_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_INTERRUPTS_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED

#define NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED

#define NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED   1

◆ NRF_CRYPTO_BACKEND_CIFRA_ENABLED

#define NRF_CRYPTO_BACKEND_CIFRA_ENABLED   0

◆ NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED   0

◆ NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED

#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED

#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED

#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED

#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED

#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED

#define NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED   0

◆ NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED

#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED   0

◆ NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED

#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED   1

◆ NRF_CRYPTO_BACKEND_NRF_SW_ENABLED

#define NRF_CRYPTO_BACKEND_NRF_SW_ENABLED   0

◆ NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED

#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED

#define NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED

#define NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED

#define NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED

#define NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OBERON_ENABLED

#define NRF_CRYPTO_BACKEND_OBERON_ENABLED   0

◆ NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED

#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED

#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED

#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED

#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OPTIGA_ECC_SECP256R1_ENABLED

#define NRF_CRYPTO_BACKEND_OPTIGA_ECC_SECP256R1_ENABLED   1

◆ NRF_CRYPTO_BACKEND_OPTIGA_ENABLED

#define NRF_CRYPTO_BACKEND_OPTIGA_ENABLED   0

◆ NRF_CRYPTO_BACKEND_OPTIGA_RNG_ENABLED

#define NRF_CRYPTO_BACKEND_OPTIGA_RNG_ENABLED   0

◆ NRF_CRYPTO_CURVE25519_BIG_ENDIAN_ENABLED

#define NRF_CRYPTO_CURVE25519_BIG_ENDIAN_ENABLED   0

◆ NRF_CRYPTO_ENABLED

#define NRF_CRYPTO_ENABLED   1

◆ NRF_CSENSE_ENABLED

#define NRF_CSENSE_ENABLED   0

◆ NRF_CSENSE_MAX_PADS_NUMBER

#define NRF_CSENSE_MAX_PADS_NUMBER   20

◆ NRF_CSENSE_MAX_VALUE

#define NRF_CSENSE_MAX_VALUE   1000

◆ NRF_CSENSE_MIN_PAD_VALUE

#define NRF_CSENSE_MIN_PAD_VALUE   20

◆ NRF_CSENSE_OUTPUT_PIN

#define NRF_CSENSE_OUTPUT_PIN   26

◆ NRF_CSENSE_PAD_DEVIATION

#define NRF_CSENSE_PAD_DEVIATION   70

◆ NRF_CSENSE_PAD_HYSTERESIS

#define NRF_CSENSE_PAD_HYSTERESIS   15

◆ NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS

#define NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS   0

◆ NRF_DRV_CSENSE_ENABLED

#define NRF_DRV_CSENSE_ENABLED   0

◆ NRF_FPRINTF_DOUBLE_ENABLED

#define NRF_FPRINTF_DOUBLE_ENABLED   0

◆ NRF_FPRINTF_ENABLED

#define NRF_FPRINTF_ENABLED   1

◆ NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED

#define NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED   1

◆ NRF_FSTORAGE_ENABLED

#define NRF_FSTORAGE_ENABLED   1

◆ NRF_FSTORAGE_PARAM_CHECK_DISABLED

#define NRF_FSTORAGE_PARAM_CHECK_DISABLED   0

◆ NRF_FSTORAGE_SD_MAX_RETRIES

#define NRF_FSTORAGE_SD_MAX_RETRIES   8

◆ NRF_FSTORAGE_SD_MAX_WRITE_SIZE

#define NRF_FSTORAGE_SD_MAX_WRITE_SIZE   4096

◆ NRF_FSTORAGE_SD_QUEUE_SIZE

#define NRF_FSTORAGE_SD_QUEUE_SIZE   4

◆ NRF_GFX_ENABLED

#define NRF_GFX_ENABLED   0

◆ NRF_LIBUARTE_CONFIG_DEBUG_COLOR

#define NRF_LIBUARTE_CONFIG_DEBUG_COLOR   0

◆ NRF_LIBUARTE_CONFIG_INFO_COLOR

#define NRF_LIBUARTE_CONFIG_INFO_COLOR   0

◆ NRF_LIBUARTE_CONFIG_LOG_ENABLED

#define NRF_LIBUARTE_CONFIG_LOG_ENABLED   0

◆ NRF_LIBUARTE_CONFIG_LOG_LEVEL

#define NRF_LIBUARTE_CONFIG_LOG_LEVEL   3

◆ NRF_LOG_ALLOW_OVERFLOW

#define NRF_LOG_ALLOW_OVERFLOW   1

◆ NRF_LOG_BACKEND_RTT_ENABLED

#define NRF_LOG_BACKEND_RTT_ENABLED   1

◆ NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE

#define NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE   64

◆ NRF_LOG_BACKEND_RTT_TX_RETRY_CNT

#define NRF_LOG_BACKEND_RTT_TX_RETRY_CNT   3

◆ NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS

#define NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS   1

◆ NRF_LOG_BACKEND_UART_BAUDRATE

#define NRF_LOG_BACKEND_UART_BAUDRATE   30801920

◆ NRF_LOG_BACKEND_UART_ENABLED

#define NRF_LOG_BACKEND_UART_ENABLED   0

◆ NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE

#define NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE   64

◆ NRF_LOG_BACKEND_UART_TX_PIN

#define NRF_LOG_BACKEND_UART_TX_PIN   6

◆ NRF_LOG_BUFSIZE

#define NRF_LOG_BUFSIZE   1024

◆ NRF_LOG_CLI_CMDS

#define NRF_LOG_CLI_CMDS   1

◆ NRF_LOG_COLOR_DEFAULT

#define NRF_LOG_COLOR_DEFAULT   0

◆ NRF_LOG_DEFAULT_LEVEL

#define NRF_LOG_DEFAULT_LEVEL   4

◆ NRF_LOG_DEFERRED

#define NRF_LOG_DEFERRED   0

◆ NRF_LOG_ENABLED

#define NRF_LOG_ENABLED   1

◆ NRF_LOG_ERROR_COLOR

#define NRF_LOG_ERROR_COLOR   2

◆ NRF_LOG_FILTERS_ENABLED

#define NRF_LOG_FILTERS_ENABLED   0

◆ NRF_LOG_MSGPOOL_ELEMENT_COUNT

#define NRF_LOG_MSGPOOL_ELEMENT_COUNT   8

◆ NRF_LOG_MSGPOOL_ELEMENT_SIZE

#define NRF_LOG_MSGPOOL_ELEMENT_SIZE   20

◆ NRF_LOG_NON_DEFFERED_CRITICAL_REGION_ENABLED

#define NRF_LOG_NON_DEFFERED_CRITICAL_REGION_ENABLED   0

◆ NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED

#define NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED   1

◆ NRF_LOG_STR_PUSH_BUFFER_SIZE

#define NRF_LOG_STR_PUSH_BUFFER_SIZE   128

◆ NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY

#define NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY   0

◆ NRF_LOG_USES_COLORS

#define NRF_LOG_USES_COLORS   1

◆ NRF_LOG_USES_TIMESTAMP

#define NRF_LOG_USES_TIMESTAMP   0

◆ NRF_LOG_WARNING_COLOR

#define NRF_LOG_WARNING_COLOR   4

◆ NRF_MAXIMUM_LATENCY_US

#define NRF_MAXIMUM_LATENCY_US   2000

◆ NRF_MEMOBJ_CONFIG_DEBUG_COLOR

#define NRF_MEMOBJ_CONFIG_DEBUG_COLOR   0

◆ NRF_MEMOBJ_CONFIG_INFO_COLOR

#define NRF_MEMOBJ_CONFIG_INFO_COLOR   0

◆ NRF_MEMOBJ_CONFIG_LOG_ENABLED

#define NRF_MEMOBJ_CONFIG_LOG_ENABLED   0

◆ NRF_MEMOBJ_CONFIG_LOG_LEVEL

#define NRF_MEMOBJ_CONFIG_LOG_LEVEL   3

◆ NRF_MEMOBJ_ENABLED

#define NRF_MEMOBJ_ENABLED   1

◆ NRF_MPU_LIB_CLI_CMDS

#define NRF_MPU_LIB_CLI_CMDS   0

◆ NRF_MPU_LIB_CONFIG_DEBUG_COLOR

#define NRF_MPU_LIB_CONFIG_DEBUG_COLOR   0

◆ NRF_MPU_LIB_CONFIG_INFO_COLOR

#define NRF_MPU_LIB_CONFIG_INFO_COLOR   0

◆ NRF_MPU_LIB_CONFIG_LOG_ENABLED

#define NRF_MPU_LIB_CONFIG_LOG_ENABLED   1

◆ NRF_MPU_LIB_CONFIG_LOG_LEVEL

#define NRF_MPU_LIB_CONFIG_LOG_LEVEL   3

◆ NRF_MPU_LIB_ENABLED

#define NRF_MPU_LIB_ENABLED   0

◆ NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY

#define NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY   1

◆ NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED

#define NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED   0

◆ NRF_PWR_MGMT_CONFIG_DEBUG_COLOR

#define NRF_PWR_MGMT_CONFIG_DEBUG_COLOR   0

◆ NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED

#define NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED   0

◆ NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED

#define NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED   1

◆ NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT

#define NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT   3

◆ NRF_PWR_MGMT_CONFIG_INFO_COLOR

#define NRF_PWR_MGMT_CONFIG_INFO_COLOR   0

◆ NRF_PWR_MGMT_CONFIG_LOG_ENABLED

#define NRF_PWR_MGMT_CONFIG_LOG_ENABLED   0

◆ NRF_PWR_MGMT_CONFIG_LOG_LEVEL

#define NRF_PWR_MGMT_CONFIG_LOG_LEVEL   3

◆ NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED

#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED   0

◆ NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S

#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S   3

◆ NRF_PWR_MGMT_CONFIG_USE_SCHEDULER

#define NRF_PWR_MGMT_CONFIG_USE_SCHEDULER   0

◆ NRF_PWR_MGMT_ENABLED

#define NRF_PWR_MGMT_ENABLED   1

◆ NRF_PWR_MGMT_SLEEP_DEBUG_PIN

#define NRF_PWR_MGMT_SLEEP_DEBUG_PIN   31

◆ NRF_QUEUE_CLI_CMDS

#define NRF_QUEUE_CLI_CMDS   0

◆ NRF_QUEUE_CONFIG_DEBUG_COLOR

#define NRF_QUEUE_CONFIG_DEBUG_COLOR   0

◆ NRF_QUEUE_CONFIG_INFO_COLOR

#define NRF_QUEUE_CONFIG_INFO_COLOR   0

◆ NRF_QUEUE_CONFIG_LOG_ENABLED

#define NRF_QUEUE_CONFIG_LOG_ENABLED   0

◆ NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL

#define NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL   3

◆ NRF_QUEUE_CONFIG_LOG_LEVEL

#define NRF_QUEUE_CONFIG_LOG_LEVEL   3

◆ NRF_QUEUE_ENABLED

#define NRF_QUEUE_ENABLED   0

◆ NRF_SDH_ANT_DEBUG_COLOR

#define NRF_SDH_ANT_DEBUG_COLOR   0

◆ NRF_SDH_ANT_INFO_COLOR

#define NRF_SDH_ANT_INFO_COLOR   0

◆ NRF_SDH_ANT_LOG_ENABLED

#define NRF_SDH_ANT_LOG_ENABLED   0

◆ NRF_SDH_ANT_LOG_LEVEL

#define NRF_SDH_ANT_LOG_LEVEL   3

◆ NRF_SDH_ANT_STACK_OBSERVER_PRIO

#define NRF_SDH_ANT_STACK_OBSERVER_PRIO   0

◆ NRF_SDH_BLE_CENTRAL_LINK_COUNT

#define NRF_SDH_BLE_CENTRAL_LINK_COUNT   0

◆ NRF_SDH_BLE_DEBUG_COLOR

#define NRF_SDH_BLE_DEBUG_COLOR   0

◆ NRF_SDH_BLE_ENABLED

#define NRF_SDH_BLE_ENABLED   1

◆ NRF_SDH_BLE_GAP_DATA_LENGTH

#define NRF_SDH_BLE_GAP_DATA_LENGTH   101

◆ NRF_SDH_BLE_GAP_EVENT_LENGTH

#define NRF_SDH_BLE_GAP_EVENT_LENGTH   40

◆ NRF_SDH_BLE_GATT_MAX_MTU_SIZE

#define NRF_SDH_BLE_GATT_MAX_MTU_SIZE   104

◆ NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE

#define NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE   1408

◆ NRF_SDH_BLE_INFO_COLOR

#define NRF_SDH_BLE_INFO_COLOR   0

◆ NRF_SDH_BLE_LOG_ENABLED

#define NRF_SDH_BLE_LOG_ENABLED   1

◆ NRF_SDH_BLE_LOG_LEVEL

#define NRF_SDH_BLE_LOG_LEVEL   4

◆ NRF_SDH_BLE_OBSERVER_PRIO_LEVELS

#define NRF_SDH_BLE_OBSERVER_PRIO_LEVELS   4

◆ NRF_SDH_BLE_PERIPHERAL_LINK_COUNT

#define NRF_SDH_BLE_PERIPHERAL_LINK_COUNT   1

◆ NRF_SDH_BLE_SERVICE_CHANGED

#define NRF_SDH_BLE_SERVICE_CHANGED   1

◆ NRF_SDH_BLE_STACK_OBSERVER_PRIO

#define NRF_SDH_BLE_STACK_OBSERVER_PRIO   0

◆ NRF_SDH_BLE_TOTAL_LINK_COUNT

#define NRF_SDH_BLE_TOTAL_LINK_COUNT   1

◆ NRF_SDH_BLE_VS_UUID_COUNT

#define NRF_SDH_BLE_VS_UUID_COUNT   1

◆ NRF_SDH_CLOCK_LF_ACCURACY

#define NRF_SDH_CLOCK_LF_ACCURACY   7

◆ NRF_SDH_CLOCK_LF_RC_CTIV

#define NRF_SDH_CLOCK_LF_RC_CTIV   16

◆ NRF_SDH_CLOCK_LF_RC_TEMP_CTIV

#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV   2

◆ NRF_SDH_CLOCK_LF_SRC

#define NRF_SDH_CLOCK_LF_SRC   0

◆ NRF_SDH_DEBUG_COLOR

#define NRF_SDH_DEBUG_COLOR   0

◆ NRF_SDH_DISPATCH_MODEL

#define NRF_SDH_DISPATCH_MODEL   0

◆ NRF_SDH_ENABLED

#define NRF_SDH_ENABLED   1

◆ NRF_SDH_INFO_COLOR

#define NRF_SDH_INFO_COLOR   0

◆ NRF_SDH_LOG_ENABLED

#define NRF_SDH_LOG_ENABLED   1

◆ NRF_SDH_LOG_LEVEL

#define NRF_SDH_LOG_LEVEL   4

◆ NRF_SDH_REQ_OBSERVER_PRIO_LEVELS

#define NRF_SDH_REQ_OBSERVER_PRIO_LEVELS   2

◆ NRF_SDH_SOC_DEBUG_COLOR

#define NRF_SDH_SOC_DEBUG_COLOR   0

◆ NRF_SDH_SOC_ENABLED

#define NRF_SDH_SOC_ENABLED   1

◆ NRF_SDH_SOC_INFO_COLOR

#define NRF_SDH_SOC_INFO_COLOR   0

◆ NRF_SDH_SOC_LOG_ENABLED

#define NRF_SDH_SOC_LOG_ENABLED   1

◆ NRF_SDH_SOC_LOG_LEVEL

#define NRF_SDH_SOC_LOG_LEVEL   3

◆ NRF_SDH_SOC_OBSERVER_PRIO_LEVELS

#define NRF_SDH_SOC_OBSERVER_PRIO_LEVELS   2

◆ NRF_SDH_SOC_STACK_OBSERVER_PRIO

#define NRF_SDH_SOC_STACK_OBSERVER_PRIO   0

◆ NRF_SDH_STACK_OBSERVER_PRIO_LEVELS

#define NRF_SDH_STACK_OBSERVER_PRIO_LEVELS   2

◆ NRF_SDH_STATE_OBSERVER_PRIO_LEVELS

#define NRF_SDH_STATE_OBSERVER_PRIO_LEVELS   2

◆ NRF_SECTION_ITER_ENABLED

#define NRF_SECTION_ITER_ENABLED   1

◆ NRF_SORTLIST_CONFIG_DEBUG_COLOR

#define NRF_SORTLIST_CONFIG_DEBUG_COLOR   0

◆ NRF_SORTLIST_CONFIG_INFO_COLOR

#define NRF_SORTLIST_CONFIG_INFO_COLOR   0

◆ NRF_SORTLIST_CONFIG_LOG_ENABLED

#define NRF_SORTLIST_CONFIG_LOG_ENABLED   0

◆ NRF_SORTLIST_CONFIG_LOG_LEVEL

#define NRF_SORTLIST_CONFIG_LOG_LEVEL   3

◆ NRF_SORTLIST_ENABLED

#define NRF_SORTLIST_ENABLED   1

◆ NRF_SPI_DRV_MISO_PULLUP_CFG

#define NRF_SPI_DRV_MISO_PULLUP_CFG   3

◆ NRF_SPI_MNGR_ENABLED

#define NRF_SPI_MNGR_ENABLED   0

◆ NRF_STACK_GUARD_CONFIG_DEBUG_COLOR

#define NRF_STACK_GUARD_CONFIG_DEBUG_COLOR   0

◆ NRF_STACK_GUARD_CONFIG_INFO_COLOR

#define NRF_STACK_GUARD_CONFIG_INFO_COLOR   0

◆ NRF_STACK_GUARD_CONFIG_LOG_ENABLED

#define NRF_STACK_GUARD_CONFIG_LOG_ENABLED   0

◆ NRF_STACK_GUARD_CONFIG_LOG_LEVEL

#define NRF_STACK_GUARD_CONFIG_LOG_LEVEL   3

◆ NRF_STACK_GUARD_CONFIG_SIZE

#define NRF_STACK_GUARD_CONFIG_SIZE   7

◆ NRF_STACK_GUARD_ENABLED

#define NRF_STACK_GUARD_ENABLED   0

◆ NRF_STRERROR_ENABLED

#define NRF_STRERROR_ENABLED   1

◆ NRF_TWI_MNGR_ENABLED

#define NRF_TWI_MNGR_ENABLED   1

◆ NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR

#define NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR   0

◆ NRF_TWI_SENSOR_CONFIG_INFO_COLOR

#define NRF_TWI_SENSOR_CONFIG_INFO_COLOR   0

◆ NRF_TWI_SENSOR_CONFIG_LOG_ENABLED

#define NRF_TWI_SENSOR_CONFIG_LOG_ENABLED   0

◆ NRF_TWI_SENSOR_CONFIG_LOG_LEVEL

#define NRF_TWI_SENSOR_CONFIG_LOG_LEVEL   3

◆ NRF_TWI_SENSOR_ENABLED

#define NRF_TWI_SENSOR_ENABLED   0

◆ NRFX_CLOCK_CONFIG_DEBUG_COLOR

#define NRFX_CLOCK_CONFIG_DEBUG_COLOR   0

◆ NRFX_CLOCK_CONFIG_INFO_COLOR

#define NRFX_CLOCK_CONFIG_INFO_COLOR   0

◆ NRFX_CLOCK_CONFIG_IRQ_PRIORITY

#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY   6

◆ NRFX_CLOCK_CONFIG_LF_SRC

#define NRFX_CLOCK_CONFIG_LF_SRC   0

◆ NRFX_CLOCK_CONFIG_LOG_ENABLED

#define NRFX_CLOCK_CONFIG_LOG_ENABLED   0

◆ NRFX_CLOCK_CONFIG_LOG_LEVEL

#define NRFX_CLOCK_CONFIG_LOG_LEVEL   3

◆ NRFX_CLOCK_ENABLED

#define NRFX_CLOCK_ENABLED   1

◆ NRFX_COMP_CONFIG_DEBUG_COLOR

#define NRFX_COMP_CONFIG_DEBUG_COLOR   0

◆ NRFX_COMP_CONFIG_HYST

#define NRFX_COMP_CONFIG_HYST   0

◆ NRFX_COMP_CONFIG_INFO_COLOR

#define NRFX_COMP_CONFIG_INFO_COLOR   0

◆ NRFX_COMP_CONFIG_INPUT

#define NRFX_COMP_CONFIG_INPUT   0

◆ NRFX_COMP_CONFIG_IRQ_PRIORITY

#define NRFX_COMP_CONFIG_IRQ_PRIORITY   6

◆ NRFX_COMP_CONFIG_ISOURCE

#define NRFX_COMP_CONFIG_ISOURCE   0

◆ NRFX_COMP_CONFIG_LOG_ENABLED

#define NRFX_COMP_CONFIG_LOG_ENABLED   0

◆ NRFX_COMP_CONFIG_LOG_LEVEL

#define NRFX_COMP_CONFIG_LOG_LEVEL   3

◆ NRFX_COMP_CONFIG_MAIN_MODE

#define NRFX_COMP_CONFIG_MAIN_MODE   0

◆ NRFX_COMP_CONFIG_REF

#define NRFX_COMP_CONFIG_REF   1

◆ NRFX_COMP_CONFIG_SPEED_MODE

#define NRFX_COMP_CONFIG_SPEED_MODE   2

◆ NRFX_COMP_ENABLED

#define NRFX_COMP_ENABLED   0

◆ NRFX_EGU_ENABLED

#define NRFX_EGU_ENABLED   0

◆ NRFX_GPIOTE_CONFIG_DEBUG_COLOR

#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR   0

◆ NRFX_GPIOTE_CONFIG_INFO_COLOR

#define NRFX_GPIOTE_CONFIG_INFO_COLOR   0

◆ NRFX_GPIOTE_CONFIG_IRQ_PRIORITY

#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY   7

◆ NRFX_GPIOTE_CONFIG_LOG_ENABLED

#define NRFX_GPIOTE_CONFIG_LOG_ENABLED   0

◆ NRFX_GPIOTE_CONFIG_LOG_LEVEL

#define NRFX_GPIOTE_CONFIG_LOG_LEVEL   3

◆ NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS

#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS   1

◆ NRFX_GPIOTE_ENABLED

#define NRFX_GPIOTE_ENABLED   1

◆ NRFX_I2S_CONFIG_ALIGN

#define NRFX_I2S_CONFIG_ALIGN   0

◆ NRFX_I2S_CONFIG_CHANNELS

#define NRFX_I2S_CONFIG_CHANNELS   1

◆ NRFX_I2S_CONFIG_DEBUG_COLOR

#define NRFX_I2S_CONFIG_DEBUG_COLOR   0

◆ NRFX_I2S_CONFIG_FORMAT

#define NRFX_I2S_CONFIG_FORMAT   0

◆ NRFX_I2S_CONFIG_INFO_COLOR

#define NRFX_I2S_CONFIG_INFO_COLOR   0

◆ NRFX_I2S_CONFIG_IRQ_PRIORITY

#define NRFX_I2S_CONFIG_IRQ_PRIORITY   6

◆ NRFX_I2S_CONFIG_LOG_ENABLED

#define NRFX_I2S_CONFIG_LOG_ENABLED   0

◆ NRFX_I2S_CONFIG_LOG_LEVEL

#define NRFX_I2S_CONFIG_LOG_LEVEL   3

◆ NRFX_I2S_CONFIG_LRCK_PIN

#define NRFX_I2S_CONFIG_LRCK_PIN   30

◆ NRFX_I2S_CONFIG_MASTER

#define NRFX_I2S_CONFIG_MASTER   0

◆ NRFX_I2S_CONFIG_MCK_PIN

#define NRFX_I2S_CONFIG_MCK_PIN   255

◆ NRFX_I2S_CONFIG_MCK_SETUP

#define NRFX_I2S_CONFIG_MCK_SETUP   536870912

◆ NRFX_I2S_CONFIG_RATIO

#define NRFX_I2S_CONFIG_RATIO   2000

◆ NRFX_I2S_CONFIG_SCK_PIN

#define NRFX_I2S_CONFIG_SCK_PIN   31

◆ NRFX_I2S_CONFIG_SDIN_PIN

#define NRFX_I2S_CONFIG_SDIN_PIN   28

◆ NRFX_I2S_CONFIG_SDOUT_PIN

#define NRFX_I2S_CONFIG_SDOUT_PIN   29

◆ NRFX_I2S_CONFIG_SWIDTH

#define NRFX_I2S_CONFIG_SWIDTH   1

◆ NRFX_I2S_ENABLED

#define NRFX_I2S_ENABLED   0

◆ NRFX_LPCOMP_CONFIG_DEBUG_COLOR

#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR   0

◆ NRFX_LPCOMP_CONFIG_DETECTION

#define NRFX_LPCOMP_CONFIG_DETECTION   2

◆ NRFX_LPCOMP_CONFIG_HYST

#define NRFX_LPCOMP_CONFIG_HYST   0

◆ NRFX_LPCOMP_CONFIG_INFO_COLOR

#define NRFX_LPCOMP_CONFIG_INFO_COLOR   0

◆ NRFX_LPCOMP_CONFIG_INPUT

#define NRFX_LPCOMP_CONFIG_INPUT   0

◆ NRFX_LPCOMP_CONFIG_IRQ_PRIORITY

#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY   6

◆ NRFX_LPCOMP_CONFIG_LOG_ENABLED

#define NRFX_LPCOMP_CONFIG_LOG_ENABLED   0

◆ NRFX_LPCOMP_CONFIG_LOG_LEVEL

#define NRFX_LPCOMP_CONFIG_LOG_LEVEL   3

◆ NRFX_LPCOMP_CONFIG_REFERENCE

#define NRFX_LPCOMP_CONFIG_REFERENCE   3

◆ NRFX_LPCOMP_ENABLED

#define NRFX_LPCOMP_ENABLED   0

◆ NRFX_NFCT_CONFIG_DEBUG_COLOR

#define NRFX_NFCT_CONFIG_DEBUG_COLOR   0

◆ NRFX_NFCT_CONFIG_INFO_COLOR

#define NRFX_NFCT_CONFIG_INFO_COLOR   0

◆ NRFX_NFCT_CONFIG_IRQ_PRIORITY

#define NRFX_NFCT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_NFCT_CONFIG_LOG_ENABLED

#define NRFX_NFCT_CONFIG_LOG_ENABLED   0

◆ NRFX_NFCT_CONFIG_LOG_LEVEL

#define NRFX_NFCT_CONFIG_LOG_LEVEL   3

◆ NRFX_NFCT_ENABLED

#define NRFX_NFCT_ENABLED   0

◆ NRFX_PDM_CONFIG_CLOCK_FREQ

#define NRFX_PDM_CONFIG_CLOCK_FREQ   138412032

◆ NRFX_PDM_CONFIG_DEBUG_COLOR

#define NRFX_PDM_CONFIG_DEBUG_COLOR   0

◆ NRFX_PDM_CONFIG_EDGE

#define NRFX_PDM_CONFIG_EDGE   0

◆ NRFX_PDM_CONFIG_INFO_COLOR

#define NRFX_PDM_CONFIG_INFO_COLOR   0

◆ NRFX_PDM_CONFIG_IRQ_PRIORITY

#define NRFX_PDM_CONFIG_IRQ_PRIORITY   6

◆ NRFX_PDM_CONFIG_LOG_ENABLED

#define NRFX_PDM_CONFIG_LOG_ENABLED   0

◆ NRFX_PDM_CONFIG_LOG_LEVEL

#define NRFX_PDM_CONFIG_LOG_LEVEL   3

◆ NRFX_PDM_CONFIG_MODE

#define NRFX_PDM_CONFIG_MODE   1

◆ NRFX_PDM_ENABLED

#define NRFX_PDM_ENABLED   0

◆ NRFX_POWER_CONFIG_DEFAULT_DCDCEN

#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN   0

◆ NRFX_POWER_CONFIG_DEFAULT_DCDCENHV

#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV   0

◆ NRFX_POWER_CONFIG_IRQ_PRIORITY

#define NRFX_POWER_CONFIG_IRQ_PRIORITY   6

◆ NRFX_POWER_ENABLED

#define NRFX_POWER_ENABLED   0

◆ NRFX_PPI_CONFIG_DEBUG_COLOR

#define NRFX_PPI_CONFIG_DEBUG_COLOR   0

◆ NRFX_PPI_CONFIG_INFO_COLOR

#define NRFX_PPI_CONFIG_INFO_COLOR   0

◆ NRFX_PPI_CONFIG_LOG_ENABLED

#define NRFX_PPI_CONFIG_LOG_ENABLED   0

◆ NRFX_PPI_CONFIG_LOG_LEVEL

#define NRFX_PPI_CONFIG_LOG_LEVEL   3

◆ NRFX_PPI_ENABLED

#define NRFX_PPI_ENABLED   0

◆ NRFX_PRS_BOX_0_ENABLED

#define NRFX_PRS_BOX_0_ENABLED   0

◆ NRFX_PRS_BOX_1_ENABLED

#define NRFX_PRS_BOX_1_ENABLED   0

◆ NRFX_PRS_BOX_2_ENABLED

#define NRFX_PRS_BOX_2_ENABLED   0

◆ NRFX_PRS_BOX_3_ENABLED

#define NRFX_PRS_BOX_3_ENABLED   0

◆ NRFX_PRS_BOX_4_ENABLED

#define NRFX_PRS_BOX_4_ENABLED   1

◆ NRFX_PRS_CONFIG_DEBUG_COLOR

#define NRFX_PRS_CONFIG_DEBUG_COLOR   0

◆ NRFX_PRS_CONFIG_INFO_COLOR

#define NRFX_PRS_CONFIG_INFO_COLOR   0

◆ NRFX_PRS_CONFIG_LOG_ENABLED

#define NRFX_PRS_CONFIG_LOG_ENABLED   0

◆ NRFX_PRS_CONFIG_LOG_LEVEL

#define NRFX_PRS_CONFIG_LOG_LEVEL   3

◆ NRFX_PRS_ENABLED

#define NRFX_PRS_ENABLED   1

◆ NRFX_PWM0_ENABLED

#define NRFX_PWM0_ENABLED   0

◆ NRFX_PWM1_ENABLED

#define NRFX_PWM1_ENABLED   0

◆ NRFX_PWM2_ENABLED

#define NRFX_PWM2_ENABLED   0

◆ NRFX_PWM_CONFIG_DEBUG_COLOR

#define NRFX_PWM_CONFIG_DEBUG_COLOR   0

◆ NRFX_PWM_CONFIG_INFO_COLOR

#define NRFX_PWM_CONFIG_INFO_COLOR   0

◆ NRFX_PWM_CONFIG_LOG_ENABLED

#define NRFX_PWM_CONFIG_LOG_ENABLED   0

◆ NRFX_PWM_CONFIG_LOG_LEVEL

#define NRFX_PWM_CONFIG_LOG_LEVEL   3

◆ NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK

#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK   4

◆ NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE

#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE   0

◆ NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE

#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE   0

◆ NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN

#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN   31

◆ NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN

#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN   31

◆ NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN

#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN   31

◆ NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN

#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN   31

◆ NRFX_PWM_DEFAULT_CONFIG_STEP_MODE

#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE   0

◆ NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE

#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE   1000

◆ NRFX_PWM_ENABLED

#define NRFX_PWM_ENABLED   1

◆ NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE

#define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE   5

◆ NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED

#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0

◆ NRFX_QDEC_CONFIG_DBFEN

#define NRFX_QDEC_CONFIG_DBFEN   0

◆ NRFX_QDEC_CONFIG_DEBUG_COLOR

#define NRFX_QDEC_CONFIG_DEBUG_COLOR   0

◆ NRFX_QDEC_CONFIG_INFO_COLOR

#define NRFX_QDEC_CONFIG_INFO_COLOR   0

◆ NRFX_QDEC_CONFIG_IRQ_PRIORITY

#define NRFX_QDEC_CONFIG_IRQ_PRIORITY   6

◆ NRFX_QDEC_CONFIG_LEDPOL

#define NRFX_QDEC_CONFIG_LEDPOL   1

◆ NRFX_QDEC_CONFIG_LEDPRE

#define NRFX_QDEC_CONFIG_LEDPRE   511

◆ NRFX_QDEC_CONFIG_LOG_ENABLED

#define NRFX_QDEC_CONFIG_LOG_ENABLED   0

◆ NRFX_QDEC_CONFIG_LOG_LEVEL

#define NRFX_QDEC_CONFIG_LOG_LEVEL   3

◆ NRFX_QDEC_CONFIG_PIO_A

#define NRFX_QDEC_CONFIG_PIO_A   31

◆ NRFX_QDEC_CONFIG_PIO_B

#define NRFX_QDEC_CONFIG_PIO_B   31

◆ NRFX_QDEC_CONFIG_PIO_LED

#define NRFX_QDEC_CONFIG_PIO_LED   31

◆ NRFX_QDEC_CONFIG_REPORTPER

#define NRFX_QDEC_CONFIG_REPORTPER   0

◆ NRFX_QDEC_CONFIG_SAMPLE_INTEN

#define NRFX_QDEC_CONFIG_SAMPLE_INTEN   0

◆ NRFX_QDEC_CONFIG_SAMPLEPER

#define NRFX_QDEC_CONFIG_SAMPLEPER   7

◆ NRFX_QDEC_ENABLED

#define NRFX_QDEC_ENABLED   0

◆ NRFX_RNG_CONFIG_DEBUG_COLOR

#define NRFX_RNG_CONFIG_DEBUG_COLOR   0

◆ NRFX_RNG_CONFIG_ERROR_CORRECTION

#define NRFX_RNG_CONFIG_ERROR_CORRECTION   1

◆ NRFX_RNG_CONFIG_INFO_COLOR

#define NRFX_RNG_CONFIG_INFO_COLOR   0

◆ NRFX_RNG_CONFIG_IRQ_PRIORITY

#define NRFX_RNG_CONFIG_IRQ_PRIORITY   6

◆ NRFX_RNG_CONFIG_LOG_ENABLED

#define NRFX_RNG_CONFIG_LOG_ENABLED   0

◆ NRFX_RNG_CONFIG_LOG_LEVEL

#define NRFX_RNG_CONFIG_LOG_LEVEL   3

◆ NRFX_RNG_ENABLED

#define NRFX_RNG_ENABLED   0

◆ NRFX_RTC0_ENABLED

#define NRFX_RTC0_ENABLED   0

◆ NRFX_RTC1_ENABLED

#define NRFX_RTC1_ENABLED   0

◆ NRFX_RTC2_ENABLED

#define NRFX_RTC2_ENABLED   0

◆ NRFX_RTC_CONFIG_DEBUG_COLOR

#define NRFX_RTC_CONFIG_DEBUG_COLOR   0

◆ NRFX_RTC_CONFIG_INFO_COLOR

#define NRFX_RTC_CONFIG_INFO_COLOR   0

◆ NRFX_RTC_CONFIG_LOG_ENABLED

#define NRFX_RTC_CONFIG_LOG_ENABLED   0

◆ NRFX_RTC_CONFIG_LOG_LEVEL

#define NRFX_RTC_CONFIG_LOG_LEVEL   3

◆ NRFX_RTC_DEFAULT_CONFIG_FREQUENCY

#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY   32768

◆ NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_RTC_DEFAULT_CONFIG_RELIABLE

#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE   0

◆ NRFX_RTC_ENABLED

#define NRFX_RTC_ENABLED   0

◆ NRFX_RTC_MAXIMUM_LATENCY_US

#define NRFX_RTC_MAXIMUM_LATENCY_US   2000

◆ NRFX_SAADC_CONFIG_DEBUG_COLOR

#define NRFX_SAADC_CONFIG_DEBUG_COLOR   3

◆ NRFX_SAADC_CONFIG_INFO_COLOR

#define NRFX_SAADC_CONFIG_INFO_COLOR   0

◆ NRFX_SAADC_CONFIG_IRQ_PRIORITY

#define NRFX_SAADC_CONFIG_IRQ_PRIORITY   6

◆ NRFX_SAADC_CONFIG_LOG_ENABLED

#define NRFX_SAADC_CONFIG_LOG_ENABLED   1

◆ NRFX_SAADC_CONFIG_LOG_LEVEL

#define NRFX_SAADC_CONFIG_LOG_LEVEL   1

◆ NRFX_SAADC_CONFIG_LP_MODE

#define NRFX_SAADC_CONFIG_LP_MODE   0

◆ NRFX_SAADC_CONFIG_OVERSAMPLE

#define NRFX_SAADC_CONFIG_OVERSAMPLE   6

◆ NRFX_SAADC_CONFIG_RESOLUTION

#define NRFX_SAADC_CONFIG_RESOLUTION   3

◆ NRFX_SAADC_ENABLED

#define NRFX_SAADC_ENABLED   1

◆ NRFX_SPI0_ENABLED

#define NRFX_SPI0_ENABLED   0

◆ NRFX_SPI1_ENABLED

#define NRFX_SPI1_ENABLED   0

◆ NRFX_SPI2_ENABLED

#define NRFX_SPI2_ENABLED   0

◆ NRFX_SPI_CONFIG_DEBUG_COLOR

#define NRFX_SPI_CONFIG_DEBUG_COLOR   0

◆ NRFX_SPI_CONFIG_INFO_COLOR

#define NRFX_SPI_CONFIG_INFO_COLOR   0

◆ NRFX_SPI_CONFIG_LOG_ENABLED

#define NRFX_SPI_CONFIG_LOG_ENABLED   0

◆ NRFX_SPI_CONFIG_LOG_LEVEL

#define NRFX_SPI_CONFIG_LOG_LEVEL   3

◆ NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_SPI_ENABLED

#define NRFX_SPI_ENABLED   0

◆ NRFX_SPI_MISO_PULL_CFG

#define NRFX_SPI_MISO_PULL_CFG   1

◆ NRFX_SPIM0_ENABLED

#define NRFX_SPIM0_ENABLED   1

◆ NRFX_SPIM1_ENABLED

#define NRFX_SPIM1_ENABLED   1

◆ NRFX_SPIM2_ENABLED

#define NRFX_SPIM2_ENABLED   0

◆ NRFX_SPIM_CONFIG_DEBUG_COLOR

#define NRFX_SPIM_CONFIG_DEBUG_COLOR   0

◆ NRFX_SPIM_CONFIG_INFO_COLOR

#define NRFX_SPIM_CONFIG_INFO_COLOR   0

◆ NRFX_SPIM_CONFIG_LOG_ENABLED

#define NRFX_SPIM_CONFIG_LOG_ENABLED   0

◆ NRFX_SPIM_CONFIG_LOG_LEVEL

#define NRFX_SPIM_CONFIG_LOG_LEVEL   3

◆ NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_SPIM_ENABLED

#define NRFX_SPIM_ENABLED   1

◆ NRFX_SPIM_MISO_PULL_CFG

#define NRFX_SPIM_MISO_PULL_CFG   3

◆ NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED

#define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0

◆ NRFX_SPIS0_ENABLED

#define NRFX_SPIS0_ENABLED   0

◆ NRFX_SPIS1_ENABLED

#define NRFX_SPIS1_ENABLED   0

◆ NRFX_SPIS2_ENABLED

#define NRFX_SPIS2_ENABLED   0

◆ NRFX_SPIS_CONFIG_DEBUG_COLOR

#define NRFX_SPIS_CONFIG_DEBUG_COLOR   0

◆ NRFX_SPIS_CONFIG_INFO_COLOR

#define NRFX_SPIS_CONFIG_INFO_COLOR   0

◆ NRFX_SPIS_CONFIG_LOG_ENABLED

#define NRFX_SPIS_CONFIG_LOG_ENABLED   0

◆ NRFX_SPIS_CONFIG_LOG_LEVEL

#define NRFX_SPIS_CONFIG_LOG_LEVEL   3

◆ NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_SPIS_DEFAULT_DEF

#define NRFX_SPIS_DEFAULT_DEF   255

◆ NRFX_SPIS_DEFAULT_ORC

#define NRFX_SPIS_DEFAULT_ORC   255

◆ NRFX_SPIS_ENABLED

#define NRFX_SPIS_ENABLED   0

◆ NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED

#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0

◆ NRFX_SWI0_DISABLED

#define NRFX_SWI0_DISABLED   0

◆ NRFX_SWI1_DISABLED

#define NRFX_SWI1_DISABLED   0

◆ NRFX_SWI2_DISABLED

#define NRFX_SWI2_DISABLED   0

◆ NRFX_SWI3_DISABLED

#define NRFX_SWI3_DISABLED   0

◆ NRFX_SWI4_DISABLED

#define NRFX_SWI4_DISABLED   0

◆ NRFX_SWI5_DISABLED

#define NRFX_SWI5_DISABLED   0

◆ NRFX_SWI_CONFIG_DEBUG_COLOR

#define NRFX_SWI_CONFIG_DEBUG_COLOR   0

◆ NRFX_SWI_CONFIG_INFO_COLOR

#define NRFX_SWI_CONFIG_INFO_COLOR   0

◆ NRFX_SWI_CONFIG_LOG_ENABLED

#define NRFX_SWI_CONFIG_LOG_ENABLED   0

◆ NRFX_SWI_CONFIG_LOG_LEVEL

#define NRFX_SWI_CONFIG_LOG_LEVEL   3

◆ NRFX_SWI_ENABLED

#define NRFX_SWI_ENABLED   0

◆ NRFX_SYSTICK_ENABLED

#define NRFX_SYSTICK_ENABLED   1

◆ NRFX_TIMER0_ENABLED

#define NRFX_TIMER0_ENABLED   1

◆ NRFX_TIMER1_ENABLED

#define NRFX_TIMER1_ENABLED   1

◆ NRFX_TIMER2_ENABLED

#define NRFX_TIMER2_ENABLED   2

◆ NRFX_TIMER3_ENABLED

#define NRFX_TIMER3_ENABLED   0

◆ NRFX_TIMER4_ENABLED

#define NRFX_TIMER4_ENABLED   0

◆ NRFX_TIMER_CONFIG_DEBUG_COLOR

#define NRFX_TIMER_CONFIG_DEBUG_COLOR   0

◆ NRFX_TIMER_CONFIG_INFO_COLOR

#define NRFX_TIMER_CONFIG_INFO_COLOR   0

◆ NRFX_TIMER_CONFIG_LOG_ENABLED

#define NRFX_TIMER_CONFIG_LOG_ENABLED   0

◆ NRFX_TIMER_CONFIG_LOG_LEVEL

#define NRFX_TIMER_CONFIG_LOG_LEVEL   4

◆ NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH

#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH   0

◆ NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY

#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY   0

◆ NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_TIMER_DEFAULT_CONFIG_MODE

#define NRFX_TIMER_DEFAULT_CONFIG_MODE   0

◆ NRFX_TIMER_ENABLED

#define NRFX_TIMER_ENABLED   1

◆ NRFX_TWI0_ENABLED

#define NRFX_TWI0_ENABLED   1

◆ NRFX_TWI1_ENABLED

#define NRFX_TWI1_ENABLED   0

◆ NRFX_TWI_CONFIG_DEBUG_COLOR

#define NRFX_TWI_CONFIG_DEBUG_COLOR   3

◆ NRFX_TWI_CONFIG_INFO_COLOR

#define NRFX_TWI_CONFIG_INFO_COLOR   0

◆ NRFX_TWI_CONFIG_LOG_ENABLED

#define NRFX_TWI_CONFIG_LOG_ENABLED   1

◆ NRFX_TWI_CONFIG_LOG_LEVEL

#define NRFX_TWI_CONFIG_LOG_LEVEL   4

◆ NRFX_TWI_DEFAULT_CONFIG_FREQUENCY

#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY   26738688

◆ NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT

#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT   0

◆ NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_TWI_ENABLED

#define NRFX_TWI_ENABLED   1

◆ NRFX_TWIM0_ENABLED

#define NRFX_TWIM0_ENABLED   1

◆ NRFX_TWIM1_ENABLED

#define NRFX_TWIM1_ENABLED   0

◆ NRFX_TWIM_CONFIG_DEBUG_COLOR

#define NRFX_TWIM_CONFIG_DEBUG_COLOR   3

◆ NRFX_TWIM_CONFIG_INFO_COLOR

#define NRFX_TWIM_CONFIG_INFO_COLOR   0

◆ NRFX_TWIM_CONFIG_LOG_ENABLED

#define NRFX_TWIM_CONFIG_LOG_ENABLED   1

◆ NRFX_TWIM_CONFIG_LOG_LEVEL

#define NRFX_TWIM_CONFIG_LOG_LEVEL   4

◆ NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY

#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY   104857600

◆ NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT

#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT   0

◆ NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_TWIM_ENABLED

#define NRFX_TWIM_ENABLED   1

◆ NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED

#define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   1

◆ NRFX_TWIS0_ENABLED

#define NRFX_TWIS0_ENABLED   0

◆ NRFX_TWIS1_ENABLED

#define NRFX_TWIS1_ENABLED   0

◆ NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY

#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY   0

◆ NRFX_TWIS_CONFIG_DEBUG_COLOR

#define NRFX_TWIS_CONFIG_DEBUG_COLOR   0

◆ NRFX_TWIS_CONFIG_INFO_COLOR

#define NRFX_TWIS_CONFIG_INFO_COLOR   0

◆ NRFX_TWIS_CONFIG_LOG_ENABLED

#define NRFX_TWIS_CONFIG_LOG_ENABLED   0

◆ NRFX_TWIS_CONFIG_LOG_LEVEL

#define NRFX_TWIS_CONFIG_LOG_LEVEL   3

◆ NRFX_TWIS_DEFAULT_CONFIG_ADDR0

#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0   0

◆ NRFX_TWIS_DEFAULT_CONFIG_ADDR1

#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1   0

◆ NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL

#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL   0

◆ NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL

#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL   0

◆ NRFX_TWIS_ENABLED

#define NRFX_TWIS_ENABLED   0

◆ NRFX_TWIS_NO_SYNC_MODE

#define NRFX_TWIS_NO_SYNC_MODE   0

◆ NRFX_UART0_ENABLED

#define NRFX_UART0_ENABLED   0

◆ NRFX_UART_CONFIG_DEBUG_COLOR

#define NRFX_UART_CONFIG_DEBUG_COLOR   0

◆ NRFX_UART_CONFIG_INFO_COLOR

#define NRFX_UART_CONFIG_INFO_COLOR   3

◆ NRFX_UART_CONFIG_LOG_ENABLED

#define NRFX_UART_CONFIG_LOG_ENABLED   1

◆ NRFX_UART_CONFIG_LOG_LEVEL

#define NRFX_UART_CONFIG_LOG_LEVEL   4

◆ NRFX_UART_DEFAULT_CONFIG_BAUDRATE

#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE   30924800

◆ NRFX_UART_DEFAULT_CONFIG_HWFC

#define NRFX_UART_DEFAULT_CONFIG_HWFC   0

◆ NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY   7

◆ NRFX_UART_DEFAULT_CONFIG_PARITY

#define NRFX_UART_DEFAULT_CONFIG_PARITY   0

◆ NRFX_UART_ENABLED

#define NRFX_UART_ENABLED   0

◆ NRFX_UARTE0_ENABLED

#define NRFX_UARTE0_ENABLED   1

◆ NRFX_UARTE_CONFIG_DEBUG_COLOR

#define NRFX_UARTE_CONFIG_DEBUG_COLOR   3

◆ NRFX_UARTE_CONFIG_INFO_COLOR

#define NRFX_UARTE_CONFIG_INFO_COLOR   0

◆ NRFX_UARTE_CONFIG_LOG_ENABLED

#define NRFX_UARTE_CONFIG_LOG_ENABLED   1

◆ NRFX_UARTE_CONFIG_LOG_LEVEL

#define NRFX_UARTE_CONFIG_LOG_LEVEL   4

◆ NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE

#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE   2576384

◆ NRFX_UARTE_DEFAULT_CONFIG_HWFC

#define NRFX_UARTE_DEFAULT_CONFIG_HWFC   0

◆ NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY

#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY   7

◆ NRFX_UARTE_DEFAULT_CONFIG_PARITY

#define NRFX_UARTE_DEFAULT_CONFIG_PARITY   0

◆ NRFX_UARTE_ENABLED

#define NRFX_UARTE_ENABLED   1

◆ NRFX_USBD_CONFIG_DEBUG_COLOR

#define NRFX_USBD_CONFIG_DEBUG_COLOR   0

◆ NRFX_USBD_CONFIG_INFO_COLOR

#define NRFX_USBD_CONFIG_INFO_COLOR   0

◆ NRFX_USBD_CONFIG_LOG_ENABLED

#define NRFX_USBD_CONFIG_LOG_ENABLED   0

◆ NRFX_USBD_CONFIG_LOG_LEVEL

#define NRFX_USBD_CONFIG_LOG_LEVEL   3

◆ NRFX_WDT_CONFIG_BEHAVIOUR

#define NRFX_WDT_CONFIG_BEHAVIOUR   1

◆ NRFX_WDT_CONFIG_DEBUG_COLOR

#define NRFX_WDT_CONFIG_DEBUG_COLOR   0

◆ NRFX_WDT_CONFIG_INFO_COLOR

#define NRFX_WDT_CONFIG_INFO_COLOR   0

◆ NRFX_WDT_CONFIG_IRQ_PRIORITY

#define NRFX_WDT_CONFIG_IRQ_PRIORITY   6

◆ NRFX_WDT_CONFIG_LOG_ENABLED

#define NRFX_WDT_CONFIG_LOG_ENABLED   0

◆ NRFX_WDT_CONFIG_LOG_LEVEL

#define NRFX_WDT_CONFIG_LOG_LEVEL   3

◆ NRFX_WDT_CONFIG_NO_IRQ

#define NRFX_WDT_CONFIG_NO_IRQ   0

◆ NRFX_WDT_CONFIG_RELOAD_VALUE

#define NRFX_WDT_CONFIG_RELOAD_VALUE   2000

◆ NRFX_WDT_ENABLED

#define NRFX_WDT_ENABLED   0

◆ PDM_CONFIG_CLOCK_FREQ

#define PDM_CONFIG_CLOCK_FREQ   138412032

◆ PDM_CONFIG_DEBUG_COLOR

#define PDM_CONFIG_DEBUG_COLOR   0

◆ PDM_CONFIG_EDGE

#define PDM_CONFIG_EDGE   0

◆ PDM_CONFIG_INFO_COLOR

#define PDM_CONFIG_INFO_COLOR   0

◆ PDM_CONFIG_IRQ_PRIORITY

#define PDM_CONFIG_IRQ_PRIORITY   6

◆ PDM_CONFIG_LOG_ENABLED

#define PDM_CONFIG_LOG_ENABLED   0

◆ PDM_CONFIG_LOG_LEVEL

#define PDM_CONFIG_LOG_LEVEL   3

◆ PDM_CONFIG_MODE

#define PDM_CONFIG_MODE   1

◆ PDM_ENABLED

#define PDM_ENABLED   0

◆ PEER_MANAGER_ENABLED

#define PEER_MANAGER_ENABLED   1

◆ PM_BLE_OBSERVER_PRIO

#define PM_BLE_OBSERVER_PRIO   1

◆ PM_CENTRAL_ENABLED

#define PM_CENTRAL_ENABLED   0

◆ PM_FLASH_BUFFERS

#define PM_FLASH_BUFFERS   4

◆ PM_HANDLER_SEC_DELAY_MS

#define PM_HANDLER_SEC_DELAY_MS   0

◆ PM_LESC_ENABLED

#define PM_LESC_ENABLED   0

◆ PM_LOG_DEBUG_COLOR

#define PM_LOG_DEBUG_COLOR   0

◆ PM_LOG_ENABLED

#define PM_LOG_ENABLED   1

◆ PM_LOG_INFO_COLOR

#define PM_LOG_INFO_COLOR   0

◆ PM_LOG_LEVEL

#define PM_LOG_LEVEL   3

◆ PM_MAX_REGISTRANTS

#define PM_MAX_REGISTRANTS   3

◆ PM_PEER_RANKS_ENABLED

#define PM_PEER_RANKS_ENABLED   1

◆ PM_RA_PROTECTION_ENABLED

#define PM_RA_PROTECTION_ENABLED   0

◆ PM_RA_PROTECTION_MAX_WAIT_INTERVAL

#define PM_RA_PROTECTION_MAX_WAIT_INTERVAL   64000

◆ PM_RA_PROTECTION_MIN_WAIT_INTERVAL

#define PM_RA_PROTECTION_MIN_WAIT_INTERVAL   4000

◆ PM_RA_PROTECTION_REWARD_PERIOD

#define PM_RA_PROTECTION_REWARD_PERIOD   10000

◆ PM_RA_PROTECTION_TRACKED_PEERS_NUM

#define PM_RA_PROTECTION_TRACKED_PEERS_NUM   8

◆ PM_SERVICE_CHANGED_ENABLED

#define PM_SERVICE_CHANGED_ENABLED   1

◆ POWER_CONFIG_DEFAULT_DCDCEN

#define POWER_CONFIG_DEFAULT_DCDCEN   0

◆ POWER_CONFIG_DEFAULT_DCDCENHV

#define POWER_CONFIG_DEFAULT_DCDCENHV   0

◆ POWER_CONFIG_IRQ_PRIORITY

#define POWER_CONFIG_IRQ_PRIORITY   6

◆ POWER_CONFIG_SOC_OBSERVER_PRIO

#define POWER_CONFIG_SOC_OBSERVER_PRIO   0

◆ POWER_CONFIG_STATE_OBSERVER_PRIO

#define POWER_CONFIG_STATE_OBSERVER_PRIO   0

◆ POWER_ENABLED

#define POWER_ENABLED   0

◆ PPI_CONFIG_DEBUG_COLOR

#define PPI_CONFIG_DEBUG_COLOR   0

◆ PPI_CONFIG_INFO_COLOR

#define PPI_CONFIG_INFO_COLOR   0

◆ PPI_CONFIG_LOG_ENABLED

#define PPI_CONFIG_LOG_ENABLED   0

◆ PPI_CONFIG_LOG_LEVEL

#define PPI_CONFIG_LOG_LEVEL   3

◆ PPI_ENABLED

#define PPI_ENABLED   0

◆ PWM0_ENABLED

#define PWM0_ENABLED   1

◆ PWM1_ENABLED

#define PWM1_ENABLED   1

◆ PWM2_ENABLED

#define PWM2_ENABLED   1

◆ PWM_CONFIG_DEBUG_COLOR

#define PWM_CONFIG_DEBUG_COLOR   0

◆ PWM_CONFIG_INFO_COLOR

#define PWM_CONFIG_INFO_COLOR   0

◆ PWM_CONFIG_LOG_ENABLED

#define PWM_CONFIG_LOG_ENABLED   0

◆ PWM_CONFIG_LOG_LEVEL

#define PWM_CONFIG_LOG_LEVEL   3

◆ PWM_DEFAULT_CONFIG_BASE_CLOCK

#define PWM_DEFAULT_CONFIG_BASE_CLOCK   4

◆ PWM_DEFAULT_CONFIG_COUNT_MODE

#define PWM_DEFAULT_CONFIG_COUNT_MODE   0

◆ PWM_DEFAULT_CONFIG_IRQ_PRIORITY

#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ PWM_DEFAULT_CONFIG_LOAD_MODE

#define PWM_DEFAULT_CONFIG_LOAD_MODE   0

◆ PWM_DEFAULT_CONFIG_OUT0_PIN

#define PWM_DEFAULT_CONFIG_OUT0_PIN   31

◆ PWM_DEFAULT_CONFIG_OUT1_PIN

#define PWM_DEFAULT_CONFIG_OUT1_PIN   31

◆ PWM_DEFAULT_CONFIG_OUT2_PIN

#define PWM_DEFAULT_CONFIG_OUT2_PIN   31

◆ PWM_DEFAULT_CONFIG_OUT3_PIN

#define PWM_DEFAULT_CONFIG_OUT3_PIN   31

◆ PWM_DEFAULT_CONFIG_STEP_MODE

#define PWM_DEFAULT_CONFIG_STEP_MODE   0

◆ PWM_DEFAULT_CONFIG_TOP_VALUE

#define PWM_DEFAULT_CONFIG_TOP_VALUE   1000

◆ PWM_ENABLED

#define PWM_ENABLED   1

◆ PWM_NRF52_ANOMALY_109_EGU_INSTANCE

#define PWM_NRF52_ANOMALY_109_EGU_INSTANCE   5

◆ PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED

#define PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0

◆ QDEC_CONFIG_DBFEN

#define QDEC_CONFIG_DBFEN   0

◆ QDEC_CONFIG_DEBUG_COLOR

#define QDEC_CONFIG_DEBUG_COLOR   0

◆ QDEC_CONFIG_INFO_COLOR

#define QDEC_CONFIG_INFO_COLOR   0

◆ QDEC_CONFIG_IRQ_PRIORITY

#define QDEC_CONFIG_IRQ_PRIORITY   6

◆ QDEC_CONFIG_LEDPOL

#define QDEC_CONFIG_LEDPOL   1

◆ QDEC_CONFIG_LEDPRE

#define QDEC_CONFIG_LEDPRE   511

◆ QDEC_CONFIG_LOG_ENABLED

#define QDEC_CONFIG_LOG_ENABLED   0

◆ QDEC_CONFIG_LOG_LEVEL

#define QDEC_CONFIG_LOG_LEVEL   3

◆ QDEC_CONFIG_PIO_A

#define QDEC_CONFIG_PIO_A   31

◆ QDEC_CONFIG_PIO_B

#define QDEC_CONFIG_PIO_B   31

◆ QDEC_CONFIG_PIO_LED

#define QDEC_CONFIG_PIO_LED   31

◆ QDEC_CONFIG_REPORTPER

#define QDEC_CONFIG_REPORTPER   0

◆ QDEC_CONFIG_SAMPLE_INTEN

#define QDEC_CONFIG_SAMPLE_INTEN   0

◆ QDEC_CONFIG_SAMPLEPER

#define QDEC_CONFIG_SAMPLEPER   7

◆ QDEC_ENABLED

#define QDEC_ENABLED   0

◆ QSPI_CONFIG_ADDRMODE

#define QSPI_CONFIG_ADDRMODE   0

◆ QSPI_CONFIG_FREQUENCY

#define QSPI_CONFIG_FREQUENCY   15

◆ QSPI_CONFIG_IRQ_PRIORITY

#define QSPI_CONFIG_IRQ_PRIORITY   6

◆ QSPI_CONFIG_MODE

#define QSPI_CONFIG_MODE   0

◆ QSPI_CONFIG_READOC

#define QSPI_CONFIG_READOC   0

◆ QSPI_CONFIG_SCK_DELAY

#define QSPI_CONFIG_SCK_DELAY   1

◆ QSPI_CONFIG_WRITEOC

#define QSPI_CONFIG_WRITEOC   0

◆ QSPI_CONFIG_XIP_OFFSET

#define QSPI_CONFIG_XIP_OFFSET   0

◆ QSPI_ENABLED

#define QSPI_ENABLED   0

◆ QSPI_PIN_CSN

#define QSPI_PIN_CSN   NRF_QSPI_PIN_NOT_CONNECTED

◆ QSPI_PIN_IO0

#define QSPI_PIN_IO0   NRF_QSPI_PIN_NOT_CONNECTED

◆ QSPI_PIN_IO1

#define QSPI_PIN_IO1   NRF_QSPI_PIN_NOT_CONNECTED

◆ QSPI_PIN_IO2

#define QSPI_PIN_IO2   NRF_QSPI_PIN_NOT_CONNECTED

◆ QSPI_PIN_IO3

#define QSPI_PIN_IO3   NRF_QSPI_PIN_NOT_CONNECTED

◆ QSPI_PIN_SCK

#define QSPI_PIN_SCK   NRF_QSPI_PIN_NOT_CONNECTED

◆ RNG_CONFIG_DEBUG_COLOR

#define RNG_CONFIG_DEBUG_COLOR   0

◆ RNG_CONFIG_ERROR_CORRECTION

#define RNG_CONFIG_ERROR_CORRECTION   1

◆ RNG_CONFIG_INFO_COLOR

#define RNG_CONFIG_INFO_COLOR   0

◆ RNG_CONFIG_IRQ_PRIORITY

#define RNG_CONFIG_IRQ_PRIORITY   6

◆ RNG_CONFIG_LOG_ENABLED

#define RNG_CONFIG_LOG_ENABLED   0

◆ RNG_CONFIG_LOG_LEVEL

#define RNG_CONFIG_LOG_LEVEL   3

◆ RNG_CONFIG_POOL_SIZE

#define RNG_CONFIG_POOL_SIZE   64

◆ RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED

#define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED   0

◆ RNG_CONFIG_STATE_OBSERVER_PRIO

#define RNG_CONFIG_STATE_OBSERVER_PRIO   0

◆ RNG_ENABLED

#define RNG_ENABLED   0

◆ RTC0_ENABLED

#define RTC0_ENABLED   0

◆ RTC1_ENABLED

#define RTC1_ENABLED   0

◆ RTC2_ENABLED

#define RTC2_ENABLED   0

◆ RTC_CONFIG_DEBUG_COLOR

#define RTC_CONFIG_DEBUG_COLOR   0

◆ RTC_CONFIG_INFO_COLOR

#define RTC_CONFIG_INFO_COLOR   0

◆ RTC_CONFIG_LOG_ENABLED

#define RTC_CONFIG_LOG_ENABLED   0

◆ RTC_CONFIG_LOG_LEVEL

#define RTC_CONFIG_LOG_LEVEL   3

◆ RTC_DEFAULT_CONFIG_FREQUENCY

#define RTC_DEFAULT_CONFIG_FREQUENCY   32768

◆ RTC_DEFAULT_CONFIG_IRQ_PRIORITY

#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ RTC_DEFAULT_CONFIG_RELIABLE

#define RTC_DEFAULT_CONFIG_RELIABLE   0

◆ RTC_ENABLED

#define RTC_ENABLED   0

◆ SAADC_CONFIG_DEBUG_COLOR

#define SAADC_CONFIG_DEBUG_COLOR   0

◆ SAADC_CONFIG_INFO_COLOR

#define SAADC_CONFIG_INFO_COLOR   0

◆ SAADC_CONFIG_IRQ_PRIORITY

#define SAADC_CONFIG_IRQ_PRIORITY   6

◆ SAADC_CONFIG_LOG_ENABLED

#define SAADC_CONFIG_LOG_ENABLED   1

◆ SAADC_CONFIG_LOG_LEVEL

#define SAADC_CONFIG_LOG_LEVEL   1

◆ SAADC_CONFIG_LP_MODE

#define SAADC_CONFIG_LP_MODE   1

◆ SAADC_CONFIG_OVERSAMPLE

#define SAADC_CONFIG_OVERSAMPLE   8

◆ SAADC_CONFIG_RESOLUTION

#define SAADC_CONFIG_RESOLUTION   3

◆ SAADC_ENABLED

#define SAADC_ENABLED   1

◆ SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN

#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN   16

◆ SEGGER_RTT_CONFIG_BUFFER_SIZE_UP

#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP   512

◆ SEGGER_RTT_CONFIG_DEFAULT_MODE

#define SEGGER_RTT_CONFIG_DEFAULT_MODE   0

◆ SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS

#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS   2

◆ SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS

#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS   2

◆ SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR

#define SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR   0

◆ SER_HAL_TRANSPORT_CONFIG_INFO_COLOR

#define SER_HAL_TRANSPORT_CONFIG_INFO_COLOR   0

◆ SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED

#define SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED   0

◆ SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL

#define SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL   3

◆ SLIP_ENABLED

#define SLIP_ENABLED   0

◆ SPI0_ENABLED

#define SPI0_ENABLED   0

◆ SPI0_USE_EASY_DMA

#define SPI0_USE_EASY_DMA   1

◆ SPI1_ENABLED

#define SPI1_ENABLED   1

◆ SPI1_USE_EASY_DMA

#define SPI1_USE_EASY_DMA   1

◆ SPI2_ENABLED

#define SPI2_ENABLED   0

◆ SPI2_USE_EASY_DMA

#define SPI2_USE_EASY_DMA   1

◆ SPI_CONFIG_DEBUG_COLOR

#define SPI_CONFIG_DEBUG_COLOR   0

◆ SPI_CONFIG_INFO_COLOR

#define SPI_CONFIG_INFO_COLOR   0

◆ SPI_CONFIG_LOG_ENABLED

#define SPI_CONFIG_LOG_ENABLED   0

◆ SPI_CONFIG_LOG_LEVEL

#define SPI_CONFIG_LOG_LEVEL   3

◆ SPI_DEFAULT_CONFIG_IRQ_PRIORITY

#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ SPI_ENABLED

#define SPI_ENABLED   1

◆ SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED

#define SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0

◆ SPIS0_ENABLED

#define SPIS0_ENABLED   0

◆ SPIS1_ENABLED

#define SPIS1_ENABLED   0

◆ SPIS2_ENABLED

#define SPIS2_ENABLED   0

◆ SPIS_CONFIG_DEBUG_COLOR

#define SPIS_CONFIG_DEBUG_COLOR   0

◆ SPIS_CONFIG_INFO_COLOR

#define SPIS_CONFIG_INFO_COLOR   0

◆ SPIS_CONFIG_LOG_ENABLED

#define SPIS_CONFIG_LOG_ENABLED   0

◆ SPIS_CONFIG_LOG_LEVEL

#define SPIS_CONFIG_LOG_LEVEL   3

◆ SPIS_DEFAULT_BIT_ORDER

#define SPIS_DEFAULT_BIT_ORDER   0

◆ SPIS_DEFAULT_CONFIG_IRQ_PRIORITY

#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ SPIS_DEFAULT_DEF

#define SPIS_DEFAULT_DEF   255

◆ SPIS_DEFAULT_MODE

#define SPIS_DEFAULT_MODE   0

◆ SPIS_DEFAULT_ORC

#define SPIS_DEFAULT_ORC   255

◆ SPIS_ENABLED

#define SPIS_ENABLED   0

◆ SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED

#define SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED   0

◆ TASK_MANAGER_CLI_CMDS

#define TASK_MANAGER_CLI_CMDS   0

◆ TASK_MANAGER_CONFIG_DEBUG_COLOR

#define TASK_MANAGER_CONFIG_DEBUG_COLOR   0

◆ TASK_MANAGER_CONFIG_INFO_COLOR

#define TASK_MANAGER_CONFIG_INFO_COLOR   0

◆ TASK_MANAGER_CONFIG_LOG_ENABLED

#define TASK_MANAGER_CONFIG_LOG_ENABLED   0

◆ TASK_MANAGER_CONFIG_LOG_LEVEL

#define TASK_MANAGER_CONFIG_LOG_LEVEL   3

◆ TASK_MANAGER_CONFIG_MAX_TASKS

#define TASK_MANAGER_CONFIG_MAX_TASKS   2

◆ TASK_MANAGER_CONFIG_STACK_GUARD

#define TASK_MANAGER_CONFIG_STACK_GUARD   7

◆ TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED

#define TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED   1

◆ TASK_MANAGER_CONFIG_STACK_SIZE

#define TASK_MANAGER_CONFIG_STACK_SIZE   1024

◆ TASK_MANAGER_ENABLED

#define TASK_MANAGER_ENABLED   0

◆ TIMER0_ENABLED

#define TIMER0_ENABLED   1

◆ TIMER0_FOR_CSENSE

#define TIMER0_FOR_CSENSE   1

◆ TIMER1_ENABLED

#define TIMER1_ENABLED   1

◆ TIMER1_FOR_CSENSE

#define TIMER1_FOR_CSENSE   2

◆ TIMER2_ENABLED

#define TIMER2_ENABLED   1

◆ TIMER3_ENABLED

#define TIMER3_ENABLED   0

◆ TIMER4_ENABLED

#define TIMER4_ENABLED   0

◆ TIMER_CONFIG_DEBUG_COLOR

#define TIMER_CONFIG_DEBUG_COLOR   0

◆ TIMER_CONFIG_INFO_COLOR

#define TIMER_CONFIG_INFO_COLOR   0

◆ TIMER_CONFIG_LOG_ENABLED

#define TIMER_CONFIG_LOG_ENABLED   0

◆ TIMER_CONFIG_LOG_LEVEL

#define TIMER_CONFIG_LOG_LEVEL   3

◆ TIMER_DEFAULT_CONFIG_BIT_WIDTH

#define TIMER_DEFAULT_CONFIG_BIT_WIDTH   0

◆ TIMER_DEFAULT_CONFIG_FREQUENCY

#define TIMER_DEFAULT_CONFIG_FREQUENCY   0

◆ TIMER_DEFAULT_CONFIG_IRQ_PRIORITY

#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ TIMER_DEFAULT_CONFIG_MODE

#define TIMER_DEFAULT_CONFIG_MODE   0

◆ TIMER_ENABLED

#define TIMER_ENABLED   1

◆ TWI0_ENABLED

#define TWI0_ENABLED   1

◆ TWI0_USE_EASY_DMA

#define TWI0_USE_EASY_DMA   1

◆ TWI1_ENABLED

#define TWI1_ENABLED   0

◆ TWI1_USE_EASY_DMA

#define TWI1_USE_EASY_DMA   0

◆ TWI_CONFIG_DEBUG_COLOR

#define TWI_CONFIG_DEBUG_COLOR   0

◆ TWI_CONFIG_INFO_COLOR

#define TWI_CONFIG_INFO_COLOR   0

◆ TWI_CONFIG_LOG_ENABLED

#define TWI_CONFIG_LOG_ENABLED   0

◆ TWI_CONFIG_LOG_LEVEL

#define TWI_CONFIG_LOG_LEVEL   3

◆ TWI_DEFAULT_CONFIG_CLR_BUS_INIT

#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT   0

◆ TWI_DEFAULT_CONFIG_FREQUENCY

#define TWI_DEFAULT_CONFIG_FREQUENCY   26738688

◆ TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT

#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT   0

◆ TWI_DEFAULT_CONFIG_IRQ_PRIORITY

#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ TWI_ENABLED

#define TWI_ENABLED   1

◆ TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED

#define TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED   1

◆ TWIS0_ENABLED

#define TWIS0_ENABLED   0

◆ TWIS1_ENABLED

#define TWIS1_ENABLED   0

◆ TWIS_ASSUME_INIT_AFTER_RESET_ONLY

#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY   0

◆ TWIS_CONFIG_DEBUG_COLOR

#define TWIS_CONFIG_DEBUG_COLOR   0

◆ TWIS_CONFIG_INFO_COLOR

#define TWIS_CONFIG_INFO_COLOR   0

◆ TWIS_CONFIG_LOG_ENABLED

#define TWIS_CONFIG_LOG_ENABLED   0

◆ TWIS_CONFIG_LOG_LEVEL

#define TWIS_CONFIG_LOG_LEVEL   3

◆ TWIS_DEFAULT_CONFIG_ADDR0

#define TWIS_DEFAULT_CONFIG_ADDR0   0

◆ TWIS_DEFAULT_CONFIG_ADDR1

#define TWIS_DEFAULT_CONFIG_ADDR1   0

◆ TWIS_DEFAULT_CONFIG_IRQ_PRIORITY

#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY   6

◆ TWIS_DEFAULT_CONFIG_SCL_PULL

#define TWIS_DEFAULT_CONFIG_SCL_PULL   0

◆ TWIS_DEFAULT_CONFIG_SDA_PULL

#define TWIS_DEFAULT_CONFIG_SDA_PULL   0

◆ TWIS_ENABLED

#define TWIS_ENABLED   0

◆ TWIS_NO_SYNC_MODE

#define TWIS_NO_SYNC_MODE   0

◆ UART0_CONFIG_USE_EASY_DMA

#define UART0_CONFIG_USE_EASY_DMA   1

◆ UART0_ENABLED

#define UART0_ENABLED   1

◆ UART_CONFIG_DEBUG_COLOR

#define UART_CONFIG_DEBUG_COLOR   0

◆ UART_CONFIG_INFO_COLOR

#define UART_CONFIG_INFO_COLOR   0

◆ UART_CONFIG_LOG_ENABLED

#define UART_CONFIG_LOG_ENABLED   0

◆ UART_CONFIG_LOG_LEVEL

#define UART_CONFIG_LOG_LEVEL   3

◆ UART_DEFAULT_CONFIG_BAUDRATE

#define UART_DEFAULT_CONFIG_BAUDRATE   30801920

◆ UART_DEFAULT_CONFIG_HWFC

#define UART_DEFAULT_CONFIG_HWFC   0

◆ UART_DEFAULT_CONFIG_IRQ_PRIORITY

#define UART_DEFAULT_CONFIG_IRQ_PRIORITY   7

◆ UART_DEFAULT_CONFIG_PARITY

#define UART_DEFAULT_CONFIG_PARITY   0

◆ UART_EASY_DMA_SUPPORT

#define UART_EASY_DMA_SUPPORT   1

◆ UART_ENABLED

#define UART_ENABLED   1

◆ UART_LEGACY_SUPPORT

#define UART_LEGACY_SUPPORT   1

◆ USBD_CONFIG_DEBUG_COLOR

#define USBD_CONFIG_DEBUG_COLOR   0

◆ USBD_CONFIG_DMASCHEDULER_ISO_BOOST

#define USBD_CONFIG_DMASCHEDULER_ISO_BOOST   1

◆ USBD_CONFIG_DMASCHEDULER_MODE

#define USBD_CONFIG_DMASCHEDULER_MODE   0

◆ USBD_CONFIG_INFO_COLOR

#define USBD_CONFIG_INFO_COLOR   0

◆ USBD_CONFIG_IRQ_PRIORITY

#define USBD_CONFIG_IRQ_PRIORITY   6

◆ USBD_CONFIG_ISO_IN_ZLP

#define USBD_CONFIG_ISO_IN_ZLP   0

◆ USBD_CONFIG_LOG_ENABLED

#define USBD_CONFIG_LOG_ENABLED   0

◆ USBD_CONFIG_LOG_LEVEL

#define USBD_CONFIG_LOG_LEVEL   3

◆ USBD_ENABLED

#define USBD_ENABLED   0

◆ USE_COMP

#define USE_COMP   0

◆ WDT_CONFIG_BEHAVIOUR

#define WDT_CONFIG_BEHAVIOUR   1

◆ WDT_CONFIG_DEBUG_COLOR

#define WDT_CONFIG_DEBUG_COLOR   0

◆ WDT_CONFIG_INFO_COLOR

#define WDT_CONFIG_INFO_COLOR   0

◆ WDT_CONFIG_IRQ_PRIORITY

#define WDT_CONFIG_IRQ_PRIORITY   6

◆ WDT_CONFIG_LOG_ENABLED

#define WDT_CONFIG_LOG_ENABLED   0

◆ WDT_CONFIG_LOG_LEVEL

#define WDT_CONFIG_LOG_LEVEL   3

◆ WDT_CONFIG_RELOAD_VALUE

#define WDT_CONFIG_RELOAD_VALUE   2000

◆ WDT_ENABLED

#define WDT_ENABLED   0