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sparcv8 Architechture Description
sparcv8 Instruction Set and Formats
ISA (ac_isa):
Name: sparcv8_isa.ac
cond (ac_asm_map):    [see source code]
Maps: a 8
Maps: n 0
Maps: ne 5
Maps: e 1
Maps: g 10
Maps: le 2
Maps: ge 11
Maps: l 3
Maps: gu 12
Maps: leu 4
Maps: cc 13
Maps: cs 5
Maps: pos 14
Maps: neg 6
Maps: vc 15
Maps: vs 7
reg (ac_asm_map):    [see source code]
Maps: %r 0 31 0 31
Maps: %g 0 7 0 7
Maps: %o 0 7 8 15
Maps: %l 0 7 16 23
Maps: %i 0 7 24 31
Maps: %fp 30
Maps: %sp 14
anul (ac_asm_map):    [see source code]
Maps: 0
Maps: ,a 1
inccc %reg (pseudo_instr):    [see source code]
Instructions:
addcc %0, 1, %0
call %reg, %imm (pseudo_instr):    [see source code]
Instructions:
call %0
set %imm, %reg (pseudo_instr):    [see source code]
Instructions:
or \%g0, %0, %1
bset %imm, %reg (pseudo_instr):    [see source code]
Instructions:
or %1, %0, %1
inc %reg (pseudo_instr):    [see source code]
Instructions:
add %0, 1, %0
inc %imm, %reg (pseudo_instr):    [see source code]
Instructions:
add %1, %0, %1
btog %reg, %reg (pseudo_instr):    [see source code]
Instructions:
xor %1, %0, %1
set %addr, %reg (pseudo_instr):    [see source code]
Instructions:
sethi \%hi(%0), %1
or %1, \%lo(%0), %1
neg %reg (pseudo_instr):    [see source code]
Instructions:
sub \%g0, %0, %0
deccc %reg (pseudo_instr):    [see source code]
Instructions:
subcc %0, 1, %0
bclr %imm, %reg (pseudo_instr):    [see source code]
Instructions:
andn %1, %0, %1
not %reg (pseudo_instr):    [see source code]
Instructions:
xnor %0, \%g0, %0
dec %reg (pseudo_instr):    [see source code]
Instructions:
sub %0, 1, %0
call %exp, %imm (pseudo_instr):    [see source code]
Instructions:
call %0
deccc %imm, %reg (pseudo_instr):    [see source code]
Instructions:
subcc %0, %1, %0
btog %imm, %reg (pseudo_instr):    [see source code]
Instructions:
xor %1, %0, %1
inccc %imm, %reg (pseudo_instr):    [see source code]
Instructions:
addcc %1, %0, %1
dec %imm, %reg (pseudo_instr):    [see source code]
Instructions:
sub %1, %0, %1
bset %reg, %reg (pseudo_instr):    [see source code]
Instructions:
or %1, %0, %1
bclr %reg, %reg (pseudo_instr):    [see source code]
Instructions:
andn %1, %0, %1