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- 00001     /**
- 00002     * @file IA32_isa.ac
- 00003     * @author Rodolfo Jardim de Azevedo
- 00004     * Valdiney Alves Pimenta (ArchC 2.0 port, new instructions, some fixed bugs)
- 00005     * Team 03 - MC723 - 2005, 1st period
- 00006     * Eduardo Uemura Okada
- 00007     * Andre Deiano Pansani
- 00008     * Ricardo Andrade
- 00009     * Modified by Rafael Madeira
- 00010     * readRegister8();
- 00011     * writeRegister8();
- 00012     * void ac_behavior( Type_op1bi )
- 00013     * DataManager
- 00014     *
- 00015     *
- 00016     * The ArchC Team
- 00017     * http://www.archc.org/
- 00018     *
- 00019     * Computer Systems Laboratory (LSC)
- 00020     * IC-UNICAMP
- 00021     * http://www.lsc.ic.unicamp.br
- 00022     *
- 00023     * @version 1.0
- 00024     * @date Thu, 29 Jun 2006 14:49:07 -0300
- 00025     *
- 00026     * @brief The ArchC x86 functional model.
- 00027     *
- 00028     * @attention Copyright (C) 2002-2006 --- The ArchC Team
- 00029     *
- 00030     */
- 00031    
- 00032     AC_ISA (IA32)
- 00033     {
- 00034     // No SSE2, SSE, MMX or System specific instructions declared
- 00035    
- 00036     // Opcode sizes in IA32
- 00037     // 1BYTE = op1b
- 00038     // 2BYTES= op2b
- 00039    
- 00040     ac_format Type_op1b = "%op1b:8" ;
- 00041     ac_format Type_op2b = "%op2b:16" ;
- 00042     ac_format Type_op1bi = "%op1b:8 %imme:32" ;
- 00043     ac_format Type_op1bi8 = "%op1b:8 %imm8:8" ;
- 00044     ac_format Type_op1bd8 = "%op1b:8 %disp8:8" ;
- 00045     ac_format Type_op1bd32 = "%op1b:8 %imme:32" ; // Restriction from archc, imme is a disp
- 00046     ac_format Type_op2bd32 = "%op2b:16 %disp32:32" ;
- 00047     //ac_format Type_op1b_rm32 = "%op1b:8 %mod:2 %regop:3 %rm:3 %sib:8 %disp:32 %imm:32";
- 00048     //ac_format Type_op2b_rm32 = "%op2b:16 %mod2:2 %regop2:3 %rm2:3 %sib2:8 %disp2:32 %imm2:32";
- 00049    
- 00050     ac_format Type_op1b_rm32 = "%op1b:8 %rm:3 %regop:3 %mod:2 %sib:8 %disp:32 %imm:32" ;
- 00051     ac_format Type_op2b_rm32 = "%op2b:16 %rm2:3 %regop2:3 %mod2:2 %sib2:8 %disp2:32 %imm2:32" ;
- 00052    
- 00053     // Debug formats (nonexistant in the instruction set)
- 00054     ac_format Type_op2b_debug = "%op2b:16 %iadd:32 %eadd:32" ;
- 00055    
- 00056     // Instruction naming patterns:
- 00057     // _[]_[]
- 00058     // Note: m16:32 = m16_32
- 00059    
- 00060     ac_instr ud2, cpuid, bswap_EAX_r32, bswap_ECX_r32,
- 00061     bswap_EDX_r32, bswap_EBX_r32, bswap_ESP_r32, bswap_EBP_r32,
- 00062     bswap_ESI_r32, bswap_EDI_r32, push_FS, push_GS, pop_FS, pop_GS, aam,
- 00063     aad;
- 00064    
- 00065     ac_instr ja_jnbe_rel16_32,
- 00066     jae_jnb_jnc_rel16_32, jb_jc_jnae_rel16_32, jbe_jna_rel16_32,
- 00067     je_jz_rel16_32, jg_jnle_rel16_32, jge_jnl_rel16_32,
- 00068     jl_jnge_rel16_32, jle_jng_rel16_32, jne_jnz_rel16_32,
- 00069     jno_rel16_32, jnp_jpo_rel16_32, jns_rel16_32, jo_rel16_32,
- 00070     jp_jpe_rel16_32, js_rel16_32;
- 00071    
- 00072     ac_instr lss_r32_m16_32, lfs_r32_m16_32, lgs_r32_m16_32,
- 00073     cmov_a_nbe_r32_rm32, cmov_ae_nb_nc_r32_rm32,
- 00074     cmov_b_c_nae_r32_rm32, cmov_be_na_r32_rm32,
- 00075     cmov_e_z_r32_rm32, cmov_g_nle_r32_rm32, cmov_ge_nl_r32_rm32,
- 00076     cmov_l_nge_r32_rm32, cmov_le_ng_r32_rm32, cmov_ne_nz_r32_rm32,
- 00077     cmov_no_r32_rm32, cmov_np_po_r32_rm32, cmov_ns_r32_rm32,
- 00078     cmov_o_r32_rm32, cmov_p_pe_r32_rm32, cmov_s_r32_rm32,
- 00079     xadd_rm32_r32, cmpxchg_rm32_r32, cmpxchg8b_m64, movsx_r32_rm8,
- 00080     movsx_r32_rm16, movzx_r32_rm8, movzx_r32_rm16,
- 00081     shrd_rm32_r32_imm8, shrd_rm32_r32_CL, shld_rm32_r32_imm8,
- 00082     shld_rm32_r32_CL, bt_rm32_r32, bt_rm32_imm8, bts_rm32_r32,
- 00083     btr_rm32_r32, btc_rm32_r32, bsf_r32_rm32, bsr_r32_rm32,
- 00084     seta_setnbe_rm8, setae_setnb_setnc_rm8, setb_setc_setnae_rm8,
- 00085     setbe_setna_rm8, sete_setz_rm8, setg_setnle_rm8,
- 00086     setge_setnl_rm8, setl_setnge_rm8, setle_setng_rm8,
- 00087     setne_setnz_rm8, setno_rm8, setnp_setpo_rm8, setns_rm8,
- 00088     seto_rm8, setp_setpe_rm8, sets_rm8, bts_rm32_imm8,
- 00089     btr_rm32_imm8, btc_rm32_imm8, imul_r32_rm32;
- 00090    
- 00091     ac_instr insd, outsd, stc, clc, cmc, cld, std, lahf, sahf, pushfd, popfd, sti,
- 00092     cli, nop, xlatb, push_EAX, push_ECX, push_EDX, push_EBX, push_ESP,
- 00093     push_EBP, push_ESI, push_EDI, push_CS, push_SS, push_DS, push_ES,
- 00094     pop_EAX, pop_ECX, pop_EDX, pop_EBX, pop_ESP, pop_EBP, pop_ESI,
- 00095     pop_EDI, pop_DS, pop_ES, pop_SS, push_a_ad, pop_a_ad, in_EAX_DX,
- 00096     out_DX_EAX, cwd_cwq, cbw_cwde, inc_EAX, inc_ECX, inc_EDX, inc_EBX,
- 00097     inc_ESP, inc_EBP, inc_ESI, inc_EDI, dec_EAX, dec_ECX, dec_EDX, dec_EBX,
- 00098     dec_ESP, dec_EBP, dec_ESI, dec_EDI, daa, das, aaa, aas, iret_iretd,
- 00099     leave, movs_m32_m32, cmps_m32_m32, scas_m32, lods_m32, stos_m32,
- 00100     /*xchg_EAX_EAX,*/ xchg_EAX_ECX, xchg_EAX_EDX, xchg_EAX_EBX, xchg_EAX_ESP,
- 00101     xchg_EAX_EBP, xchg_EAX_ESI, xchg_EAX_EDI, P_LOCK, P_REPNE_REPNZ,
- 00102     P_REP_REPE_REPZ, P_CS, P_SS, P_DS, P_ES, P_FS, P_GS, P_BTAKEN,
- 00103     P_BNTAKEN, P_OPSIZE, P_ADSIZE;
- 00104    
- 00105     ac_instr ja_jnbe_rel8, jae_jnb_jnc_rel8, jb_jc_jnae_rel8, jbe_jna_rel8,
- 00106     je_jz_rel8, jg_jnle_rel8, jge_jnl_rel8, jl_jnge_rel8,
- 00107     jle_jng_rel8, jne_jnz_rel8, jno_rel8, jnp_jpo_rel8, jns_rel8,
- 00108     jo_rel8, jp_jpe_rel8, js_rel8, jcxz_jecxz_rel8, loop_rel8,
- 00109     loope_loopz_rel8, loopne_loopnz_rel8, jmp_rel8;
- 00110    
- 00111     ac_instr call_rel32, jmp_rel32;
- 00112    
- 00113     ac_instr mov_EAX_imm32, mov_ECX_imm32, mov_EDX_imm32, mov_EBX_imm32,
- 00114     mov_ESP_imm32, mov_EBP_imm32, mov_ESI_imm32, mov_EDI_imm32,
- 00115     push_imm32, add_EAX_imm32, adc_EAX_imm32, sub_EAX_imm32,
- 00116     sbb_EAX_imm32, cmp_EAX_imm32, and_EAX_imm32, or_EAX_imm32,
- 00117     xor_EAX_imm32, test_eax_imm32;
- 00118    
- 00119     ac_instr mov_AL_imm8, mov_CL_imm8, mov_DL_imm8, mov_BL_imm8,
- 00120     mov_AH_imm8, mov_CH_imm8, mov_DH_imm8, mov_BH_imm8,
- 00121     push_imm8, cmp_AL_imm8;
- 00122    
- 00123     ac_instr lds_r32_m16_32, les_r32_m16_32, lea_r32_m, mov_rm32_r32,
- 00124     mov_r32_rm32, mov_rm32_imm32, /*xchg_EAX_r32, xchg_ECX_r32,
- 00125     xchg_EDX_r32, xchg_EBX_r32, xchg_ESP_r32, xchg_EBP_r32,
- 00126     xchg_ESI_r32, xchg_EDI_r32,*/ xchg_rm32_r32, push_rm32,
- 00127     pop_rm32, in_EAX_imm8, out_imm8_EAX,
- 00128     add_rm32_imm32, add_rm32_r32, add_r32_rm32,
- 00129     adc_rm32_r32, adc_r32_rm32,
- 00130     sub_rm32_r32, sub_r32_rm32, sbb_rm32_r32,
- 00131     sbb_r32_rm32, mul_rm32, imul_r32_rm32_imm8, imul_r32_rm32_imm32,
- 00132     cmp_rm32_r32, cmp_r32_rm32,
- 00133     and_rm32_r32, and_r32_rm32, or_rm32_r32,
- 00134     or_r32_rm32, xor_rm32_r32, xor_r32_rm32,
- 00135     test_rm32_r32,
- 00136     jmp_ptr16_32, add_rm32_imm8,
- 00137     call_ptr16_32, ret_near, ret_far, ret_near_imm16,
- 00138     ret_far_imm16, int_3, int_imm8, into, bound_r32_m32_32,
- 00139     enter_imm16_0_1_imm8, inc_rm32, dec_rm32, jmp_rm32,
- 00140     jmp_m16_32, call_rm32, call_m16_32, sub_rm32_imm32,
- 00141     sub_rm32_imm8, sbb_rm32_imm32, sbb_rm32_imm8,
- 00142     adc_rm32_imm32, adc_rm32_imm8, cmp_rm32_imm32,
- 00143     cmp_rm32_imm8, and_rm32_imm32, and_rm32_imm8,
- 00144     or_rm32_imm32, or_rm32_imm8, xor_rm32_imm32,
- 00145     xor_rm32_imm8, div_rm32, idiv_rm32, imul_rm32,
- 00146     neg_rm32, not_rm32, test_rm32_imm32,
- 00147     sal_shl_1_rm32, sal_shl_cl_rm32, sal_shl_rm32_imm8,
- 00148     sar_1_rm32, sar_cl_rm32,
- 00149     sar_rm32_imm8, shr_1_rm32, shr_cl_rm32, shr_rm32_imm8, rcl_rm32,
- 00150     rcl_rm32_imm8, rcr_rm32, rcr_rm32_imm8, rol_rm32,
- 00151     rol_rm32_imm8, ror_rm32, ror_rm32_imm8, mov_rm8_imm8,
- 00152     mov_r8_rm8, add_r8_rm8, mov_rm8_r8, inc_rm8,
- 00153     add_rm8_imm8, add_rm8_r8, sub_rm8_r8, dec_rm8, sub_rm8_imm8,
- 00154     imul_rm8, mul_rm8, sal_rm8, sar_rm8, sar_rm8_imm8, cmp_rm8_imm8,
- 00155     shr_rm8_imm8, div_rm8, shr_rm8, and_r8_rm8,
- 00156     or_r8_rm8, xor_r8_rm8, sal_rm8_imm8, cmp_r8_rm8;
- 00157    
- 00158     // Debug instructions, nonexistant in the instruction set
- 00159     ac_instr dump_registers, dump_memory, dump_stack;
- 00160    
- 00161     ISA_CTOR (IA32)
- 00162     {
- 00163     // -------------------------------------------
- 00164     // Debug instructions ------------------------
- 00165     // -------------------------------------------
- 00166    
- 00167     dump_registers.set_asm ( "DUMP REGISTERS" );
- 00168     dump_registers.set_decoder ( op2b=0xDD00 );
- 00169    
- 00170     dump_memory.set_asm ( "DUMP MEMORY" );
- 00171     dump_memory.set_decoder ( op2b=0xAAAA );
- 00172    
- 00173     dump_stack.set_asm ( "DUMP STACK" );
- 00174     dump_stack.set_decoder ( op2b=0xCC00 );
- 00175    
- 00176     // -------------------------------------------
- 00177     // End debug instructions --------------------
- 00178     // -------------------------------------------
- 00179    
- 00180     ud2.set_asm ( "UD2" );
- 00181     ud2.set_decoder ( op2b = 0x0B0F );
- 00182    
- 00183     cpuid.set_asm ( "CPUID" );
- 00184     cpuid.set_decoder ( op2b = 0xA20F );
- 00185    
- 00186     lss_r32_m16_32.set_asm ( "LSS" );
- 00187     lss_r32_m16_32.set_decoder ( op2b = 0xB20F );
- 00188    
- 00189     lfs_r32_m16_32.set_asm ( "LFS" );
- 00190     lfs_r32_m16_32.set_decoder ( op2b = 0xB40F );
- 00191    
- 00192     lgs_r32_m16_32.set_asm ( "LGS" );
- 00193     lgs_r32_m16_32.set_decoder ( op2b = 0xB50F );
- 00194    
- 00195     cmov_a_nbe_r32_rm32.set_asm ( "CMOVA CMOVNBE" );
- 00196     cmov_a_nbe_r32_rm32.set_decoder ( op2b = 0x470F );
- 00197     cmov_ae_nb_nc_r32_rm32.set_asm ( "CMOVAE CMOVNB CMOVNC" );
- 00198     cmov_ae_nb_nc_r32_rm32.set_decoder ( op2b = 0x320F );
- 00199     cmov_b_c_nae_r32_rm32.set_asm ( "CMOVB CMOVC CMOVNAE" );
- 00200     cmov_b_c_nae_r32_rm32.set_decoder ( op2b = 0x420F );
- 00201     cmov_be_na_r32_rm32.set_asm ( "CMOVBE CMOVNA" );
- 00202     cmov_be_na_r32_rm32.set_decoder ( op2b = 0x460F );
- 00203     cmov_e_z_r32_rm32.set_asm ( "CMOVE CMOVZ" );
- 00204     cmov_e_z_r32_rm32.set_decoder ( op2b = 0x440F );
- 00205     cmov_g_nle_r32_rm32.set_asm ( "CMOVG CMOVNLE" );
- 00206     cmov_g_nle_r32_rm32.set_decoder ( op2b = 0x4F0F );
- 00207     cmov_ge_nl_r32_rm32.set_asm ( "CMOVGE CMOVNL" );
- 00208     cmov_ge_nl_r32_rm32.set_decoder ( op2b = 0x4D0F );
- 00209     cmov_l_nge_r32_rm32.set_asm ( "CMOVL CMOVNGE" );
- 00210     cmov_l_nge_r32_rm32.set_decoder ( op2b = 0x4C0F );
- 00211     cmov_le_ng_r32_rm32.set_asm ( "CMOVLE CMOVNG" );
- 00212     cmov_le_ng_r32_rm32.set_decoder ( op2b = 0x4E0F );
- 00213     cmov_ne_nz_r32_rm32.set_asm ( "CMOVNE CMOVNZ" );
- 00214     cmov_ne_nz_r32_rm32.set_decoder ( op2b = 0x450F );
- 00215     cmov_no_r32_rm32.set_asm ( "CMOVNO" );
- 00216     cmov_no_r32_rm32.set_decoder ( op2b = 0x410F );
- 00217     cmov_np_po_r32_rm32.set_asm ( "CMOVNP CMOVPO" );
- 00218     cmov_np_po_r32_rm32.set_decoder ( op2b = 0x4B0F );
- 00219     cmov_ns_r32_rm32.set_asm ( "CMOVNS" );
- 00220     cmov_ns_r32_rm32.set_decoder ( op2b = 0x490F );
- 00221     cmov_o_r32_rm32.set_asm ( "CMOVO" );
- 00222     cmov_o_r32_rm32.set_decoder ( op2b = 0x400F );
- 00223     cmov_p_pe_r32_rm32.set_asm ( "CMOVP CMOVPE" );
- 00224     cmov_p_pe_r32_rm32.set_decoder ( op2b = 0x4A0F );
- 00225     cmov_s_r32_rm32.set_asm ( "CMOVS" );
- 00226     cmov_s_r32_rm32.set_decoder ( op2b = 0x480F );
- 00227    
- 00228     bswap_EAX_r32.set_asm ( "BSWAP" );
- 00229     bswap_EAX_r32.set_decoder ( op2b = 0xC80F );
- 00230     bswap_ECX_r32.set_asm ( "BSWAP" );
- 00231     bswap_ECX_r32.set_decoder ( op2b = 0xC90F );
- 00232     bswap_EDX_r32.set_asm ( "BSWAP" );
- 00233     bswap_EDX_r32.set_decoder ( op2b = 0xCA0F );
- 00234     bswap_EBX_r32.set_asm ( "BSWAP" );
- 00235     bswap_EBX_r32.set_decoder ( op2b = 0xCB0F );
- 00236     bswap_ESP_r32.set_asm ( "BSWAP" );
- 00237     bswap_ESP_r32.set_decoder ( op2b = 0xCC0F );
- 00238     bswap_EBP_r32.set_asm ( "BSWAP" );
- 00239     bswap_EBP_r32.set_decoder ( op2b = 0xCD0F );
- 00240     bswap_ESI_r32.set_asm ( "BSWAP" );
- 00241     bswap_ESI_r32.set_decoder ( op2b = 0xCE0F );
- 00242     bswap_EDI_r32.set_asm ( "BSWAP" );
- 00243     bswap_EDI_r32.set_decoder ( op2b = 0xCF0F );
- 00244    
- 00245     xadd_rm32_r32.set_asm ( "XADD" );
- 00246     xadd_rm32_r32.set_decoder ( op2b = 0xC10F );
- 00247    
- 00248     cmpxchg_rm32_r32.set_asm ( "CMPXCHG" );
- 00249     cmpxchg_rm32_r32.set_decoder ( op2b = 0xB10F );
- 00250    
- 00251     cmpxchg8b_m64.set_asm ( "CMPXCHG8B" );
- 00252     cmpxchg8b_m64.set_decoder ( op2b = 0xC70F );
- 00253    
- 00254     push_FS.set_asm ( "PUSH" );
- 00255     push_FS.set_decoder ( op2b = 0xA00F );
- 00256     push_GS.set_asm ( "PUSH" );
- 00257     push_GS.set_decoder ( op2b = 0xA80F );
- 00258    
- 00259     pop_FS.set_asm ( "POP" );
- 00260     pop_FS.set_decoder ( op2b = 0xA10F );
- 00261     pop_GS.set_asm ( "POP" );
- 00262     pop_GS.set_decoder ( op2b = 0xA90F );
- 00263    
- 00264     movsx_r32_rm8.set_asm ( "MOVSX" );
- 00265     movsx_r32_rm8.set_decoder ( op2b = 0xBE0F );
- 00266     movsx_r32_rm16.set_asm ( "MOVSX" );
- 00267     movsx_r32_rm16.set_decoder ( op2b = 0xBF0F );
- 00268    
- 00269     movzx_r32_rm8.set_asm ( "MOVZX" );
- 00270     movzx_r32_rm8.set_decoder ( op2b = 0xB60F );
- 00271     movzx_r32_rm16.set_asm ( "MOVZX" );
- 00272     movzx_r32_rm16.set_decoder ( op2b = 0xB70F );
- 00273    
- 00274     imul_r32_rm32.set_asm ( "IMUL R32, RM32" );
- 00275     imul_r32_rm32.set_decoder ( op2b = 0xAF0F );
- 00276    
- 00277     aam.set_asm ( "AAM" );
- 00278     aam.set_decoder ( op2b = 0x0AD4 );
- 00279    
- 00280     aad.set_asm ( "AAD" );
- 00281     aad.set_decoder ( op2b = 0x0AD5 );
- 00282    
- 00283     shrd_rm32_r32_imm8.set_asm ( "SHRD" );
- 00284     shrd_rm32_r32_imm8.set_decoder ( op2b = 0xAC0F );
- 00285     shrd_rm32_r32_CL.set_asm ( "SHRD" );
- 00286     shrd_rm32_r32_CL.set_decoder ( op2b = 0xAD0F );
- 00287    
- 00288     shld_rm32_r32_imm8.set_asm ( "SHLD" );
- 00289     shld_rm32_r32_imm8.set_decoder ( op2b = 0xA40F );
- 00290     shld_rm32_r32_CL.set_asm ( "SHLD" );
- 00291     shld_rm32_r32_CL.set_decoder ( op2b = 0xA50F );
- 00292    
- 00293     bt_rm32_r32.set_asm ( "BT" );
- 00294     bt_rm32_r32.set_decoder ( op2b = 0xA30F );
- 00295     bt_rm32_imm8.set_asm ( "BT" );
- 00296     bt_rm32_imm8.set_decoder ( op2b = 0xBA0F, regop2 = 0x04 );
- 00297    
- 00298     // Expansao:
- 00299     bts_rm32_imm8.set_asm ( "BTS" );
- 00300     bts_rm32_imm8.set_decoder ( op2b = 0xBA0F, regop2 = 0x05 );
- 00301     btr_rm32_imm8.set_asm ( "BTR" );
- 00302     btr_rm32_imm8.set_decoder ( op2b = 0xBA0F, regop2 = 0x06 );
- 00303     btc_rm32_imm8.set_asm ( "BTC" );
- 00304     btc_rm32_imm8.set_decoder ( op2b = 0xBA0F, regop2 = 0x07 );
- 00305     // end
- 00306    
- 00307     bts_rm32_r32.set_asm ( "BTS" );
- 00308     bts_rm32_r32.set_decoder ( op2b = 0xAB0F );
- 00309    
- 00310     btr_rm32_r32.set_asm ( "BTR" );
- 00311     btr_rm32_r32.set_decoder ( op2b = 0xB30F );
- 00312    
- 00313     btc_rm32_r32.set_asm ( "BTC" );
- 00314     btc_rm32_r32.set_decoder ( op2b = 0xBB0F );
- 00315    
- 00316     bsf_r32_rm32.set_asm ( "BSF" );
- 00317     bsf_r32_rm32.set_decoder ( op2b = 0xBC0F );
- 00318    
- 00319     bsr_r32_rm32.set_asm ( "BSR" );
- 00320     bsr_r32_rm32.set_decoder ( op2b = 0xBD0F );
- 00321    
- 00322     seta_setnbe_rm8.set_asm ( "SETA SETNBE" );
- 00323     seta_setnbe_rm8.set_decoder ( op2b = 0x970F );
- 00324    
- 00325     setae_setnb_setnc_rm8.set_asm ( "SETAE SETNB SETNC" );
- 00326     setae_setnb_setnc_rm8.set_decoder ( op2b = 0x930F );
- 00327    
- 00328     setb_setc_setnae_rm8.set_asm ( "SETB SETC SETNAE" );
- 00329     setb_setc_setnae_rm8.set_decoder ( op2b = 0x920F );
- 00330    
- 00331     setbe_setna_rm8.set_asm ( "SETBE SETNA" );
- 00332     setbe_setna_rm8.set_decoder ( op2b = 0x960F );
- 00333    
- 00334     sete_setz_rm8.set_asm ( "SETE SETZ" );
- 00335     sete_setz_rm8.set_decoder ( op2b = 0x940F );
- 00336    
- 00337     setg_setnle_rm8.set_asm ( "SETG SETNLE" );
- 00338     setg_setnle_rm8.set_decoder ( op2b = 0x9F0F );
- 00339    
- 00340     setge_setnl_rm8.set_asm ( "SETGE SETNL" );
- 00341     setge_setnl_rm8.set_decoder ( op2b = 0x9D0F );
- 00342    
- 00343     setl_setnge_rm8.set_asm ( "SETL SETNGE" );
- 00344     setl_setnge_rm8.set_decoder ( op2b = 0x9C0F );
- 00345    
- 00346     setle_setng_rm8.set_asm ( "SETLE SETNG" );
- 00347     setle_setng_rm8.set_decoder ( op2b = 0x9E0F );
- 00348    
- 00349     setne_setnz_rm8.set_asm ( "SETNE SETNZ" );
- 00350     setne_setnz_rm8.set_decoder ( op2b = 0x950F );
- 00351    
- 00352     setno_rm8.set_asm ( "SETNO" );
- 00353     setno_rm8.set_decoder ( op2b = 0x910F );
- 00354    
- 00355     setnp_setpo_rm8.set_asm ( "SETNP SETPO" );
- 00356     setnp_setpo_rm8.set_decoder ( op2b = 0x9B0F );
- 00357    
- 00358     setns_rm8.set_asm ( "SETNS" );
- 00359     setns_rm8.set_decoder ( op2b = 0x990F );
- 00360    
- 00361     seto_rm8.set_asm ( "SETO" );
- 00362     seto_rm8.set_decoder ( op2b = 0x900F );
- 00363    
- 00364     setp_setpe_rm8.set_asm ( "SETP SETPE" );
- 00365     setp_setpe_rm8.set_decoder ( op2b = 0x9A0F );
- 00366    
- 00367     sets_rm8.set_asm ( "SETS" );
- 00368     sets_rm8.set_decoder ( op2b = 0x980F );
- 00369    
- 00370     ja_jnbe_rel16_32.set_asm ( "JA JNBE" );
- 00371     ja_jnbe_rel16_32.set_decoder ( op2b = 0x870F );
- 00372    
- 00373     jae_jnb_jnc_rel16_32.set_asm ( "JAE JNB JNC" );
- 00374     jae_jnb_jnc_rel16_32.set_decoder ( op2b = 0x830F );
- 00375    
- 00376     jb_jc_jnae_rel16_32.set_asm ( "JB JC JNAE" );
- 00377     jb_jc_jnae_rel16_32.set_decoder ( op2b = 0x820F );
- 00378    
- 00379     jbe_jna_rel16_32.set_asm ( "JBE JNA" );
- 00380     jbe_jna_rel16_32.set_decoder ( op2b = 0x860F );
- 00381    
- 00382     je_jz_rel16_32.set_asm ( "JE JZ" );
- 00383     je_jz_rel16_32.set_decoder ( op2b = 0x840F );
- 00384    
- 00385     jg_jnle_rel16_32.set_asm ( "JG JNLE" );
- 00386     jg_jnle_rel16_32.set_decoder ( op2b = 0x8F0F );
- 00387    
- 00388     jge_jnl_rel16_32.set_asm ( "JGE JNL" );
- 00389     jge_jnl_rel16_32.set_decoder ( op2b = 0x8D0F );
- 00390    
- 00391     jl_jnge_rel16_32.set_asm ( "JL JNGE" );
- 00392     jl_jnge_rel16_32.set_decoder ( op2b = 0x8C0F );
- 00393    
- 00394     jle_jng_rel16_32.set_asm ( "JLE JNG" );
- 00395     jle_jng_rel16_32.set_decoder ( op2b = 0x8E0F );
- 00396    
- 00397     jne_jnz_rel16_32.set_asm ( "JNE JNZ" );
- 00398     jne_jnz_rel16_32.set_decoder ( op2b = 0x850F );
- 00399    
- 00400     jno_rel16_32.set_asm ( "JNO" );
- 00401     jno_rel16_32.set_decoder ( op2b = 0x810F );
- 00402    
- 00403     jnp_jpo_rel16_32.set_asm ( "JNP JPO" );
- 00404     jnp_jpo_rel16_32.set_decoder ( op2b = 0x8B0F );
- 00405    
- 00406     jns_rel16_32.set_asm ( "JNS" );
- 00407     jns_rel16_32.set_decoder ( op2b = 0x890F );
- 00408    
- 00409     jo_rel16_32.set_asm ( "JO" );
- 00410     jo_rel16_32.set_decoder ( op2b = 0x800F );
- 00411    
- 00412     jp_jpe_rel16_32.set_asm ( "JP JPE" );
- 00413     jp_jpe_rel16_32.set_decoder ( op2b = 0x8A0F );
- 00414    
- 00415     js_rel16_32.set_asm ( "JS" );
- 00416     js_rel16_32.set_decoder ( op2b = 0x880F );
- 00417    
- 00418     jmp_rel32.set_asm ( "JMP" );
- 00419     jmp_rel32.set_decoder ( op1b = 0xE9 );
- 00420    
- 00421     jmp_ptr16_32.set_asm ( "JMP" );
- 00422     jmp_ptr16_32.set_decoder ( op1b = 0xEA );
- 00423    
- 00424     jcxz_jecxz_rel8.set_asm ( "JCXZ JECXZ" );
- 00425     jcxz_jecxz_rel8.set_decoder ( op1b = 0xE3 );
- 00426    
- 00427     loop_rel8.set_asm ( "LOOP" );
- 00428     loop_rel8.set_decoder ( op1b = 0xE2 );
- 00429    
- 00430     loope_loopz_rel8.set_asm ( "LOOPE LOOPZ" );
- 00431     loope_loopz_rel8.set_decoder ( op1b = 0xE1 );
- 00432    
- 00433     loopne_loopnz_rel8.set_asm ( "LOOPNE LOOPNZ" );
- 00434     loopne_loopnz_rel8.set_decoder ( op1b = 0xE0 );
- 00435    
- 00436     call_rel32.set_asm ( "CALL" );
- 00437     call_rel32.set_decoder ( op1b = 0xE8 );
- 00438     call_ptr16_32.set_asm ( "CALL" );
- 00439     call_ptr16_32.set_decoder ( op1b = 0x9A );
- 00440    
- 00441     ret_near.set_asm ( "RET" );
- 00442     ret_near.set_decoder ( op1b = 0xC3 );
- 00443     ret_far.set_asm ( "RET" );
- 00444     ret_far.set_decoder ( op1b = 0xCB );
- 00445     ret_near_imm16.set_asm ( "RET" );
- 00446     ret_near_imm16.set_decoder ( op1b = 0xC2 );
- 00447     ret_far_imm16.set_asm ( "RET" );
- 00448     ret_far_imm16.set_decoder ( op1b = 0xCA );
- 00449    
- 00450     iret_iretd.set_asm ( "IRET IRETD" );
- 00451     iret_iretd.set_decoder ( op1b = 0xCF );
- 00452    
- 00453     int_3.set_asm ( "INT3" );
- 00454     int_3.set_decoder ( op1b = 0xCC );
- 00455     int_imm8.set_asm ( "INT" );
- 00456     int_imm8.set_decoder ( op1b = 0xCD );
- 00457     into.set_asm ( "INTO" );
- 00458     into.set_decoder ( op1b = 0xCE );
- 00459    
- 00460     bound_r32_m32_32.set_asm ( "BOUND" );
- 00461     bound_r32_m32_32.set_decoder ( op1b = 0x62 );
- 00462    
- 00463     enter_imm16_0_1_imm8.set_asm ( "ENTER" );
- 00464     enter_imm16_0_1_imm8.set_decoder ( op1b = 0xC8 );
- 00465    
- 00466     leave.set_asm ( "LEAVE" );
- 00467     leave.set_decoder ( op1b = 0xC9 );
- 00468    
- 00469     movs_m32_m32.set_asm ( "MOVS" );
- 00470     movs_m32_m32.set_decoder ( op1b = 0xA5 );
- 00471    
- 00472     cmps_m32_m32.set_asm ( "CMPS" );
- 00473     cmps_m32_m32.set_decoder ( op1b = 0xA7 );
- 00474    
- 00475     scas_m32.set_asm ( "SCAS" );
- 00476     scas_m32.set_decoder ( op1b = 0xAF );
- 00477    
- 00478     lods_m32.set_asm ( "LODS" );
- 00479     lods_m32.set_decoder ( op1b = 0xAD );
- 00480    
- 00481     stos_m32.set_asm ( "STOS" );
- 00482     stos_m32.set_decoder ( op1b = 0xAB );
- 00483    
- 00484     insd.set_asm ( "INSD" );
- 00485     insd.set_decoder ( op1b = 0x6D );
- 00486    
- 00487     outsd.set_asm ( "OUTSD" );
- 00488     outsd.set_decoder ( op1b = 0x6F );
- 00489    
- 00490     stc.set_asm ( "STC" );
- 00491     stc.set_decoder ( op1b = 0xF9 );
- 00492    
- 00493     clc.set_asm ( "CLC" );
- 00494     clc.set_decoder ( op1b = 0xF8 );
- 00495    
- 00496     cmc.set_asm ( "CMC" );
- 00497     cmc.set_decoder ( op1b = 0xF5 );
- 00498    
- 00499     cld.set_asm ( "CLD" );
- 00500     cld.set_decoder ( op1b = 0xFC );
- 00501    
- 00502     std.set_asm ( "STD" );
- 00503     std.set_decoder ( op1b = 0xFD );
- 00504    
- 00505     lahf.set_asm ( "LAHF" );
- 00506     lahf.set_decoder ( op1b = 0x9F );
- 00507    
- 00508     sahf.set_asm ( "SAHF" );
- 00509     sahf.set_decoder ( op1b = 0x9E );
- 00510    
- 00511     pushfd.set_asm ( "PUSHFD" );
- 00512     pushfd.set_decoder ( op1b = 0x9C );
- 00513    
- 00514     popfd.set_asm ( "POPFD" );
- 00515     popfd.set_decoder ( op1b = 0x9D );
- 00516    
- 00517     sti.set_asm ( "STI" );
- 00518     sti.set_decoder ( op1b = 0xFB );
- 00519    
- 00520     cli.set_asm ( "CLI" );
- 00521     cli.set_decoder ( op1b = 0xFA );
- 00522    
- 00523     nop.set_asm ( "NOP" );
- 00524     nop.set_decoder ( op1b = 0x90 );
- 00525    
- 00526     xlatb.set_asm ( "XLATB" );
- 00527     xlatb.set_decoder ( op1b = 0xD7 );
- 00528    
- 00529     lds_r32_m16_32.set_asm ( "LDS" );
- 00530     lds_r32_m16_32.set_decoder ( op1b = 0xC5 );
- 00531    
- 00532     les_r32_m16_32.set_asm ( "LES" );
- 00533     les_r32_m16_32.set_decoder ( op1b = 0xC4 );
- 00534    
- 00535     lea_r32_m.set_asm ( "LEA" );
- 00536     lea_r32_m.set_decoder ( op1b = 0x8D );
- 00537    
- 00538     mov_rm32_r32.set_asm ( "MOV" );
- 00539     mov_rm32_r32.set_decoder ( op1b = 0x89 );
- 00540     mov_r32_rm32.set_asm ( "MOV" );
- 00541     mov_r32_rm32.set_decoder ( op1b = 0x8B );
- 00542     mov_EAX_imm32.set_asm ( "MOV" );
- 00543     mov_EAX_imm32.set_decoder ( op1b = 0xB8 );
- 00544     mov_ECX_imm32.set_asm ( "MOV" );
- 00545     mov_ECX_imm32.set_decoder ( op1b = 0xB9 );
- 00546     mov_EDX_imm32.set_asm ( "MOV" );
- 00547     mov_EDX_imm32.set_decoder ( op1b = 0xBA );
- 00548     mov_EBX_imm32.set_asm ( "MOV" );
- 00549     mov_EBX_imm32.set_decoder ( op1b = 0xBB );
- 00550     mov_ESP_imm32.set_asm ( "MOV" );
- 00551     mov_ESP_imm32.set_decoder ( op1b = 0xBC );
- 00552     mov_EBP_imm32.set_asm ( "MOV" );
- 00553     mov_EBP_imm32.set_decoder ( op1b = 0xBD );
- 00554     mov_ESI_imm32.set_asm ( "MOV" );
- 00555     mov_ESI_imm32.set_decoder ( op1b = 0xBE );
- 00556     mov_EDI_imm32.set_asm ( "MOV" );
- 00557     mov_EDI_imm32.set_decoder ( op1b = 0xBF );
- 00558     mov_rm32_imm32.set_asm ( "MOV" );
- 00559     mov_rm32_imm32.set_decoder ( op1b = 0xC7 );
- 00560    
- 00561     // Sidenote: xchg_EAX_EAX is evaluated as NOP by Intel design decision
- 00562     //xchg_EAX_EAX.set_asm ( "XCHG" );
- 00563     //xchg_EAX_EAX.set_decoder ( op1b = 0x90 );
- 00564     xchg_EAX_ECX.set_asm ( "XCHG" );
- 00565     xchg_EAX_ECX.set_decoder ( op1b = 0x91 );
- 00566     xchg_EAX_EDX.set_asm ( "XCHG" );
- 00567     xchg_EAX_EDX.set_decoder ( op1b = 0x92 );
- 00568     xchg_EAX_EBX.set_asm ( "XCHG" );
- 00569     xchg_EAX_EBX.set_decoder ( op1b = 0x93 );
- 00570     xchg_EAX_ESP.set_asm ( "XCHG" );
- 00571     xchg_EAX_ESP.set_decoder ( op1b = 0x94 );
- 00572     xchg_EAX_EBP.set_asm ( "XCHG" );
- 00573     xchg_EAX_EBP.set_decoder ( op1b = 0x95 );
- 00574     xchg_EAX_ESI.set_asm ( "XCHG" );
- 00575     xchg_EAX_ESI.set_decoder ( op1b = 0x96 );
- 00576     xchg_EAX_EDI.set_asm ( "XCHG" );
- 00577     xchg_EAX_EDI.set_decoder ( op1b = 0x97 );
- 00578     xchg_rm32_r32.set_asm ( "XCHG" );
- 00579     xchg_rm32_r32.set_decoder ( op1b = 0x87 );
- 00580    
- 00581     // Expansao
- 00582     inc_rm32.set_asm ( "INC" );
- 00583     inc_rm32.set_decoder ( op1b = 0xFF, regop = 0x00 );
- 00584     dec_rm32.set_asm ( "DEC" );
- 00585     dec_rm32.set_decoder ( op1b = 0xFF, regop = 0x01 );
- 00586     jmp_rm32.set_asm ( "JMP" );
- 00587     jmp_rm32.set_decoder ( op1b = 0xFF, regop = 0x04 );
- 00588     jmp_m16_32.set_asm ( "JMP" );
- 00589     jmp_m16_32.set_decoder ( op1b = 0xFF, regop = 0x05 );
- 00590     call_rm32.set_asm ( "CALL" );
- 00591     call_rm32.set_decoder ( op1b = 0xFF, regop = 0x02 );
- 00592     call_m16_32.set_asm ( "CALL" );
- 00593     call_m16_32.set_decoder ( op1b = 0xFF, regop = 0x03 );
- 00594     // end
- 00595    
- 00596     push_rm32.set_asm ( "PUSH" );
- 00597     push_rm32.set_decoder ( op1b = 0xFF, regop = 0x06 );
- 00598     push_EAX.set_asm ( "PUSH" );
- 00599     push_EAX.set_decoder ( op1b = 0x50 );
- 00600     push_ECX.set_asm ( "PUSH" );
- 00601     push_ECX.set_decoder ( op1b = 0x51 );
- 00602     push_EDX.set_asm ( "PUSH" );
- 00603     push_EDX.set_decoder ( op1b = 0x52 );
- 00604     push_EBX.set_asm ( "PUSH" );
- 00605     push_EBX.set_decoder ( op1b = 0x53 );
- 00606     push_ESP.set_asm ( "PUSH" );
- 00607     push_ESP.set_decoder ( op1b = 0x54 );
- 00608     push_EBP.set_asm ( "PUSH" );
- 00609     push_EBP.set_decoder ( op1b = 0x55 );
- 00610     push_ESI.set_asm ( "PUSH" );
- 00611     push_ESI.set_decoder ( op1b = 0x56 );
- 00612     push_EDI.set_asm ( "PUSH" );
- 00613     push_EDI.set_decoder ( op1b = 0x57 );
- 00614     push_imm32.set_asm ( "PUSH" );
- 00615     push_imm32.set_decoder ( op1b = 0x68 );
- 00616     push_CS.set_asm ( "PUSH" );
- 00617     push_CS.set_decoder ( op1b = 0x0E );
- 00618     push_SS.set_asm ( "PUSH" );
- 00619     push_SS.set_decoder ( op1b = 0x16 );
- 00620     push_DS.set_asm ( "PUSH" );
- 00621     push_DS.set_decoder ( op1b = 0x1E );
- 00622     push_ES.set_asm ( "PUSH" );
- 00623     push_ES.set_decoder ( op1b = 0x06 );
- 00624    
- 00625     push_a_ad.set_asm ( "PUSHA PUSHAD" );
- 00626     push_a_ad.set_decoder ( op1b = 0x60 );
- 00627    
- 00628     pop_a_ad.set_asm ( "POPA POPAD" );
- 00629     pop_a_ad.set_decoder ( op1b = 0x61 );
- 00630    
- 00631     in_EAX_imm8.set_asm ( "IN" );
- 00632     in_EAX_imm8.set_decoder ( op1b = 0xE5 );
- 00633     in_EAX_DX.set_asm ( "IN" );
- 00634     in_EAX_DX.set_decoder ( op1b = 0xED );
- 00635    
- 00636     out_imm8_EAX.set_asm ( "OUT" );
- 00637     out_imm8_EAX.set_decoder ( op1b = 0xE7 );
- 00638     out_DX_EAX.set_asm ( "OUT" );
- 00639     out_DX_EAX.set_decoder ( op1b = 0xEF );
- 00640    
- 00641     cwd_cwq.set_asm ( "CWD CWQ" );
- 00642     cwd_cwq.set_decoder ( op1b = 0x99 );
- 00643    
- 00644     cbw_cwde.set_asm ( "CBW CWDE" );
- 00645     cbw_cwde.set_decoder ( op1b = 0x98 );
- 00646    
- 00647     pop_rm32.set_asm ( "POP" );
- 00648     pop_rm32.set_decoder ( op1b = 0x8F );
- 00649     pop_EAX.set_asm ( "POP" );
- 00650     pop_EAX.set_decoder ( op1b = 0x58 );
- 00651     pop_ECX.set_asm ( "POP" );
- 00652     pop_ECX.set_decoder ( op1b = 0x59 );
- 00653     pop_EDX.set_asm ( "POP" );
- 00654     pop_EDX.set_decoder ( op1b = 0x5A );
- 00655     pop_EBX.set_asm ( "POP" );
- 00656     pop_EBX.set_decoder ( op1b = 0x5B );
- 00657     pop_ESP.set_asm ( "POP" );
- 00658     pop_ESP.set_decoder ( op1b = 0x5C );
- 00659     pop_EBP.set_asm ( "POP" );
- 00660     pop_EBP.set_decoder ( op1b = 0x5D );
- 00661     pop_ESI.set_asm ( "POP" );
- 00662     pop_ESI.set_decoder ( op1b = 0x5E );
- 00663     pop_EDI.set_asm ( "POP" );
- 00664     pop_EDI.set_decoder ( op1b = 0x5F );
- 00665     pop_DS.set_asm ( "POP" );
- 00666     pop_DS.set_decoder ( op1b = 0x1F );
- 00667     pop_ES.set_asm ( "POP" );
- 00668     pop_ES.set_decoder ( op1b = 0x07 );
- 00669     pop_SS.set_asm ( "POP" );
- 00670     pop_SS.set_decoder ( op1b = 0x17 );
- 00671    
- 00672     add_EAX_imm32.set_asm ( "ADD" );
- 00673     add_EAX_imm32.set_decoder ( op1b = 0x05 );
- 00674     add_rm32_imm32.set_asm ( "ADD" );
- 00675     add_rm32_imm32.set_decoder ( op1b = 0x81, regop = 0x00 );
- 00676     add_rm32_imm8.set_asm ( "ADD" );
- 00677     add_rm32_imm8.set_decoder ( op1b = 0x83, regop = 0x00 );
- 00678     add_rm32_r32.set_asm ( "ADD" );
- 00679     add_rm32_r32.set_decoder ( op1b = 0x01 );
- 00680     add_r32_rm32.set_asm ( "ADD" );
- 00681     add_r32_rm32.set_decoder ( op1b = 0x03 );
- 00682    
- 00683     // Expansion:
- 00684     sub_rm32_imm32.set_asm ( "SUB" );
- 00685     sub_rm32_imm32.set_decoder ( op1b = 0x81, regop = 0x05 );
- 00686     sub_rm32_imm8.set_asm ( "SUB" );
- 00687     sub_rm32_imm8.set_decoder ( op1b = 0x83, regop = 0x05 );
- 00688     sbb_rm32_imm32.set_asm ( "SBB" );
- 00689     sbb_rm32_imm32.set_decoder ( op1b = 0x81, regop = 0x03 );
- 00690     sbb_rm32_imm8.set_asm ( "SBB" );
- 00691     sbb_rm32_imm8.set_decoder ( op1b = 0x83, regop = 0x03 );
- 00692     adc_rm32_imm32.set_asm ( "ADC" );
- 00693     adc_rm32_imm32.set_decoder ( op1b = 0x81, regop = 0x02 );
- 00694     adc_rm32_imm8.set_asm ( "ADC" );
- 00695     adc_rm32_imm8.set_decoder ( op1b = 0x83, regop = 0x02 );
- 00696     cmp_rm32_imm32.set_asm ( "CMP" );
- 00697     cmp_rm32_imm32.set_decoder ( op1b = 0x81, regop = 0x07 );
- 00698     cmp_rm32_imm8.set_asm ( "CMP" );
- 00699     cmp_rm32_imm8.set_decoder ( op1b = 0x83, regop = 0x07 );
- 00700     and_rm32_imm32.set_asm ( "AND" );
- 00701     and_rm32_imm32.set_decoder ( op1b = 0x81, regop = 0x04 );
- 00702     and_rm32_imm8.set_asm ( "AND" );
- 00703     and_rm32_imm8.set_decoder ( op1b = 0x83, regop = 0x04 );
- 00704     or_rm32_imm32.set_asm ( "OR" );
- 00705     or_rm32_imm32.set_decoder ( op1b = 0x81, regop = 0x01 );
- 00706     or_rm32_imm8.set_asm ( "OR" );
- 00707     or_rm32_imm8.set_decoder ( op1b = 0x83, regop = 0x01 );
- 00708     xor_rm32_imm32.set_asm ( "XOR" );
- 00709     xor_rm32_imm32.set_decoder ( op1b = 0x81, regop = 0x06 );
- 00710     xor_rm32_imm8.set_asm ( "XOR" );
- 00711     xor_rm32_imm8.set_decoder ( op1b = 0x83, regop = 0x06 );
- 00712     // end
- 00713    
- 00714     adc_EAX_imm32.set_asm ( "ADC" );
- 00715     adc_EAX_imm32.set_decoder ( op1b = 0x15 );
- 00716     adc_rm32_r32.set_asm ( "ADC" );
- 00717     adc_rm32_r32.set_decoder ( op1b = 0x11 );
- 00718     adc_r32_rm32.set_asm ( "ADC" );
- 00719     adc_r32_rm32.set_decoder ( op1b = 0x13 );
- 00720    
- 00721     sub_EAX_imm32.set_asm ( "SUB" );
- 00722     sub_EAX_imm32.set_decoder ( op1b = 0x2D );
- 00723     sub_rm32_r32.set_asm ( "SUB" );
- 00724     sub_rm32_r32.set_decoder ( op1b = 0x29 );
- 00725     sub_r32_rm32.set_asm ( "SUB" );
- 00726     sub_r32_rm32.set_decoder ( op1b = 0x2B );
- 00727    
- 00728     sbb_EAX_imm32.set_asm ( "SBB" );
- 00729     sbb_EAX_imm32.set_decoder ( op1b = 0x1D );
- 00730     sbb_rm32_r32.set_asm ( "SBB" );
- 00731     sbb_rm32_r32.set_decoder ( op1b = 0x19 );
- 00732     sbb_r32_rm32.set_asm ( "SBB" );
- 00733     sbb_r32_rm32.set_decoder ( op1b = 0x1B );
- 00734    
- 00735     mul_rm32.set_asm ( "MUL" );
- 00736     mul_rm32.set_decoder ( op1b = 0xF7, regop = 0x04 );
- 00737    
- 00738     // Expansao:
- 00739     div_rm32.set_asm ( "DIV" );
- 00740     div_rm32.set_decoder ( op1b = 0xF7, regop = 0x06 );
- 00741     idiv_rm32.set_asm ( "IDIV" );
- 00742     idiv_rm32.set_decoder ( op1b = 0xF7, regop = 0x07 );
- 00743     imul_rm32.set_asm ( "IMUL" );
- 00744     imul_rm32.set_decoder ( op1b = 0xF7, regop = 0x05 );
- 00745     neg_rm32.set_asm ( "NEG" );
- 00746     neg_rm32.set_decoder ( op1b = 0xF7, regop = 0x03 );
- 00747     not_rm32.set_asm ( "NOT" );
- 00748     not_rm32.set_decoder ( op1b = 0xF7, regop = 0x02 );
- 00749     test_rm32_imm32.set_asm ( "TEST" );
- 00750     test_rm32_imm32.set_decoder ( op1b = 0xF7, regop = 0x00 );
- 00751     // end
- 00752    
- 00753     imul_r32_rm32_imm8.set_asm ( "IMUL" );
- 00754     imul_r32_rm32_imm8.set_decoder ( op1b = 0x6B );
- 00755     imul_r32_rm32_imm32.set_asm ( "IMUL" );
- 00756     imul_r32_rm32_imm32.set_decoder ( op1b = 0x69 );
- 00757    
- 00758     inc_EAX.set_asm ( "INC" );
- 00759     inc_EAX.set_decoder ( op1b = 0x40 );
- 00760     inc_ECX.set_asm ( "INC" );
- 00761     inc_ECX.set_decoder ( op1b = 0x41 );
- 00762     inc_EDX.set_asm ( "INC" );
- 00763     inc_EDX.set_decoder ( op1b = 0x42 );
- 00764     inc_EBX.set_asm ( "INC" );
- 00765     inc_EBX.set_decoder ( op1b = 0x43 );
- 00766     inc_ESP.set_asm ( "INC" );
- 00767     inc_ESP.set_decoder ( op1b = 0x44 );
- 00768     inc_EBP.set_asm ( "INC" );
- 00769     inc_EBP.set_decoder ( op1b = 0x45 );
- 00770     inc_ESI.set_asm ( "INC" );
- 00771     inc_ESI.set_decoder ( op1b = 0x46 );
- 00772     inc_EDI.set_asm ( "INC" );
- 00773     inc_EDI.set_decoder ( op1b = 0x47 );
- 00774    
- 00775     dec_EAX.set_asm ( "DEC" );
- 00776     dec_EAX.set_decoder ( op1b = 0x48 );
- 00777     dec_ECX.set_asm ( "DEC" );
- 00778     dec_ECX.set_decoder ( op1b = 0x49 );
- 00779     dec_EDX.set_asm ( "DEC" );
- 00780     dec_EDX.set_decoder ( op1b = 0x4A );
- 00781     dec_EBX.set_asm ( "DEC" );
- 00782     dec_EBX.set_decoder ( op1b = 0x4B );
- 00783     dec_ESP.set_asm ( "DEC" );
- 00784     dec_ESP.set_decoder ( op1b = 0x4C );
- 00785     dec_EBP.set_asm ( "DEC" );
- 00786     dec_EBP.set_decoder ( op1b = 0x4D );
- 00787     dec_ESI.set_asm ( "DEC" );
- 00788     dec_ESI.set_decoder ( op1b = 0x4E );
- 00789     dec_EDI.set_asm ( "DEC" );
- 00790     dec_EDI.set_decoder ( op1b = 0x4F );
- 00791    
- 00792     cmp_EAX_imm32.set_asm ( "CMP" );
- 00793     cmp_EAX_imm32.set_decoder ( op1b = 0x3D );
- 00794     cmp_rm32_r32.set_asm ( "CMP" );
- 00795     cmp_rm32_r32.set_decoder ( op1b = 0x39 );
- 00796     cmp_r32_rm32.set_asm ( "CMP" );
- 00797     cmp_r32_rm32.set_decoder ( op1b = 0x3B );
- 00798    
- 00799     daa.set_asm ( "DAA" );
- 00800     daa.set_decoder ( op1b = 0x27 );
- 00801    
- 00802     das.set_asm ( "DAS" );
- 00803     das.set_decoder ( op1b = 0x2F );
- 00804    
- 00805     aaa.set_asm ( "AAA" );
- 00806     aaa.set_decoder ( op1b = 0x37 );
- 00807    
- 00808     aas.set_asm ( "AAS" );
- 00809     aas.set_decoder ( op1b = 0x3F );
- 00810    
- 00811     and_EAX_imm32.set_asm ( "AND" );
- 00812     and_EAX_imm32.set_decoder ( op1b = 0x25 );
- 00813     and_rm32_r32.set_asm ( "AND" );
- 00814     and_rm32_r32.set_decoder ( op1b = 0x21 );
- 00815     and_r32_rm32.set_asm ( "AND" );
- 00816     and_r32_rm32.set_decoder ( op1b = 0x23 );
- 00817    
- 00818     or_EAX_imm32.set_asm ( "OR" );
- 00819     or_EAX_imm32.set_decoder ( op1b = 0x0D );
- 00820     or_rm32_r32.set_asm ( "OR" );
- 00821     or_rm32_r32.set_decoder ( op1b = 0x09 );
- 00822     or_r32_rm32.set_asm ( "OR" );
- 00823     or_r32_rm32.set_decoder ( op1b = 0x0B );
- 00824    
- 00825     xor_EAX_imm32.set_asm ( "XOR" );
- 00826     xor_EAX_imm32.set_decoder ( op1b = 0x35 );
- 00827     xor_rm32_r32.set_asm ( "XOR" );
- 00828     xor_rm32_r32.set_decoder ( op1b = 0x31 );
- 00829     xor_r32_rm32.set_asm ( "XOR" );
- 00830     xor_r32_rm32.set_decoder ( op1b = 0x33 );
- 00831    
- 00832     // Expansao
- 00833     sal_shl_1_rm32.set_asm ( "SAL/SHL" );
- 00834     sal_shl_1_rm32.set_decoder ( op1b = 0xD1, regop = 0x04 );
- 00835     sal_shl_cl_rm32.set_asm ( "SAL SHL" );
- 00836     sal_shl_cl_rm32.set_decoder ( op1b = 0xD3, regop = 0x04 );
- 00837     sal_shl_rm32_imm8.set_asm ( "SAL/SHL" );
- 00838     sal_shl_rm32_imm8.set_decoder ( op1b = 0xC1, regop = 0x04 );
- 00839     sar_1_rm32.set_asm ( "SAR" );
- 00840     sar_1_rm32.set_decoder ( op1b = 0xD1, regop = 0x07 );
- 00841     sar_cl_rm32.set_asm ( "SAR" );
- 00842     sar_cl_rm32.set_decoder ( op1b = 0xD3, regop = 0x07 );
- 00843     sar_rm32_imm8.set_asm ( "SAR" );
- 00844     sar_rm32_imm8.set_decoder ( op1b = 0xC1, regop = 0x07 );
- 00845     shr_1_rm32.set_asm ( "SHR" );
- 00846     shr_1_rm32.set_decoder ( op1b = 0xD1, regop = 0x05 );
- 00847     shr_cl_rm32.set_asm ( "SHR" );
- 00848     shr_cl_rm32.set_decoder ( op1b = 0xD3, regop = 0x05 );
- 00849     shr_rm32_imm8.set_asm ( "SHR" );
- 00850     shr_rm32_imm8.set_decoder ( op1b = 0xC1, regop = 0x05 );
- 00851     rcl_rm32.set_asm ( "RCL" );
- 00852     rcl_rm32.set_decoder ( op1b = 0xD1, regop = 0x02 );
- 00853     rcl_rm32_imm8.set_asm ( "RCL" );
- 00854     rcl_rm32_imm8.set_decoder ( op1b = 0xC1, regop = 0x02 );
- 00855     rcr_rm32.set_asm ( "RCR" );
- 00856     rcr_rm32.set_decoder ( op1b = 0xD1, regop = 0x03 );
- 00857     rcr_rm32_imm8.set_asm ( "RCR" );
- 00858     rcr_rm32_imm8.set_decoder ( op1b = 0xC1, regop = 0x03 );
- 00859     rol_rm32.set_asm ( "ROL" );
- 00860     rol_rm32.set_decoder ( op1b = 0xD1, regop = 0x00 );
- 00861     rol_rm32_imm8.set_asm ( "ROL" );
- 00862     rol_rm32_imm8.set_decoder ( op1b = 0xC1, regop = 0x00 );
- 00863     ror_rm32.set_asm ( "ROR" );
- 00864     ror_rm32.set_decoder ( op1b = 0xD1, regop = 0x01 );
- 00865     ror_rm32_imm8.set_asm ( "ROR" );
- 00866     ror_rm32_imm8.set_decoder ( op1b = 0xC1, regop = 0x01 );
- 00867     // end
- 00868    
- 00869     test_eax_imm32.set_asm ( "TEST" );
- 00870     test_eax_imm32.set_decoder ( op1b = 0xA9 );
- 00871     test_rm32_r32.set_asm ( "TEST" );
- 00872     test_rm32_r32.set_decoder ( op1b = 0x85 );
- 00873    
- 00874     ja_jnbe_rel8.set_asm ( "JA JNBE" );
- 00875     ja_jnbe_rel8.set_decoder ( op1b = 0x77 );
- 00876    
- 00877     jae_jnb_jnc_rel8.set_asm ( "JAE JNB JNC" );
- 00878     jae_jnb_jnc_rel8.set_decoder ( op1b = 0x73 );
- 00879    
- 00880     jb_jc_jnae_rel8.set_asm ( "JB JC JNAE" );
- 00881     jb_jc_jnae_rel8.set_decoder ( op1b = 0x72 );
- 00882    
- 00883     jbe_jna_rel8.set_asm ( "JBE JNA" );
- 00884     jbe_jna_rel8.set_decoder ( op1b = 0x76 );
- 00885    
- 00886     je_jz_rel8.set_asm ( "JE JZ" );
- 00887     je_jz_rel8.set_decoder ( op1b = 0x74 );
- 00888    
- 00889     jg_jnle_rel8.set_asm ( "JG JNLE" );
- 00890     jg_jnle_rel8.set_decoder ( op1b = 0x7F );
- 00891    
- 00892     jge_jnl_rel8.set_asm ( "JGE JNL" );
- 00893     jge_jnl_rel8.set_decoder ( op1b = 0x7D );
- 00894    
- 00895     jl_jnge_rel8.set_asm ( "JL JNGE" );
- 00896     jl_jnge_rel8.set_decoder ( op1b = 0x7C );
- 00897    
- 00898     jle_jng_rel8.set_asm ( "JLE JNG" );
- 00899     jle_jng_rel8.set_decoder ( op1b = 0x7E );
- 00900    
- 00901     jne_jnz_rel8.set_asm ( "JNE JNZ" );
- 00902     jne_jnz_rel8.set_decoder ( op1b = 0x75 );
- 00903    
- 00904     jno_rel8.set_asm ( "JNO" );
- 00905     jno_rel8.set_decoder ( op1b = 0x71 );
- 00906    
- 00907     jnp_jpo_rel8.set_asm ( "JNP JPO" );
- 00908     jnp_jpo_rel8.set_decoder ( op1b = 0x7B );
- 00909    
- 00910     jns_rel8.set_asm ( "JNS" );
- 00911     jns_rel8.set_decoder ( op1b = 0x79 );
- 00912    
- 00913     jo_rel8.set_asm ( "JO" );
- 00914     jo_rel8.set_decoder ( op1b = 0x70 );
- 00915    
- 00916     jp_jpe_rel8.set_asm ( "JP JPE" );
- 00917     jp_jpe_rel8.set_decoder ( op1b = 0x7A );
- 00918    
- 00919     js_rel8.set_asm ( "JS" );
- 00920     js_rel8.set_decoder ( op1b = 0x78 );
- 00921    
- 00922     P_LOCK.set_asm ( "LOCK PREFIX" );
- 00923     P_LOCK.set_decoder ( op1b = 0xF0 );
- 00924    
- 00925     P_REPNE_REPNZ.set_asm ( "REPNE/REPNZ PREFIX" );
- 00926     P_REPNE_REPNZ.set_decoder ( op1b = 0xF2 );
- 00927    
- 00928     P_REP_REPE_REPZ.set_asm ( "REP/REPE/REPZ PREFIX" );
- 00929     P_REP_REPE_REPZ.set_decoder ( op1b = 0xF3 );
- 00930    
- 00931     P_CS.set_asm ( "CS OVERRIDE PREFIX" );
- 00932     P_CS.set_decoder ( op1b = 0x2E );
- 00933    
- 00934     P_SS.set_asm ( "SS OVERRIDE PREFIX" );
- 00935     P_SS.set_decoder ( op1b = 0x36 );
- 00936    
- 00937     P_DS.set_asm ( "DS OVERRIDE PREFIX" );
- 00938     P_DS.set_decoder ( op1b = 0x3E );
- 00939    
- 00940     P_ES.set_asm ( "ES OVERRIDE PREFIX" );
- 00941     P_ES.set_decoder ( op1b = 0x26 );
- 00942    
- 00943     P_FS.set_asm ( "FS OVERRIDE PREFIX" );
- 00944     P_FS.set_decoder ( op1b = 0x64 );
- 00945    
- 00946     P_GS.set_asm ( "GS OVERRIDE PREFIX" );
- 00947     P_GS.set_decoder ( op1b = 0x65 );
- 00948    
- 00949     P_BTAKEN.set_asm ( "BRANCH TAKEN PREFIX" );
- 00950     P_BTAKEN.set_decoder ( op1b = 0x3E );
- 00951    
- 00952     P_BNTAKEN.set_asm ( "BRANCH NOT TAKEN PREFIX" );
- 00953     P_BNTAKEN.set_decoder ( op1b = 0x2E );
- 00954    
- 00955     P_OPSIZE.set_asm ( "OPERAND SIZE OVERRIDE PREFIX" );
- 00956     P_OPSIZE.set_decoder ( op1b = 0x66 );
- 00957    
- 00958     P_ADSIZE.set_asm ( "ADDRESS SIZE OVERRIDE PREFIX" );
- 00959     P_ADSIZE.set_decoder ( op1b = 0x67 );
- 00960    
- 00961     mov_rm8_imm8.set_asm ( "MOV RM8, IMM8" );
- 00962     mov_rm8_imm8.set_decoder ( op1b = 0xC6 );
- 00963    
- 00964     mov_r8_rm8.set_asm ( "MOVB R8, RM8" );
- 00965     mov_r8_rm8.set_decoder ( op1b = 0x8A );
- 00966    
- 00967     mov_rm8_r8.set_asm ( "MOVB RM8, R8" );
- 00968     mov_rm8_r8.set_decoder ( op1b = 0x88 );
- 00969    
- 00970     mov_AL_imm8.set_asm ( "MOVB AL, IMM8" );
- 00971     mov_AL_imm8.set_decoder ( op1b = 0xB0 );
- 00972    
- 00973     mov_CL_imm8.set_asm ( "MOVB CL, IMM8" );
- 00974     mov_CL_imm8.set_decoder ( op1b = 0xB1 );
- 00975    
- 00976     mov_DL_imm8.set_asm ( "MOVB DL, IMM8" );
- 00977     mov_DL_imm8.set_decoder ( op1b = 0xB2 );
- 00978    
- 00979     mov_BL_imm8.set_asm ( "MOVB BL, IMM8" );
- 00980     mov_BL_imm8.set_decoder ( op1b = 0xB3 );
- 00981    
- 00982     mov_AH_imm8.set_asm ( "MOVB AH, IMM8" );
- 00983     mov_AH_imm8.set_decoder ( op1b = 0xB4 );
- 00984    
- 00985     mov_CH_imm8.set_asm ( "MOVB CH, IMM8" );
- 00986     mov_CH_imm8.set_decoder ( op1b = 0xB5 );
- 00987    
- 00988     mov_DH_imm8.set_asm ( "MOVB DH, IMM8" );
- 00989     mov_DH_imm8.set_decoder ( op1b = 0xB6 );
- 00990    
- 00991     mov_BH_imm8.set_asm ( "MOVB BH, IMM8" );
- 00992     mov_BH_imm8.set_decoder ( op1b = 0xB7 );
- 00993    
- 00994     add_r8_rm8.set_asm ( "ADDB R8, RM8" );
- 00995     add_r8_rm8.set_decoder ( op1b = 0x02 );
- 00996    
- 00997     add_rm8_imm8.set_asm ( "ADDB RM8, IMM8" );
- 00998     add_rm8_imm8.set_decoder ( op1b = 0x80, regop = 0x0 );
- 00999    
- 01000     add_rm8_r8.set_asm ( "ADDB RM8, R8" );
- 01001     add_rm8_r8.set_decoder ( op1b = 0x00 );
- 01002    
- 01003     inc_rm8.set_asm ( "INC RM8" );
- 01004     inc_rm8.set_decoder ( op1b = 0xFE, regop = 0x0 );
- 01005    
- 01006     sub_rm8_r8.set_asm ( "SUB RM8, R8" );
- 01007     sub_rm8_r8.set_decoder ( op1b = 0x28 );
- 01008    
- 01009     dec_rm8.set_asm ( "DEC RM8" );
- 01010     dec_rm8.set_decoder ( op1b = 0xFE, regop = 0x01 );
- 01011    
- 01012     sub_rm8_imm8.set_asm ( "SUB RM8, IMM8" );
- 01013     sub_rm8_imm8.set_decoder ( op1b = 0x80, regop = 0x05 );
- 01014    
- 01015     imul_rm8.set_asm ( "IMUL RM8" );
- 01016     imul_rm8.set_decoder ( op1b = 0xF6, regop = 0x05 );
- 01017    
- 01018     mul_rm8.set_asm ( "MUL RM8" );
- 01019     mul_rm8.set_decoder ( op1b = 0xF6, regop = 0x04 );
- 01020    
- 01021     sal_rm8.set_asm ( "SAL RM8" );
- 01022     sal_rm8.set_decoder ( op1b = 0xD0, regop = 0x04 );
- 01023    
- 01024     sar_rm8.set_asm ( "SAR RM8" );
- 01025     sar_rm8.set_decoder ( op1b = 0xD0, regop = 0x07 );
- 01026    
- 01027     sar_rm8_imm8.set_asm ( "SAR RM8, IMM8" );
- 01028     sar_rm8_imm8.set_decoder ( op1b = 0xC0, regop = 0x07 );
- 01029    
- 01030     cmp_rm8_imm8.set_asm ( "CMP RM8, IMM8" );
- 01031     cmp_rm8_imm8.set_decoder ( op1b = 0x80, regop = 0x07 );
- 01032    
- 01033     shr_rm8_imm8.set_asm ( "SHR RM8, IMM8" );
- 01034     shr_rm8_imm8.set_decoder ( op1b = 0xC0, regop = 0x05 );
- 01035    
- 01036     div_rm8.set_asm ( "DIV RM8" );
- 01037     div_rm8.set_decoder ( op1b = 0xF6, regop = 0x06 );
- 01038    
- 01039     shr_rm8.set_asm ( "SHR RM8" );
- 01040     shr_rm8.set_decoder ( op1b = 0xD0, regop = 0x05 );
- 01041    
- 01042     cmp_AL_imm8.set_asm ( "CMP AL, IMM8" );
- 01043     cmp_AL_imm8.set_decoder ( op1b = 0x3C );
- 01044    
- 01045     and_r8_rm8.set_asm ( "AND R8, RM8" );
- 01046     and_r8_rm8.set_decoder ( op1b = 0x22 );
- 01047    
- 01048     or_r8_rm8.set_asm ( "OR R8, RM8" );
- 01049     or_r8_rm8.set_decoder ( op1b = 0x0A );
- 01050    
- 01051     xor_r8_rm8.set_asm ( "XOR R8, RM8" );
- 01052     xor_r8_rm8.set_decoder ( op1b = 0x32 );
- 01053    
- 01054     sal_rm8_imm8.set_asm ( "SAL RM8, IMM8" );
- 01055     sal_rm8_imm8.set_decoder ( op1b = 0xC0, regop = 0x04 );
- 01056    
- 01057     jmp_rel8.set_asm ( "JMP REL8" );
- 01058     jmp_rel8.set_decoder ( op1b = 0xEB );
- 01059    
- 01060     cmp_r8_rm8.set_asm ( "CMP R8, RM8" );
- 01061     cmp_r8_rm8.set_decoder ( op1b = 0x3A );
- 01062    
- 01063     push_imm8.set_asm ( "PUSH IMM8" );
- 01064     push_imm8.set_decoder ( op1b = 0x6A );
- 01065    
- 01066     };
- 01067     };
- 01068