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- 00001     /********************************************************/
- 00002     /* The ArchC Xscale functional model. */
- 00003     /* Author: Danilo Marcolin Caravana */
- 00004     /* Luis Felipe Strano Moraes */
- 00005     /* */
- 00006     /* Ana Carolina Merighe */
- 00007     /* Fabio Scramim Rigo */
- 00008     /* Marcelo de Almeida Oliveira */
- 00009     /* */
- 00010     /* For more information on ArchC, please visit: */
- 00011     /* http://www.archc.org */
- 00012     /* */
- 00013     /* The ArchC Team */
- 00014     /* Computer Systems Laboratory (LSC) */
- 00015     /* IC-UNICAMP */
- 00016     /* http://www.lsc.ic.unicamp.br */
- 00017     /********************************************************/
- 00018    
- 00019    
- 00020     AC_ISA (armv5e){
- 00021    
- 00022     /* Instrucoes de processamento de dados - ULA */
- 00023     ac_format Type_DPI1 = "%rm:4 %subop1:1 %shift:2 %shiftamount:5 %rd:4 %rn:4 %s:1 %func1:4 %op:3 %cond :4" ;
- 00024     ac_format Type_DPI2 = "%rm:4 %subop1:1 %shift:2 %subop2:1 %rs:4 %rd:4 %rn:4 %s:1 %func1:4 %op:3 %cond :4" ;
- 00025     ac_format Type_DPI3 = "%imm8:8 %rotate:4 %rd:4 %rn:4 %s:1 %func1:4 %op:3 %cond :4" ;
- 00026    
- 00027     /* Instrucoes de branch - BBLT precisa de cond = 1111 - bx e blx2 sao do tipo MISC1*/
- 00028     ac_format Type_BBL = "%offset:24 %h:1 %op:3 %cond :4" ;
- 00029     ac_format Type_BBLT = "%offset:24 %h:1 %op:3 %cond :4" ;
- 00030     ac_format Type_MBXBLX = "%rm:4 %subop1:1 %func2:2 %subop2:1 %one3:4 %one2:4 %one1:4 %s:1 %func1:4 %op:3 %cond :4" ;
- 00031    
- 00032     /* Instrucoes de swap e multiplicacao */
- 00033     ac_format Type_MULT1 = "%rm:4 %subop1:1 %func2:2 %subop2:1 %rs:4 %rd:4 %rn:4 %s:1 %func1:4 %op:3 %cond :4" ;
- 00034     ac_format Type_MULT2 = "%rm:4 %subop1:1 %func2:2 %subop2:1 %rs:4 %rdlo:4 %rdhi:4 %s:1 %func1:4 %op:3 %cond :4" ;
- 00035    
- 00036     /* Instrucoes de load/store */
- 00037     ac_format Type_LSI = "%imm12:12 %rd:4 %rn:4 %l:1 %w:1 %b:1 %u:1 %p:1 %op:3 %cond :4" ;
- 00038     ac_format Type_LSR = "%rm:4 %subop1:1 %shift:2 %shiftamount:5 %rd:4 %rn:4 %l:1 %w:1 %b:1 %u:1 %p:1 %op:3 %cond :4" ;
- 00039     ac_format Type_LSE = "%addr2:4 %subop1:1 %hh:1 %ss:1 %subop2:1 %addr1:4 %rd:4 %rn:4 %l:1 %w:1 %i:1 %u:1 %p:1 %op:3 %cond :4" ;
- 00040     ac_format Type_LSM = "%rlist:16 %rn:4 %l:1 %w:1 %r:1 %u:1 %p:1 %op:3 %cond :4" ;
- 00041    
- 00042     /* Instrucoes do coprocessador */
- 00043     ac_format Type_CDP = "%crm:4 %subop1:1 %funcc3:3 %cp_num:4 %crd:4 %crn:4 %funcc1:4 %subop3:1 %op:3 %cond :4" ;
- 00044     ac_format Type_CRT = "%crm:4 %subop1:1 %funcc3:3 %cp_num:4 %rd:4 %crn:4 %l:1 %funcc2:3 %subop3:1 %op:3 %cond :4" ;
- 00045     ac_format Type_CLS = "%imm8:8 %cp_num:4 %crd:4 %rn:4 %l:1 %w:1 %n:1 %u:1 %p:1 %op:3 %cond :4" ;
- 00046    
- 00047     /* Instrucoes especiais */
- 00048     ac_format Type_MBKPT = "%rm:4 %subop1:1 %func2:2 %subop2:1 %immediate:12 %s:1 %func1:4 %op:3 %cond :4" ;
- 00049     ac_format Type_MSWI = "%swinumber:24 %subop3:1 %op:3 %cond :4" ;
- 00050     ac_format Type_MCLZ = "%rm:4 %subop1:1 %func2:2 %subop2:1 %one3:4 %rd:4 %one1:4 %s:1 %func1:4 %op:3 %cond :4" ;
- 00051     ac_format Type_MMSR1 = "%rm:4 %subop1:1 %func2:2 %subop2:1 %zero3:4 %rd:4 %field:4 %func12:2 %r:1 %func11:2 %op:3 %cond :4" ;
- 00052     ac_format Type_MMSR2 = "%imm8:8 %rotate:4 %one2:4 %field:4 %func12:2 %r:1 %func11:2 %op:3 %cond :4" ;
- 00053    
- 00054     /* Instrucoes de multiplicacao DSP */
- 00055     ac_format Type_DSPSM = "%rm:4 %subop1:1 %xx:1 %yy:1 %subop2:1 %rs:4 %drn:4 %drd:4 %sm:8 %cond :4" ;
- 00056    
- 00057     /* Instrucoes de processamento de dados - ULA */
- 00058     ac_instr and1, eor1, sub1, rsb1, add1, adc1, sbc1, rsc1, tst1, teq1, cmp1, cmn1, orr1, mov1, bic1, mvn1;
- 00059     ac_instr and2, eor2, sub2, rsb2, add2, adc2, sbc2, rsc2, tst2, teq2, cmp2, cmn2, orr2, mov2, bic2, mvn2;
- 00060     ac_instr and3, eor3, sub3, rsb3, add3, adc3, sbc3, rsc3, tst3, teq3, cmp3, cmn3, orr3, mov3, bic3, mvn3;
- 00061    
- 00062     /* Instrucoes de branch - BBLT precisa de cond = 1111 - bx e blx2 sao do tipo MISC1 */
- 00063     ac_instr blx1;
- 00064     ac_instr b;
- 00065     ac_instr bx, blx2;
- 00066    
- 00067     /* Instrucoes de swap e multiplicacao */
- 00068     ac_instr swp, swpb, mla, mul;
- 00069     ac_instr smlal, smull, umlal, umull;
- 00070    
- 00071     /* Instrucoes de load/store */
- 00072     ac_instr ldrt1, ldrbt1, ldr1, ldrb1, strt1, strbt1, str1, strb1;
- 00073     ac_instr ldrt2, ldrbt2, ldr2, ldrb2, strt2, strbt2, str2, strb2;
- 00074     ac_instr ldrh, ldrsb, ldrsh, strh, ldrd, strd; // ldrd e strd sao instrucoes DSP
- 00075     ac_instr ldm, stm;
- 00076    
- 00077     /* Instrucoes do coprocessador */
- 00078     ac_instr cdp;
- 00079     ac_instr mcr, mrc;
- 00080     ac_instr ldc, stc;
- 00081    
- 00082     /* Instrucoes especiais */
- 00083     ac_instr bkpt;
- 00084     ac_instr swi;
- 00085     ac_instr clz;
- 00086     ac_instr mrs, msr1;
- 00087     ac_instr msr2;
- 00088    
- 00089     /* Instrucoes DSP */
- 00090     /* O tipo LSE de Load/Store possuie instrucoes DSP (ldrd e strd) */
- 00091     ac_instr dsmla, dsmlal, dsmul, dsmlaw, dsmulw;
- 00092    
- 00093     ISA_CTOR (armv5e){
- 00094    
- 00095     /* Instrucoes de processamento de dados - ULA */
- 00096     and1.set_asm("and %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00097     and1.set_decoder (op=0x00, subop1=0x00, func1=0x00);
- 00098    
- 00099     and2.set_asm("and %cond %s %rd, %rn, %rm, %shift %rs " );
- 00100     and2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x00);
- 00101    
- 00102     and3.set_asm("and %cond %s %rd, %rn, %imm8" );
- 00103     and3.set_decoder (op=0x01, func1=0x00);
- 00104    
- 00105     eor1.set_asm("eor %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00106     eor1.set_decoder (op=0x00, subop1=0x00, func1=0x01);
- 00107    
- 00108     eor2.set_asm("eor %cond %s %rd, %rn, %rm, %shift %rs " );
- 00109     eor2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x01);
- 00110    
- 00111     eor3.set_asm("eor %cond %s %rd, %rn, %imm8" );
- 00112     eor3.set_decoder (op=0x01, func1=0x01);
- 00113    
- 00114     sub1.set_asm("sub %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00115     sub1.set_decoder (op=0x00, subop1=0x00, func1=0x02);
- 00116    
- 00117     sub2.set_asm("sub %cond %s %rd, %rn, %rm, %shift %rs " );
- 00118     sub2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x02);
- 00119    
- 00120     sub3.set_asm("sub %cond %s %rd, %rn, %imm8" );
- 00121     sub3.set_decoder (op=0x01, func1=0x02);
- 00122    
- 00123     rsb1.set_asm("rsb %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00124     rsb1.set_decoder (op=0x00, subop1=0x00, func1=0x03);
- 00125    
- 00126     rsb2.set_asm("rsb %cond %s %rd, %rn, %rm, %shift %rs " );
- 00127     rsb2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x03);
- 00128    
- 00129     rsb3.set_asm("rsb %cond %s %rd, %rn, %imm8" );
- 00130     rsb3.set_decoder (op=0x01, func1=0x03);
- 00131    
- 00132     add1.set_asm("add %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00133     add1.set_decoder (op=0x00, subop1=0x00, func1=0x04);
- 00134    
- 00135     add2.set_asm("add %cond %s %rd, %rn, %rm, %shift %rs " );
- 00136     add2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x04);
- 00137    
- 00138     add3.set_asm("add %cond %s %rd, %rn, %imm8" );
- 00139     add3.set_decoder (op=0x01, func1=0x04);
- 00140    
- 00141     adc1.set_asm("adc %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00142     adc1.set_decoder (op=0x00, subop1=0x00, func1=0x05);
- 00143    
- 00144     adc2.set_asm("adc %cond %s %rd, %rn, %rm, %shift %rs" );
- 00145     adc2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x05);
- 00146    
- 00147     adc3.set_asm("adc %cond %s %rd, %rn, %imm8" );
- 00148     adc3.set_decoder (op=0x01, func1=0x05);
- 00149    
- 00150     sbc1.set_asm("sbc %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00151     sbc1.set_decoder (op=0x00, subop1=0x00, func1=0x06);
- 00152    
- 00153     sbc2.set_asm("sbc %cond %s %rd, %rn, %rm, %shift %rs " );
- 00154     sbc2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x06);
- 00155    
- 00156     sbc3.set_asm("sbc %cond %s %rd, %rn, %imm8" );
- 00157     sbc3.set_decoder (op=0x01, func1=0x06);
- 00158    
- 00159     rsc1.set_asm("rsc %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00160     rsc1.set_decoder (op=0x00, subop1=0x00, func1=0x07);
- 00161    
- 00162     rsc2.set_asm("rsc %cond %s %rd, %rn, %rm, %shift %rs " );
- 00163     rsc2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x07);
- 00164    
- 00165     rsc3.set_asm("rsc %cond %s %rd, %rn, %imm8" );
- 00166     rsc3.set_decoder (op=0x01, func1=0x07);
- 00167    
- 00168     tst1.set_asm("tst %cond %rd, %rn, %rm, %shift %shiftamount" );
- 00169     tst1.set_decoder (op=0x00, subop1=0x00, func1=0x08, s=0x01);
- 00170    
- 00171     tst2.set_asm("tst %cond %rd, %rn, %rm, %shift %rs " );
- 00172     tst2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x08, s=0x01);
- 00173    
- 00174     tst3.set_asm("tst %cond %rd, %rn, %imm8" );
- 00175     tst3.set_decoder (op=0x01, func1=0x08, s=0x01);
- 00176    
- 00177     teq1.set_asm("teq %cond %rd, %rn, %rm, %shift %shiftamount" );
- 00178     teq1.set_decoder (op=0x00, subop1=0x00, func1=0x09, s=0x01);
- 00179    
- 00180     teq2.set_asm("teq %cond %rd, %rn, %rm, %shift %rs " );
- 00181     teq2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x09, s=0x01);
- 00182    
- 00183     teq3.set_asm("teq %cond %rd, %rn, %imm8" );
- 00184     teq3.set_decoder (op=0x01, func1=0x09, s=0x01);
- 00185    
- 00186     cmp1.set_asm("cmp %cond %rd, %rn, %rm, %shift %shiftamount" );
- 00187     cmp1.set_decoder (op=0x00, subop1=0x00, func1=0x0A, s=0x01);
- 00188    
- 00189     cmp2.set_asm("cmp %cond %rd, %rn, %rm, %shift %rs " );
- 00190     cmp2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x0A, s=0x01);
- 00191    
- 00192     cmp3.set_asm("cmp %cond %rd, %rn, %imm8" );
- 00193     cmp3.set_decoder (op=0x01, func1=0x0A, s=0x01);
- 00194    
- 00195     cmn1.set_asm("cmn %cond %rd, %rn, %rm, %shift %shiftamount" );
- 00196     cmn1.set_decoder (op=0x00, subop1=0x00, func1=0x0B, s=0x01);
- 00197    
- 00198     cmn2.set_asm("cmn %cond %rd, %rn, %rm, %shift %rs " );
- 00199     cmn2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x0B, s=0x01);
- 00200    
- 00201     cmn3.set_asm("cmn %cond %rd, %rn, %imm8" );
- 00202     cmn3.set_decoder (op=0x01, func1=0x0B, s=0x01);
- 00203    
- 00204     orr1.set_asm("orr %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00205     orr1.set_decoder (op=0x00, subop1=0x00, func1=0x0C);
- 00206    
- 00207     orr2.set_asm("orr %cond %s %rd, %rn, %rm, %shift %rs " );
- 00208     orr2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x0C);
- 00209    
- 00210     orr3.set_asm("orr %cond %s %rd, %rn, %imm8" );
- 00211     orr3.set_decoder (op=0x01, func1=0x0C);
- 00212    
- 00213     mov1.set_asm("mov %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00214     mov1.set_decoder (op=0x00, subop1=0x00, func1=0x0D);
- 00215    
- 00216     mov2.set_asm("mov %cond %s %rd, %rn, %rm, %shift %rs " );
- 00217     mov2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x0D);
- 00218    
- 00219     mov3.set_asm("mov %cond %s %rd, %rn, %imm8" );
- 00220     mov3.set_decoder (op=0x01, func1=0x0D);
- 00221    
- 00222     bic1.set_asm("bic %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00223     bic1.set_decoder (op=0x00, subop1=0x00, func1=0x0E);
- 00224    
- 00225     bic2.set_asm("bic %cond %s %rd, %rn, %rm, %shift %rs " );
- 00226     bic2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x0E);
- 00227    
- 00228     bic3.set_asm("bic %cond %s %rd, %rn, %imm8" );
- 00229     bic3.set_decoder (op=0x01, func1=0x0E);
- 00230    
- 00231     mvn1.set_asm("mvn %cond %s %rd, %rn, %rm, %shift %shiftamount" );
- 00232     mvn1.set_decoder (op=0x00, subop1=0x00, func1=0x0F);
- 00233    
- 00234     mvn2.set_asm("mvn %cond %s %rd, %rn, %rm, %shift %rs " );
- 00235     mvn2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x0F);
- 00236    
- 00237     mvn3.set_asm("mvn %cond %s %rd, %rn, %imm8" );
- 00238     mvn3.set_decoder (op=0x01, func1=0x0F);
- 00239    
- 00240    
- 00241     /* Instrucoes de branch - BBLT precisa de cond = 1111*/
- 00242     blx1.set_asm ("blx %offset" );
- 00243     blx1.set_decoder(op=0x05, cond =0x0F);
- 00244    
- 00245     b.set_asm("b %h %cond %offset" );
- 00246     b.set_decoder (op=0x05);
- 00247    
- 00248     bx.set_asm("bx %cond %rm" );
- 00249     bx.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x09, s=0x00, func2=0x00);
- 00250    
- 00251     blx2.set_asm("blx %cond %rm" );
- 00252     blx2.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x09, s=0x00, func2=0x01);
- 00253    
- 00254    
- 00255     /* Instrucoes de swap e multiplicacao */
- 00256     swp.set_asm("swp %cond %rd, %rm, %rn" );
- 00257     swp.set_decoder (op=0x00, subop1=0x01, subop2=0x01, func1=0x08, func2=0x00, s=0x00);
- 00258    
- 00259     swpb.set_asm("swpb %cond %rd, %rm, %rn" );
- 00260     swpb.set_decoder (op=0x00, subop1=0x01, subop2=0x01, func1=0x0A, func2=0x00, s=0x00);
- 00261    
- 00262     mul.set_asm("mul %cond %s, %rd, %rm, %rs" );
- 00263     mul.set_decoder (op=0x00, subop1=0x01, subop2=0x01, func1=0x00, func2=0x00);
- 00264    
- 00265     mla.set_asm("mla %cond %s, %rd, %rm, %rs, %rn" );
- 00266     mla.set_decoder (op=0x00, subop1=0x01, subop2=0x01, func1=0x01, func2=0x00);
- 00267    
- 00268     smlal.set_asm("smlal %cond %s %rdlo, %rdhi, %rm, %rs" );
- 00269     smlal.set_decoder (op=0x00, subop1=0x01, subop2=0x01, func1=0x07, func2=0x00);
- 00270    
- 00271     smull.set_asm("smull %cond %s %rdlo, %rdhi, %rm, %rs" );
- 00272     smull.set_decoder (op=0x00, subop1=0x01, subop2=0x01, func1=0x06, func2=0x00);
- 00273    
- 00274     umlal.set_asm("umlal %cond %s %rdlo, %rdhi, %rm, %rs" );
- 00275     umlal.set_decoder (op=0x00, subop1=0x01, subop2=0x01, func1=0x05, func2=0x00);
- 00276    
- 00277     umull.set_asm("umull %cond %s %rdlo, %rdhi, %rm, %rs" );
- 00278     umull.set_decoder (op=0x00, subop1=0x01, subop2=0x01, func1=0x04, func2=0x00);
- 00279    
- 00280    
- 00281     /* Instrucoes de load/store */
- 00282     ldrt1.set_asm("ldrt %cond %rd, %rn, %imm12 %w" );
- 00283     ldrt1.set_decoder (op=0x02, p=0x00, b=0x00, w=0x01, l=0x01);
- 00284    
- 00285     ldrt2.set_asm("ldrt %cond %rd, %rn, %rm, %shift %shiftamount %w" );
- 00286     ldrt2.set_decoder (op=0x03, subop1=0x00, p=0x00, b=0x00, w=0x01, l=0x01);
- 00287    
- 00288     ldrbt1.set_asm("ldrbt %cond %rd, %rn, %imm12 %w" );
- 00289     ldrbt1.set_decoder (op=0x02, p=0x00, b=0x01, w=0x01, l=0x01);
- 00290    
- 00291     ldrbt2.set_asm("ldrbt %cond %rd, %rn, %rm, %shift %shiftamount %w" );
- 00292     ldrbt2.set_decoder (op=0x03, subop1=0x00, p=0x00, b=0x01, w=0x01, l=0x01);
- 00293    
- 00294     ldr1.set_asm("ldr %cond %rd, %rn, %imm12 %w" );
- 00295     ldr1.set_decoder (op=0x02, b=0x00, l=0x01);
- 00296    
- 00297     ldr2.set_asm("ldr %cond %rd, %rn, %rm, %shift %shiftamount %w" );
- 00298     ldr2.set_decoder (op=0x03, subop1=0x00, b=0x00, l=0x01);
- 00299    
- 00300     ldrb1.set_asm("ldrb %cond %rd, %rn, %imm12 %w" );
- 00301     ldrb1.set_decoder (op=0x02, b=0x01, l=0x01);
- 00302    
- 00303     ldrb2.set_asm("ldrb %cond %rd, %rn, %rm, %shift %shiftamount %w" );
- 00304     ldrb2.set_decoder (op=0x03, subop1=0x00, b=0x01, l=0x01);
- 00305    
- 00306     ldrh.set_asm("ldrh %cond %rd, %addr1 %addr2" );
- 00307     ldrh.set_decoder (op=0x00, subop1=0x01, subop2=0x01, ss=0x00, hh=0x01, l=0x01);
- 00308    
- 00309     ldrsb.set_asm("ldrsb %cond %rd, %addr1 %addr2" );
- 00310     ldrsb.set_decoder (op=0x00, subop1=0x01, subop2=0x01, ss=0x01, hh=0x00, l=0x01);
- 00311    
- 00312     ldrsh.set_asm("ldrsh %cond %rd, %addr1 %addr2" );
- 00313     ldrsh.set_decoder (op=0x00, subop1=0x01, subop2=0x01, ss=0x01, hh=0x01, l=0x01);
- 00314    
- 00315     strt1.set_asm("strt %cond %rd, %rn, %imm12 %w" );
- 00316     strt1.set_decoder (op=0x02, p=0x00, b=0x00, w=0x01, l=0x00);
- 00317    
- 00318     strt2.set_asm("strt %cond %rd, %rn, %rm, %shift %shiftamount %w" );
- 00319     strt2.set_decoder (op=0x03, subop1=0x00, p=0x00, b=0x00, w=0x01, l=0x00);
- 00320    
- 00321     strbt1.set_asm("strbt %cond %rd, %rn, %imm12 %w" );
- 00322     strbt1.set_decoder (op=0x02, p=0x00, b=0x01, w=0x01, l=0x00);
- 00323    
- 00324     strbt2.set_asm("strbt %cond %rd, %rn, %rm, %shift %shiftamount %w" );
- 00325     strbt2.set_decoder (op=0x03, subop1=0x00, p=0x00, b=0x01, w=0x01, l=0x00);
- 00326    
- 00327     str1.set_asm("str %cond %rd, %rn, %imm12 %w" );
- 00328     str1.set_decoder (op=0x02, b=0x00, l=0x00);
- 00329    
- 00330     str2.set_asm("str %cond %rd, %rn, %rm, %shift %shiftamount %w" );
- 00331     str2.set_decoder (op=0x03, subop1=0x00, b=0x00, l=0x00);
- 00332    
- 00333     strb1.set_asm("strb %cond %rd, %rn, %imm12 %w" );
- 00334     strb1.set_decoder (op=0x02, b=0x01, l=0x00);
- 00335    
- 00336     strb2.set_asm("strb %cond %rd, %rn, %rm, %shift %shiftamount %w" );
- 00337     strb2.set_decoder (op=0x03, subop1=0x00, b=0x01, l=0x00);
- 00338    
- 00339     strh.set_asm("strh %cond %rd, %addr1 %addr2" );
- 00340     strh.set_decoder (op=0x00, subop1=0x01, subop2=0x01, ss=0x00, hh=0x01, l=0x00);
- 00341    
- 00342     ldm.set_asm("ldm %cond %p %u %w %rn %w, %rlist" );
- 00343     ldm.set_decoder (op=0x04, l=0x01);
- 00344    
- 00345     stm.set_asm("stm %cond %p %u %w %rn %w, %rlist" );
- 00346     stm.set_decoder (op=0x04, l=0x00);
- 00347    
- 00348    
- 00349     /* Instrucoes do coprocessador */
- 00350     cdp.set_asm("cdp %cond %cp_num, %funcc1, %crd, %crn, %crm %funcc3" );
- 00351     cdp.set_decoder (op=0x07, subop1=0x00, subop3=0x00);
- 00352    
- 00353     mcr.set_asm("mcr %cond %cp_num, %funcc2, %rd, %crn, %crm, %funcc3" );
- 00354     mcr.set_decoder (op=0x07, subop1=0x01, subop3=0x00, l=0x00);
- 00355    
- 00356     mrc.set_asm("mrc %cond %cp_num, %funcc2, %rd, %crn, %crm, %funcc3" );
- 00357     mrc.set_decoder (op=0x07, subop1=0x01, subop3=0x00, l=0x01);
- 00358    
- 00359     ldc.set_asm("ldc %cond %l %cp_num, %crd, %imm8" );
- 00360     ldc.set_decoder (op=0x06, l=0x01);
- 00361    
- 00362     stc.set_asm("stc %cond %l %cp_num, %crd, %imm8 %w" );
- 00363     stc.set_decoder (op=0x06, l=0x00);
- 00364    
- 00365    
- 00366     /* Instrucoes especiais */
- 00367     bkpt.set_asm ("bkpt %immediate" );
- 00368     bkpt.set_decoder(op=0x00, subop1=0x01, subop2=0x00, func1=0x09, func2=0x03, s=0x00, cond =0x0E);
- 00369    
- 00370     swi.set_asm("swi %cond %swinumber" );
- 00371     swi.set_decoder (op=0x07, subop3=0x01);
- 00372    
- 00373     clz.set_asm("clz %cond %rm %rd" );
- 00374     clz.set_decoder (op=0x00, subop1=0x01, subop2=0x00, func1=0x0B, func2=0x00, s=0x00);
- 00375    
- 00376     mrs.set_asm("mrs %cond %rn, %r" );
- 00377     mrs.set_decoder (op=0x00, subop1=0x00, subop2=0x00, func11=0x02, func12=0x00);
- 00378    
- 00379     msr1.set_asm("msr %cond %field, %rm" );
- 00380     msr1.set_decoder (op=0x00, subop1=0x00, subop2=0x00, func11=0x02, func12=0x02);
- 00381    
- 00382     msr2.set_asm("msr %cond %field, %imm8" );
- 00383     msr2.set_decoder (op=0x01, func11=0x02, func12=0x02);
- 00384    
- 00385    
- 00386     /* Instrucoes DSP */
- 00387     ldrd.set_asm("ldrd %cond %rd, %addr1 %addr2" );
- 00388     ldrd.set_decoder (op=0x00, subop1=0x01, subop2=0x01, ss=0x01, hh=0x00, l=0x00);
- 00389    
- 00390     strd.set_asm("strd %cond %rd, %addr1 %addr2" );
- 00391     strd.set_decoder (op=0x00, subop1=0x01, subop2=0x01, ss=0x01, hh=0x01, l=0x00);
- 00392    
- 00393     dsmla.set_asm ("" );
- 00394     dsmla.set_decoder (sm=0x10, subop2=1, subop1=0);
- 00395    
- 00396     dsmlal.set_asm ("" );
- 00397     dsmlal.set_decoder (sm=0x14, subop2=1, subop1=0);
- 00398    
- 00399     dsmlaw.set_asm ("" );
- 00400     dsmlaw.set_decoder (sm=0x12, subop2=1, xx=0, subop1=0);
- 00401    
- 00402     dsmul.set_asm ("" );
- 00403     dsmul.set_decoder (sm=0x16, subop2=1, subop1=0);
- 00404    
- 00405     dsmulw.set_asm ("" );
- 00406     dsmulw.set_decoder (sm=0x12, subop2=1, xx=1, subop1=0);
- 00407    
- 00408     };
- 00409     };