system_conf Project Status
Project File: fpu_core.xise Parser Errors:
Module Name: system_conf Implementation State: New
Target Device: xc5vlx330-2ff1760
  • Errors:
 
Product Version:ISE 14.7
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
Power ReportCurrentto 5. jun 19:43:26 2014   
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 06/10/2014 - 16:15:37