Environment Settings | ||||
Environment Variable | xst | ngdbuild | map | par |
PATHEXT | .COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC |
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Path | C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64; C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64; C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64; C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64; C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav; C:\Xilinx\14.7\ISE_DS\PlanAhead\bin; C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64; C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64; C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin; C:\Xilinx\14.7\ISE_DS\common\bin\nt64; C:\Xilinx\14.7\ISE_DS\common\lib\nt64; C:\Program Files (x86)\AMD APP\bin\x86_64; C:\Program Files (x86)\AMD APP\bin\x86; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files (x86)\Intel\OpenCL SDK\3.0\bin\x86; C:\Program Files (x86)\Intel\OpenCL SDK\3.0\bin\x64; C:\Program Files (x86)\ATI Technologies\ATI.ACE\Core-Static; C:\Program Files\TortoiseSVN\bin; C:\Program Files (x86)\MiKTeX 2.9\miktex\bin\; D:\Program Files\MATLAB\R2013b\runtime\win64; D:\Program Files\MATLAB\R2013b\bin; C:\Program Files\MATLAB\R2013b\bin; D:\Program Files\MATLAB\R2013b\polyspace\bin; D:\altera\13.1\modelsim_ase\win32aloem; C:\Modeltech_pe_edu_10.3\win32pe_edu |
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XILINX | C:\Xilinx\14.7\ISE_DS\ISE\ | < data not available > | < data not available > | < data not available > |
XILINX_DSP | C:\Xilinx\14.7\ISE_DS\ISE | < data not available > | < data not available > | < data not available > |
XILINX_EDK | C:\Xilinx\14.7\ISE_DS\EDK | < data not available > | < data not available > | < data not available > |
XILINX_PLANAHEAD | C:\Xilinx\14.7\ISE_DS\PlanAhead | < data not available > | < data not available > | < data not available > |
Synthesis Property Settings | |||
Switch Name | Property Name | Value | Default Value |
-ifn | fpu_adder_conf.prj | ||
-ifmt | mixed | MIXED | |
-ofn | fpu_adder_conf | ||
-ofmt | NGC | NGC | |
-p | xc5vlx330-1-ff1760 | ||
-top | fpu_adder_conf | ||
-opt_mode | Optimization Goal | Speed | SPEED |
-opt_level | Optimization Effort | 1 | 1 |
-power | Power Reduction | NO | NO |
-iuc | Use synthesis Constraints File | NO | NO |
-keep_hierarchy | Keep Hierarchy | No | NO |
-netlist_hierarchy | Netlist Hierarchy | As_Optimized | as_optimized |
-rtlview | Generate RTL Schematic | Yes | NO |
-glob_opt | Global Optimization Goal | AllClockNets | ALLCLOCKNETS |
-read_cores | Read Cores | YES | YES |
-sd | Cores Search Directories | {"ipcore_dir" } | |
-write_timing_constraints | Write Timing Constraints | NO | NO |
-cross_clock_analysis | Cross Clock Analysis | NO | NO |
-bus_delimiter | Bus Delimiter | <> | <> |
-slice_utilization_ratio | Slice Utilization Ratio | 100 | 100% |
-bram_utilization_ratio | BRAM Utilization Ratio | 100 | 100% |
-dsp_utilization_ratio | DSP Utilization Ratio | 100 | 100% |
-reduce_control_sets | Auto | OFF | |
-verilog2001 | Verilog 2001 | YES | YES |
-fsm_extract | YES | YES | |
-fsm_encoding | Auto | AUTO | |
-safe_implementation | No | NO | |
-fsm_style | LUT | LUT | |
-ram_extract | Yes | YES | |
-ram_style | Auto | AUTO | |
-rom_extract | Yes | YES | |
-shreg_extract | YES | YES | |
-rom_style | Auto | AUTO | |
-auto_bram_packing | NO | NO | |
-resource_sharing | YES | YES | |
-async_to_sync | NO | NO | |
-use_dsp48 | Auto | AUTO | |
-iobuf | YES | YES | |
-max_fanout | 100000 | 100000 | |
-bufg | 32 | 32 | |
-register_duplication | YES | YES | |
-register_balancing | No | NO | |
-optimize_primitives | NO | NO | |
-use_clock_enable | Auto | AUTO | |
-use_sync_set | Auto | AUTO | |
-use_sync_reset | Auto | AUTO | |
-iob | Auto | AUTO | |
-equivalent_register_removal | YES | YES | |
-slice_utilization_ratio_maxmargin | 5 | 0% |
Operating System Information | ||||
Operating System Information | xst | ngdbuild | map | par |
CPU Architecture/Speed | Intel(R) Core(TM) i7-4770K CPU @ 3.50GHz/3498 MHz | < data not available > | < data not available > | < data not available > |
Host | Audun-PC | < data not available > | < data not available > | < data not available > |
OS Name | Microsoft Windows 7 , 64-bit | < data not available > | < data not available > | < data not available > |
OS Release | Service Pack 1 (build 7601) | < data not available > | < data not available > | < data not available > |