Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:12.1 (WebPack) - M.53d Target Family: Virtex5
OS Platform: NT Target Device: xc5vlx50
Project ID (random number) d91a85d1b0d54f0bb945a28681cf8284.5c9183be067b4626a5f183a9d5277e57.15 Target Package: ff676
Registration ID 179751307_0_0_508 Target Speed: -1
Date Generated 2010-06-04T23:05:14 Tool Flow CommandLine
 
User Environment
OS Name Microsoft Windows Vista , 32-bit OS Release Service Pack 2 (build 6002)
CPU Name Intel(R) Core(TM)2 Duo CPU P8400 @ 2.26GHz CPU Speed 2261 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
  MiscellaneousStatistics
  • AGG_BONDED_IO=31
  • AGG_IO=31
  • AGG_LOCED_IO=31
  • AGG_SLICE=1340
  • NUM_BONDED_IOB=31
  • NUM_BSCAN=1
  • NUM_BSFULL=1534
  • NUM_BSLUTONLY=1361
  • NUM_BSREGONLY=1102
  • NUM_BSUSED=3997
  • NUM_BUFG=4
  • NUM_DPRAM_O5ANDO6=84
  • NUM_DPRAM_O6ONLY=4
  • NUM_DSP48E=5
  • NUM_ILOGIC=18
  • NUM_IOB_FF=61
  • NUM_LOCED_IOB=31
  • NUM_LOGIC_O5ANDO6=129
  • NUM_LOGIC_O5ONLY=129
  • NUM_LOGIC_O6ONLY=2449
  • NUM_LUT_RT_EXO6=10
  • NUM_LUT_RT_O5=26
  • NUM_LUT_RT_O5ANDO6=2
  • NUM_LUT_RT_O6=129
  • NUM_OLOGIC=27
  • NUM_PLL_ADV=1
  • NUM_RAMB36_EXP=32
  • NUM_SLICEL=1275
  • NUM_SLICEM=65
  • NUM_SLICE_CARRY4=118
  • NUM_SLICE_CONTROLSET=247
  • NUM_SLICE_CYINIT=3290
  • NUM_SLICE_F7MUX=126
  • NUM_SLICE_F8MUX=2
  • NUM_SLICE_FF=2634
  • NUM_SLICE_LATCHTHRU=2
  • NUM_SLICE_UNUSEDCTRL=265
  • NUM_SRL_O5ONLY=1
  • NUM_SRL_O6ONLY=87
  • NUM_UNUSABLE_FF_BELS=466
  • Xilinx Core clock_generator_v3_02_a=1
  • Xilinx Core lmb_bram_elaborate_v1_00_a=1
  • Xilinx Core lmb_bram_if_cntlr_v2_10_b=2
  • Xilinx Core lmb_v10_v1_00_a=2
  • Xilinx Core mdm_v1_00_g=1
  • Xilinx Core microblaze_v7_30_a=1
  • Xilinx Core plb_v46_v1_04_a=1
  • Xilinx Core proc_sys_reset_v2_00_a=1
  • Xilinx Core xps_intc_v2_01_a=1
  • Xilinx Core xps_sysace_v1_01_a=1
  • Xilinx Core xps_uartlite_v1_01_a=1
NetStatistics
  • NumNets_Active=4911
  • NumNets_Gnd=1
  • NumNets_Vcc=2
  • NumNodesOfType_Active_BOUNCEACROSS=740
  • NumNodesOfType_Active_BOUNCEIN=2861
  • NumNodesOfType_Active_BUFGOUT=4
  • NumNodesOfType_Active_CLKPIN=1253
  • NumNodesOfType_Active_CNTRLPIN=1473
  • NumNodesOfType_Active_DOUBLE=17577
  • NumNodesOfType_Active_GENERIC=8
  • NumNodesOfType_Active_GLOBAL=159
  • NumNodesOfType_Active_HLONG=247
  • NumNodesOfType_Active_INPUT=16732
  • NumNodesOfType_Active_IOBIN2OUT=36
  • NumNodesOfType_Active_IOBINPUT=59
  • NumNodesOfType_Active_IOBOUTPUT=80
  • NumNodesOfType_Active_OUTBOUND=4939
  • NumNodesOfType_Active_OUTPUT=5133
  • NumNodesOfType_Active_PADINPUT=43
  • NumNodesOfType_Active_PADOUTPUT=20
  • NumNodesOfType_Active_PENT=4985
  • NumNodesOfType_Active_PINBOUNCE=6834
  • NumNodesOfType_Active_PINFEED=19245
  • NumNodesOfType_Active_VLONG=413
  • NumNodesOfType_Gnd_BOUNCEACROSS=12
  • NumNodesOfType_Gnd_BOUNCEIN=329
  • NumNodesOfType_Gnd_CLKPIN=3
  • NumNodesOfType_Gnd_CNTRLPIN=53
  • NumNodesOfType_Gnd_DOUBLE=12
  • NumNodesOfType_Gnd_HGNDOUT=176
  • NumNodesOfType_Gnd_INPUT=1456
  • NumNodesOfType_Gnd_OUTBOUND=12
  • NumNodesOfType_Gnd_OUTPUT=13
  • NumNodesOfType_Gnd_PINBOUNCE=704
  • NumNodesOfType_Gnd_PINFEED=1512
  • NumNodesOfType_Vcc_BOUNCEIN=128
  • NumNodesOfType_Vcc_CLKPIN=128
  • NumNodesOfType_Vcc_CNTRLPIN=21
  • NumNodesOfType_Vcc_HVCCOUT=64
  • NumNodesOfType_Vcc_INPUT=670
  • NumNodesOfType_Vcc_KVCCOUT=217
  • NumNodesOfType_Vcc_PINBOUNCE=187
  • NumNodesOfType_Vcc_PINFEED=819
SiteStatistics
  • BUFG-BUFGCTRL=4
  • IOB-IOBM=15
  • IOB-IOBS=16
  • RAMB36_EXP-RAMBFIFO36=32
  • SLICEL-SLICEM=313
SiteSummary
  • BSCAN=1
  • BSCAN_BSCAN=1
  • BUFG=4
  • BUFG_BUFG=4
  • DSP48E=5
  • DSP48E_DSP48E=5
  • ILOGIC=18
  • ILOGIC_IFF=18
  • IOB=31
  • IOB_IINV=1
  • IOB_INBUF=20
  • IOB_OUTBUF=27
  • IOB_PAD=31
  • IOB_PULL=1
  • OLOGIC=27
  • OLOGIC_OUTFF=27
  • OLOGIC_TFF=16
  • PLL_ADV=1
  • PLL_ADV_PLL_ADV=1
  • RAMB36_EXP=32
  • RAMB36_EXP_RAMB36_EXP=32
  • SLICEL=1275
  • SLICEL_A5LUT=82
  • SLICEL_A6LUT=851
  • SLICEL_AFF=749
  • SLICEL_B5LUT=68
  • SLICEL_B6LUT=673
  • SLICEL_BFF=663
  • SLICEL_C5LUT=66
  • SLICEL_C6LUT=580
  • SLICEL_CARRY4=116
  • SLICEL_CFF=571
  • SLICEL_CYINITGND=10
  • SLICEL_CYINITVCC=15
  • SLICEL_D5LUT=66
  • SLICEL_D6LUT=592
  • SLICEL_DFF=600
  • SLICEL_F7AMUX=68
  • SLICEL_F7BMUX=58
  • SLICEL_F8MUX=2
  • SLICEM=65
  • SLICEM_A5LUT=23
  • SLICEM_A6LUT=62
  • SLICEM_AFF=23
  • SLICEM_B5LUT=22
  • SLICEM_B6LUT=52
  • SLICEM_BFF=12
  • SLICEM_C5LUT=22
  • SLICEM_C6LUT=46
  • SLICEM_CARRY4=2
  • SLICEM_CFF=14
  • SLICEM_D5LUT=22
  • SLICEM_D6LUT=38
  • SLICEM_DFF=4
 
Configuration Data
BSCAN_BSCAN
  • JTAG_CHAIN=[2:1]
DSP48E
  • ALUMODE0=[ALUMODE0:5] [ALUMODE0_INV:0]
  • ALUMODE1=[ALUMODE1:5] [ALUMODE1_INV:0]
  • ALUMODE2=[ALUMODE2:5] [ALUMODE2_INV:0]
  • ALUMODE3=[ALUMODE3:5] [ALUMODE3_INV:0]
  • CARRYIN=[CARRYIN:5] [CARRYIN_INV:0]
  • CLK=[CLK:5] [CLK_INV:0]
  • OPMODE0=[OPMODE0:5] [OPMODE0_INV:0]
  • OPMODE1=[OPMODE1_INV:0] [OPMODE1:5]
  • OPMODE2=[OPMODE2:5] [OPMODE2_INV:0]
  • OPMODE3=[OPMODE3:5] [OPMODE3_INV:0]
  • OPMODE4=[OPMODE4:5] [OPMODE4_INV:0]
  • OPMODE5=[OPMODE5_INV:0] [OPMODE5:5]
  • OPMODE6=[OPMODE6_INV:0] [OPMODE6:5]
DSP48E_DSP48E
  • ACASCREG=[0:4] [1:1]
  • ALUMODE0=[ALUMODE0:5] [ALUMODE0_INV:0]
  • ALUMODE1=[ALUMODE1:5] [ALUMODE1_INV:0]
  • ALUMODE2=[ALUMODE2:5] [ALUMODE2_INV:0]
  • ALUMODE3=[ALUMODE3:5] [ALUMODE3_INV:0]
  • ALUMODEREG=[0:5]
  • AREG=[0:4] [1:1]
  • AUTORESET_OVER_UNDER_FLOW=[FALSE:5]
  • AUTORESET_PATTERN_DETECT=[FALSE:5]
  • AUTORESET_PATTERN_DETECT_OPTINV=[MATCH:5]
  • A_INPUT=[DIRECT:5]
  • BCASCREG=[0:4] [1:1]
  • BREG=[0:4] [1:1]
  • B_INPUT=[DIRECT:5]
  • CARRYIN=[CARRYIN:5] [CARRYIN_INV:0]
  • CARRYINREG=[0:5]
  • CARRYINSELREG=[0:5]
  • CLK=[CLK:5] [CLK_INV:0]
  • CLOCK_INVERT_M=[SAME_EDGE:5]
  • CLOCK_INVERT_P=[SAME_EDGE:5]
  • CREG=[0:5]
  • LFSR_EN_SET=[SET:5]
  • LFSR_EN_SETVAL=[0:5]
  • MREG=[0:1] [1:4]
  • MULTCARRYINREG=[0:5]
  • OPMODE0=[OPMODE0:5] [OPMODE0_INV:0]
  • OPMODE1=[OPMODE1_INV:0] [OPMODE1:5]
  • OPMODE2=[OPMODE2:5] [OPMODE2_INV:0]
  • OPMODE3=[OPMODE3:5] [OPMODE3_INV:0]
  • OPMODE4=[OPMODE4:5] [OPMODE4_INV:0]
  • OPMODE5=[OPMODE5_INV:0] [OPMODE5:5]
  • OPMODE6=[OPMODE6_INV:0] [OPMODE6:5]
  • OPMODEREG=[0:5]
  • PREG=[0:2] [1:3]
  • ROUNDING_LSB_MASK=[0:5]
  • SCAN_IN_SETVAL_M=[0:5]
  • SCAN_IN_SETVAL_P=[0:5]
  • SCAN_IN_SET_M=[SET:5]
  • SCAN_IN_SET_P=[SET:5]
  • SEL_MASK=[MASK:5]
  • SEL_PATTERN=[PATTERN:5]
  • SEL_ROUNDING_MASK=[SEL_MASK:5]
  • TEST_SETVAL_M=[0:5]
  • TEST_SETVAL_P=[0:5]
  • TEST_SET_M=[SET:5]
  • TEST_SET_P=[SET:5]
  • USE_MULT=[MULT_S:4] [MULT:1]
  • USE_PATTERN_DETECT=[NO_PATDET:3] [PATDET:2]
  • USE_SIMD=[ONE48:5]
ILOGIC
  • CLK=[CLK:18] [CLK_INV:0]
ILOGIC_IFF
  • CK=[CK:18] [CK_INV:0]
  • IFFTYPE=[FF:18]
  • INIT_Q1=[0:17] [1:1]
  • SRTYPE=[ASYNC:16] [SYNC:2]
  • SRVAL_Q1=[0:16] [1:2]
IOB_PULL
  • PULLTYPE=[PULLUP:1]
OLOGIC
  • CLK=[CLK:27] [CLK_INV:0]
  • D1=[D1:26] [D1_INV:1]
  • T1=[T1_INV:0] [T1:16]
OLOGIC_OUTFF
  • CK=[CK:27] [CK_INV:0]
  • D1=[D1:26] [D1_INV:1]
  • INIT_OQ=[0:23] [1:4]
  • OUTFFTYPE=[FF:27]
  • SRTYPE_OQ=[ASYNC:26] [SYNC:1]
  • SRVAL_OQ=[0:23] [1:4]
OLOGIC_TFF
  • CK=[CK:16] [CK_INV:0]
  • D1=[D1:16] [D1_INV:0]
  • INIT_TQ=[1:16]
  • SRTYPE_TQ=[ASYNC:16]
  • SRVAL_TQ=[1:16]
  • TFFTYPE=[FF:16]
PLL_ADV
  • CLKINSEL=[CLKINSEL:1] [CLKINSEL_INV:0]
  • REL=[REL_INV:0] [REL:1]
  • RST=[RST:1] [RST_INV:0]
PLL_ADV_PLL_ADV
  • BANDWIDTH=[OPTIMIZED:1]
  • CLKFBOUT_DESKEW_ADJUST=[0:1]
  • CLKINSEL=[CLKINSEL:1] [CLKINSEL_INV:0]
  • CLKOUT0_DESKEW_ADJUST=[0:1]
  • CLKOUT1_DESKEW_ADJUST=[0:1]
  • CLKOUT2_DESKEW_ADJUST=[0:1]
  • CLKOUT3_DESKEW_ADJUST=[0:1]
  • CLKOUT4_DESKEW_ADJUST=[0:1]
  • CLKOUT5_DESKEW_ADJUST=[0:1]
  • CMT_TEST_CLK_SEL=[7:1]
  • COMPENSATION=[SYSTEM_SYNCHRONOUS:1]
  • DIVCLK_DIVIDE=[1:1]
  • EN_REL=[FALSE:1]
  • LOCK_FAST_FILTER=[HIGH:1]
  • LOCK_SLOW_FILTER=[HIGH:1]
  • PLL_2_DCM1_CLK_SEL=[6:1]
  • PLL_2_DCM2_CLK_SEL=[6:1]
  • PLL_AVDD_COMP_SET=[3:1]
  • PLL_AVDD_VBG_PD=[1:1]
  • PLL_AVDD_VBG_SEL=[9:1]
  • PLL_CLK0MX=[0:1]
  • PLL_CLK1MX=[0:1]
  • PLL_CLK2MX=[0:1]
  • PLL_CLK3MX=[0:1]
  • PLL_CLK4MX=[0:1]
  • PLL_CLK5MX=[0:1]
  • PLL_CLKBURST_CNT=[0:1]
  • PLL_CLKBURST_ENABLE=[FALSE:1]
  • PLL_CLKCNTRL=[0:1]
  • PLL_CLKFBMX=[0:1]
  • PLL_CLKFBOUT2_EDGE=[TRUE:1]
  • PLL_CLKFBOUT2_NOCOUNT=[TRUE:1]
  • PLL_CLKFB_MUX_SEL=[0:1]
  • PLL_CLKIN_MUX_SEL=[0:1]
  • PLL_CP_BIAS_TRIP_SHIFT=[FALSE:1]
  • PLL_CP_RES=[1:1]
  • PLL_DIRECT_PATH_CNTRL=[FALSE:1]
  • PLL_DVDD_COMP_SET=[3:1]
  • PLL_DVDD_VBG_PD=[1:1]
  • PLL_DVDD_VBG_SEL=[9:1]
  • PLL_EN=[FALSE:1]
  • PLL_EN_TCLK0=[FALSE:1]
  • PLL_EN_TCLK1=[FALSE:1]
  • PLL_EN_TCLK2=[FALSE:1]
  • PLL_EN_TCLK3=[FALSE:1]
  • PLL_EN_TCLK4=[FALSE:1]
  • PLL_EN_VCO0=[TRUE:1]
  • PLL_EN_VCO1=[TRUE:1]
  • PLL_EN_VCO2=[TRUE:1]
  • PLL_EN_VCO3=[TRUE:1]
  • PLL_EN_VCO4=[TRUE:1]
  • PLL_EN_VCO5=[TRUE:1]
  • PLL_EN_VCO6=[TRUE:1]
  • PLL_EN_VCO7=[TRUE:1]
  • PLL_EN_VCO_DIV1=[FALSE:1]
  • PLL_EN_VCO_DIV6=[FALSE:1]
  • PLL_INC_FLOCK=[TRUE:1]
  • PLL_INC_SLOCK=[TRUE:1]
  • PLL_LF_NEN=[3:1]
  • PLL_LF_PEN=[0:1]
  • PLL_LOCK_CNT=[63:1]
  • PLL_LOCK_CNT_RST_FAST=[FALSE:1]
  • PLL_MAN_LF_EN=[FALSE:1]
  • PLL_NBTI_EN=[FALSE:1]
  • PLL_PFD_CNTRL=[8:1]
  • PLL_PFD_DLY=[1:1]
  • PLL_PMCD_MODE=[FALSE:1]
  • PLL_PWRD_CFG=[FALSE:1]
  • PLL_SEL_SLIPD=[FALSE:1]
  • PLL_SKEW_CNTRL=[0:1]
  • PLL_TCK4_SEL=[0:1]
  • PLL_UNLOCK_CNT=[4:1]
  • PLL_UNLOCK_CNT_RST_FAST=[FALSE:1]
  • PLL_VLFHIGH_DIS=[FALSE:1]
  • REL=[REL_INV:0] [REL:1]
  • RESET_ON_LOSS_OF_LOCK=[FALSE:1]
  • RST=[RST:1] [RST_INV:0]
  • RST_DEASSERT_CLK=[CLKIN1:1]
  • WAIT_DCM1_LOCK=[FALSE:1]
  • WAIT_DCM2_LOCK=[FALSE:1]
RAMB36_EXP
  • CLKAL=[CLKAL_INV:0] [CLKAL:32]
  • CLKAU=[CLKAU:32] [CLKAU_INV:0]
  • CLKBL=[CLKBL:32] [CLKBL_INV:0]
  • CLKBU=[CLKBU:32] [CLKBU_INV:0]
  • ENAL=[ENAL_INV:0] [ENAL:32]
  • ENAU=[ENAU_INV:0] [ENAU:32]
  • ENBL=[ENBL_INV:0] [ENBL:32]
  • ENBU=[ENBU_INV:0] [ENBU:32]
  • REGCLKAL=[REGCLKAL:0] [REGCLKAL_INV:32]
  • REGCLKAU=[REGCLKAU_INV:32] [REGCLKAU:0]
  • REGCLKBL=[REGCLKBL_INV:32] [REGCLKBL:0]
  • REGCLKBU=[REGCLKBU_INV:32] [REGCLKBU:0]
  • SSRAL=[SSRAL:32] [SSRAL_INV:0]
  • SSRAU=[SSRAU:32] [SSRAU_INV:0]
  • SSRBL=[SSRBL:32] [SSRBL_INV:0]
  • SSRBU=[SSRBU:32] [SSRBU_INV:0]
RAMB36_EXP_RAMB36_EXP
  • CLKAL=[CLKAL_INV:0] [CLKAL:32]
  • CLKAU=[CLKAU:32] [CLKAU_INV:0]
  • CLKBL=[CLKBL:32] [CLKBL_INV:0]
  • CLKBU=[CLKBU:32] [CLKBU_INV:0]
  • DOA_REG=[0:32]
  • DOB_REG=[0:32]
  • ENAL=[ENAL_INV:0] [ENAL:32]
  • ENAU=[ENAU_INV:0] [ENAU:32]
  • ENBL=[ENBL_INV:0] [ENBL:32]
  • ENBU=[ENBU_INV:0] [ENBU:32]
  • RAM_EXTENSION_A=[NONE:32]
  • RAM_EXTENSION_B=[NONE:32]
  • READ_WIDTH_A=[1:32]
  • READ_WIDTH_B=[1:32]
  • REGCLKAL=[REGCLKAL:0] [REGCLKAL_INV:32]
  • REGCLKAU=[REGCLKAU_INV:32] [REGCLKAU:0]
  • REGCLKBL=[REGCLKBL_INV:32] [REGCLKBL:0]
  • REGCLKBU=[REGCLKBU_INV:32] [REGCLKBU:0]
  • SAVEDATA=[FALSE:32]
  • SSRAL=[SSRAL:32] [SSRAL_INV:0]
  • SSRAU=[SSRAU:32] [SSRAU_INV:0]
  • SSRBL=[SSRBL:32] [SSRBL_INV:0]
  • SSRBU=[SSRBU:32] [SSRBU_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:32]
  • WRITE_MODE_B=[WRITE_FIRST:32]
  • WRITE_WIDTH_A=[1:32]
  • WRITE_WIDTH_B=[1:32]
SLICEL
  • CLK=[CLK:1005] [CLK_INV:5]
SLICEL_AFF
  • AFFINIT=[INIT0:719] [INIT1:30]
  • AFFSR=[SRLOW:720] [SRHIGH:29]
  • CK=[CK:746] [CK_INV:3]
  • LATCH_OR_FF=[FF:749]
  • SYNC_ATTR=[ASYNC:173] [SYNC:576]
SLICEL_BFF
  • BFFINIT=[INIT0:637] [INIT1:26]
  • BFFSR=[SRLOW:637] [SRHIGH:26]
  • CK=[CK:661] [CK_INV:2]
  • LATCH_OR_FF=[FF:663]
  • SYNC_ATTR=[ASYNC:169] [SYNC:494]
SLICEL_CFF
  • CFFINIT=[INIT0:551] [INIT1:20]
  • CFFSR=[SRLOW:549] [SRHIGH:21]
  • CK=[CK:568] [CK_INV:3]
  • LATCH_OR_FF=[FF:570] [LATCH:1]
  • SYNC_ATTR=[ASYNC:144] [SYNC:427]
SLICEL_DFF
  • CK=[CK:597] [CK_INV:3]
  • DFFINIT=[INIT0:577] [INIT1:23]
  • DFFSR=[SRLOW:576] [SRHIGH:23]
  • LATCH_OR_FF=[FF:599] [LATCH:1]
  • SYNC_ATTR=[ASYNC:148] [SYNC:452]
SLICEM
  • CLK=[CLK:65] [CLK_INV:0]
SLICEM_A5LUT
  • A5RAMMODE=[SRL16:1] [DPRAM32:21]
  • CLK=[CLK:22] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:1] [RAM:22]
SLICEM_A6LUT
  • A6RAMMODE=[SRL16:39] [DPRAM32:21] [DPRAM64:1]
  • CLK=[CLK:61] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:1] [RAM:61]
SLICEM_AFF
  • AFFINIT=[INIT0:20] [INIT1:3]
  • AFFSR=[SRLOW:20] [SRHIGH:3]
  • CK=[CK:23] [CK_INV:0]
  • LATCH_OR_FF=[FF:23]
  • SYNC_ATTR=[ASYNC:18] [SYNC:5]
SLICEM_B5LUT
  • B5RAMMODE=[DPRAM32:21]
  • CLK=[CLK:21] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:1] [RAM:21]
SLICEM_B6LUT
  • B6RAMMODE=[SRL16:21] [DPRAM32:21] [DPRAM64:1]
  • CLK=[CLK:43] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:9] [RAM:43]
SLICEM_BFF
  • BFFINIT=[INIT0:12]
  • BFFSR=[SRLOW:12]
  • CK=[CK:12] [CK_INV:0]
  • LATCH_OR_FF=[FF:12]
  • SYNC_ATTR=[ASYNC:11] [SYNC:1]
SLICEM_C5LUT
  • C5RAMMODE=[DPRAM32:21]
  • CLK=[CLK:21] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:1] [RAM:21]
SLICEM_C6LUT
  • C6RAMMODE=[SRL16:16] [DPRAM32:21] [DPRAM64:1]
  • CLK=[CLK:38] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:8] [RAM:38]
SLICEM_CFF
  • CFFINIT=[INIT0:14]
  • CFFSR=[SRLOW:14]
  • CK=[CK:14] [CK_INV:0]
  • LATCH_OR_FF=[FF:14]
  • SYNC_ATTR=[ASYNC:13] [SYNC:1]
SLICEM_D5LUT
  • CLK=[CLK:21] [CLK_INV:0]
  • D5RAMMODE=[DPRAM32:21]
  • LUT_OR_MEM=[LUT:1] [RAM:21]
SLICEM_D6LUT
  • CLK=[CLK:33] [CLK_INV:0]
  • D6RAMMODE=[SRL16:11] [DPRAM32:21] [DPRAM64:1]
  • LUT_OR_MEM=[LUT:5] [RAM:33]
SLICEM_DFF
  • CK=[CK:4] [CK_INV:0]
  • DFFINIT=[INIT0:4]
  • DFFSR=[SRLOW:4]
  • LATCH_OR_FF=[FF:4]
  • SYNC_ATTR=[ASYNC:4]
 
Pin Data
BSCAN
  • CAPTURE=1
  • DRCK=1
  • SEL=1
  • SHIFT=1
  • TDI=1
  • TDO=1
  • UPDATE=1
BSCAN_BSCAN
  • CAPTURE=1
  • DRCK=1
  • SEL=1
  • SHIFT=1
  • TDI=1
  • TDO=1
  • UPDATE=1
BUFG
  • I0=4
  • O=4
BUFG_BUFG
  • I0=4
  • O=4
DSP48E
  • A0=5
  • A1=5
  • A10=5
  • A11=5
  • A12=5
  • A13=5
  • A14=5
  • A15=5
  • A16=5
  • A17=5
  • A18=5
  • A19=5
  • A2=5
  • A20=5
  • A21=5
  • A22=5
  • A23=5
  • A24=5
  • A25=5
  • A26=5
  • A27=5
  • A28=5
  • A29=5
  • A3=5
  • A4=5
  • A5=5
  • A6=5
  • A7=5
  • A8=5
  • A9=5
  • ALUMODE0=5
  • ALUMODE1=5
  • ALUMODE2=5
  • ALUMODE3=5
  • B0=5
  • B1=5
  • B10=5
  • B11=5
  • B12=5
  • B13=5
  • B14=5
  • B15=5
  • B16=5
  • B17=5
  • B2=5
  • B3=5
  • B4=5
  • B5=5
  • B6=5
  • B7=5
  • B8=5
  • B9=5
  • C0=5
  • C1=5
  • C10=5
  • C11=5
  • C12=5
  • C13=5
  • C14=5
  • C15=5
  • C16=5
  • C17=5
  • C18=5
  • C19=5
  • C2=5
  • C20=5
  • C21=5
  • C22=5
  • C23=5
  • C24=5
  • C25=5
  • C26=5
  • C27=5
  • C28=5
  • C29=5
  • C3=5
  • C30=5
  • C31=5
  • C32=5
  • C33=5
  • C34=5
  • C35=5
  • C36=5
  • C37=5
  • C38=5
  • C39=5
  • C4=5
  • C40=5
  • C41=5
  • C42=5
  • C43=5
  • C44=5
  • C45=5
  • C46=5
  • C47=5
  • C5=5
  • C6=5
  • C7=5
  • C8=5
  • C9=5
  • CARRYIN=5
  • CARRYINSEL0=5
  • CARRYINSEL1=5
  • CARRYINSEL2=5
  • CEA1=5
  • CEA2=5
  • CEALUMODE=5
  • CEB1=5
  • CEB2=5
  • CEC=5
  • CECARRYIN=5
  • CECTRL=5
  • CEM=5
  • CEMULTCARRYIN=5
  • CEP=5
  • CLK=5
  • OPMODE0=5
  • OPMODE1=5
  • OPMODE2=5
  • OPMODE3=5
  • OPMODE4=5
  • OPMODE5=5
  • OPMODE6=5
  • P0=2
  • P1=2
  • P10=3
  • P11=3
  • P12=3
  • P13=3
  • P14=3
  • P15=2
  • P16=2
  • P17=1
  • P18=1
  • P19=1
  • P2=2
  • P20=1
  • P21=1
  • P22=1
  • P23=1
  • P24=1
  • P25=1
  • P26=1
  • P27=1
  • P28=1
  • P29=1
  • P3=2
  • P30=1
  • P4=3
  • P5=3
  • P6=3
  • P7=3
  • P8=3
  • P9=3
  • PATTERNDETECT=2
  • PCIN0=3
  • PCIN1=3
  • PCIN10=3
  • PCIN11=3
  • PCIN12=3
  • PCIN13=3
  • PCIN14=3
  • PCIN15=3
  • PCIN16=3
  • PCIN17=3
  • PCIN18=3
  • PCIN19=3
  • PCIN2=3
  • PCIN20=3
  • PCIN21=3
  • PCIN22=3
  • PCIN23=3
  • PCIN24=3
  • PCIN25=3
  • PCIN26=3
  • PCIN27=3
  • PCIN28=3
  • PCIN29=3
  • PCIN3=3
  • PCIN30=3
  • PCIN31=3
  • PCIN32=3
  • PCIN33=3
  • PCIN34=3
  • PCIN35=3
  • PCIN36=3
  • PCIN37=3
  • PCIN38=3
  • PCIN39=3
  • PCIN4=3
  • PCIN40=3
  • PCIN41=3
  • PCIN42=3
  • PCIN43=3
  • PCIN44=3
  • PCIN45=3
  • PCIN46=3
  • PCIN47=3
  • PCIN5=3
  • PCIN6=3
  • PCIN7=3
  • PCIN8=3
  • PCIN9=3
  • PCOUT0=3
  • PCOUT1=3
  • PCOUT10=3
  • PCOUT11=3
  • PCOUT12=3
  • PCOUT13=3
  • PCOUT14=3
  • PCOUT15=3
  • PCOUT16=3
  • PCOUT17=3
  • PCOUT18=3
  • PCOUT19=3
  • PCOUT2=3
  • PCOUT20=3
  • PCOUT21=3
  • PCOUT22=3
  • PCOUT23=3
  • PCOUT24=3
  • PCOUT25=3
  • PCOUT26=3
  • PCOUT27=3
  • PCOUT28=3
  • PCOUT29=3
  • PCOUT3=3
  • PCOUT30=3
  • PCOUT31=3
  • PCOUT32=3
  • PCOUT33=3
  • PCOUT34=3
  • PCOUT35=3
  • PCOUT36=3
  • PCOUT37=3
  • PCOUT38=3
  • PCOUT39=3
  • PCOUT4=3
  • PCOUT40=3
  • PCOUT41=3
  • PCOUT42=3
  • PCOUT43=3
  • PCOUT44=3
  • PCOUT45=3
  • PCOUT46=3
  • PCOUT47=3
  • PCOUT5=3
  • PCOUT6=3
  • PCOUT7=3
  • PCOUT8=3
  • PCOUT9=3
  • RSTA=5
  • RSTALLCARRYIN=5
  • RSTALUMODE=5
  • RSTB=5
  • RSTC=5
  • RSTCTRL=5
  • RSTM=5
  • RSTP=5
DSP48E_DSP48E
  • A0=5
  • A1=5
  • A10=5
  • A11=5
  • A12=5
  • A13=5
  • A14=5
  • A15=5
  • A16=5
  • A17=5
  • A18=5
  • A19=5
  • A2=5
  • A20=5
  • A21=5
  • A22=5
  • A23=5
  • A24=5
  • A25=5
  • A26=5
  • A27=5
  • A28=5
  • A29=5
  • A3=5
  • A4=5
  • A5=5
  • A6=5
  • A7=5
  • A8=5
  • A9=5
  • ALUMODE0=5
  • ALUMODE1=5
  • ALUMODE2=5
  • ALUMODE3=5
  • B0=5
  • B1=5
  • B10=5
  • B11=5
  • B12=5
  • B13=5
  • B14=5
  • B15=5
  • B16=5
  • B17=5
  • B2=5
  • B3=5
  • B4=5
  • B5=5
  • B6=5
  • B7=5
  • B8=5
  • B9=5
  • C0=5
  • C1=5
  • C10=5
  • C11=5
  • C12=5
  • C13=5
  • C14=5
  • C15=5
  • C16=5
  • C17=5
  • C18=5
  • C19=5
  • C2=5
  • C20=5
  • C21=5
  • C22=5
  • C23=5
  • C24=5
  • C25=5
  • C26=5
  • C27=5
  • C28=5
  • C29=5
  • C3=5
  • C30=5
  • C31=5
  • C32=5
  • C33=5
  • C34=5
  • C35=5
  • C36=5
  • C37=5
  • C38=5
  • C39=5
  • C4=5
  • C40=5
  • C41=5
  • C42=5
  • C43=5
  • C44=5
  • C45=5
  • C46=5
  • C47=5
  • C5=5
  • C6=5
  • C7=5
  • C8=5
  • C9=5
  • CARRYIN=5
  • CARRYINSEL0=5
  • CARRYINSEL1=5
  • CARRYINSEL2=5
  • CEA1=5
  • CEA2=5
  • CEALUMODE=5
  • CEB1=5
  • CEB2=5
  • CEC=5
  • CECARRYIN=5
  • CECTRL=5
  • CEM=5
  • CEMULTCARRYIN=5
  • CEP=5
  • CLK=5
  • OPMODE0=5
  • OPMODE1=5
  • OPMODE2=5
  • OPMODE3=5
  • OPMODE4=5
  • OPMODE5=5
  • OPMODE6=5
  • P0=2
  • P1=2
  • P10=3
  • P11=3
  • P12=3
  • P13=3
  • P14=3
  • P15=2
  • P16=2
  • P17=1
  • P18=1
  • P19=1
  • P2=2
  • P20=1
  • P21=1
  • P22=1
  • P23=1
  • P24=1
  • P25=1
  • P26=1
  • P27=1
  • P28=1
  • P29=1
  • P3=2
  • P30=1
  • P4=3
  • P5=3
  • P6=3
  • P7=3
  • P8=3
  • P9=3
  • PATTERNDETECT=2
  • PCIN0=3
  • PCIN1=3
  • PCIN10=3
  • PCIN11=3
  • PCIN12=3
  • PCIN13=3
  • PCIN14=3
  • PCIN15=3
  • PCIN16=3
  • PCIN17=3
  • PCIN18=3
  • PCIN19=3
  • PCIN2=3
  • PCIN20=3
  • PCIN21=3
  • PCIN22=3
  • PCIN23=3
  • PCIN24=3
  • PCIN25=3
  • PCIN26=3
  • PCIN27=3
  • PCIN28=3
  • PCIN29=3
  • PCIN3=3
  • PCIN30=3
  • PCIN31=3
  • PCIN32=3
  • PCIN33=3
  • PCIN34=3
  • PCIN35=3
  • PCIN36=3
  • PCIN37=3
  • PCIN38=3
  • PCIN39=3
  • PCIN4=3
  • PCIN40=3
  • PCIN41=3
  • PCIN42=3
  • PCIN43=3
  • PCIN44=3
  • PCIN45=3
  • PCIN46=3
  • PCIN47=3
  • PCIN5=3
  • PCIN6=3
  • PCIN7=3
  • PCIN8=3
  • PCIN9=3
  • PCOUT0=3
  • PCOUT1=3
  • PCOUT10=3
  • PCOUT11=3
  • PCOUT12=3
  • PCOUT13=3
  • PCOUT14=3
  • PCOUT15=3
  • PCOUT16=3
  • PCOUT17=3
  • PCOUT18=3
  • PCOUT19=3
  • PCOUT2=3
  • PCOUT20=3
  • PCOUT21=3
  • PCOUT22=3
  • PCOUT23=3
  • PCOUT24=3
  • PCOUT25=3
  • PCOUT26=3
  • PCOUT27=3
  • PCOUT28=3
  • PCOUT29=3
  • PCOUT3=3
  • PCOUT30=3
  • PCOUT31=3
  • PCOUT32=3
  • PCOUT33=3
  • PCOUT34=3
  • PCOUT35=3
  • PCOUT36=3
  • PCOUT37=3
  • PCOUT38=3
  • PCOUT39=3
  • PCOUT4=3
  • PCOUT40=3
  • PCOUT41=3
  • PCOUT42=3
  • PCOUT43=3
  • PCOUT44=3
  • PCOUT45=3
  • PCOUT46=3
  • PCOUT47=3
  • PCOUT5=3
  • PCOUT6=3
  • PCOUT7=3
  • PCOUT8=3
  • PCOUT9=3
  • RSTA=5
  • RSTALLCARRYIN=5
  • RSTALUMODE=5
  • RSTB=5
  • RSTC=5
  • RSTCTRL=5
  • RSTM=5
  • RSTP=5
ILOGIC
  • CE1=16
  • CLK=18
  • D=2
  • DDLY=16
  • Q1=18
  • SR=18
ILOGIC_IFF
  • CE=16
  • CK=18
  • D=18
  • Q1=18
  • SR=18
IOB
  • I=20
  • O=27
  • PAD=31
  • T=16
IOB_IINV
  • IN=1
  • OUT=1
IOB_INBUF
  • OUT=20
  • PAD=20
IOB_OUTBUF
  • IN=27
  • OUT=27
  • TRI=16
IOB_PAD
  • PAD=31
IOB_PULL
  • PAD=1
OLOGIC
  • CLK=27
  • D1=27
  • OQ=27
  • SR=27
  • T1=16
  • TQ=16
OLOGIC_OUTFF
  • CK=27
  • D1=27
  • Q=27
  • SR=27
OLOGIC_TFF
  • CK=16
  • D1=16
  • Q=16
  • SR=16
PLL_ADV
  • CLKFBIN=1
  • CLKFBOUT=1
  • CLKIN1=1
  • CLKINSEL=1
  • CLKOUT0=1
  • DADDR0=1
  • DADDR1=1
  • DADDR2=1
  • DADDR3=1
  • DADDR4=1
  • DCLK=1
  • DEN=1
  • DI0=1
  • DI1=1
  • DI10=1
  • DI11=1
  • DI12=1
  • DI13=1
  • DI14=1
  • DI15=1
  • DI2=1
  • DI3=1
  • DI4=1
  • DI5=1
  • DI6=1
  • DI7=1
  • DI8=1
  • DI9=1
  • DWE=1
  • LOCKED=1
  • REL=1
  • RST=1
PLL_ADV_PLL_ADV
  • CLKFBIN=1
  • CLKFBOUT=1
  • CLKIN1=1
  • CLKINSEL=1
  • CLKOUT0=1
  • DADDR0=1
  • DADDR1=1
  • DADDR2=1
  • DADDR3=1
  • DADDR4=1
  • DCLK=1
  • DEN=1
  • DI0=1
  • DI1=1
  • DI10=1
  • DI11=1
  • DI12=1
  • DI13=1
  • DI14=1
  • DI15=1
  • DI2=1
  • DI3=1
  • DI4=1
  • DI5=1
  • DI6=1
  • DI7=1
  • DI8=1
  • DI9=1
  • DWE=1
  • LOCKED=1
  • REL=1
  • RST=1
RAMB36_EXP
  • ADDRAL0=32
  • ADDRAL1=32
  • ADDRAL10=32
  • ADDRAL11=32
  • ADDRAL12=32
  • ADDRAL13=32
  • ADDRAL14=32
  • ADDRAL15=32
  • ADDRAL2=32
  • ADDRAL3=32
  • ADDRAL4=32
  • ADDRAL5=32
  • ADDRAL6=32
  • ADDRAL7=32
  • ADDRAL8=32
  • ADDRAL9=32
  • ADDRAU0=32
  • ADDRAU1=32
  • ADDRAU10=32
  • ADDRAU11=32
  • ADDRAU12=32
  • ADDRAU13=32
  • ADDRAU14=32
  • ADDRAU2=32
  • ADDRAU3=32
  • ADDRAU4=32
  • ADDRAU5=32
  • ADDRAU6=32
  • ADDRAU7=32
  • ADDRAU8=32
  • ADDRAU9=32
  • ADDRBL0=32
  • ADDRBL1=32
  • ADDRBL10=32
  • ADDRBL11=32
  • ADDRBL12=32
  • ADDRBL13=32
  • ADDRBL14=32
  • ADDRBL15=32
  • ADDRBL2=32
  • ADDRBL3=32
  • ADDRBL4=32
  • ADDRBL5=32
  • ADDRBL6=32
  • ADDRBL7=32
  • ADDRBL8=32
  • ADDRBL9=32
  • ADDRBU0=32
  • ADDRBU1=32
  • ADDRBU10=32
  • ADDRBU11=32
  • ADDRBU12=32
  • ADDRBU13=32
  • ADDRBU14=32
  • ADDRBU2=32
  • ADDRBU3=32
  • ADDRBU4=32
  • ADDRBU5=32
  • ADDRBU6=32
  • ADDRBU7=32
  • ADDRBU8=32
  • ADDRBU9=32
  • CLKAL=32
  • CLKAU=32
  • CLKBL=32
  • CLKBU=32
  • DIA0=32
  • DIA1=32
  • DIB0=32
  • DIB1=32
  • DOA0=32
  • DOB0=32
  • ENAL=32
  • ENAU=32
  • ENBL=32
  • ENBU=32
  • REGCEAL=32
  • REGCEAU=32
  • REGCEBL=32
  • REGCEBU=32
  • REGCLKAL=32
  • REGCLKAU=32
  • REGCLKBL=32
  • REGCLKBU=32
  • SSRAL=32
  • SSRAU=32
  • SSRBL=32
  • SSRBU=32
  • WEAL0=32
  • WEAL1=32
  • WEAL2=32
  • WEAL3=32
  • WEAU0=32
  • WEAU1=32
  • WEAU2=32
  • WEAU3=32
  • WEBL0=32
  • WEBL1=32
  • WEBL2=32
  • WEBL3=32
  • WEBL4=32
  • WEBL5=32
  • WEBL6=32
  • WEBL7=32
  • WEBU0=32
  • WEBU1=32
  • WEBU2=32
  • WEBU3=32
  • WEBU4=32
  • WEBU5=32
  • WEBU6=32
  • WEBU7=32
RAMB36_EXP_RAMB36_EXP
  • ADDRAL0=32
  • ADDRAL1=32
  • ADDRAL10=32
  • ADDRAL11=32
  • ADDRAL12=32
  • ADDRAL13=32
  • ADDRAL14=32
  • ADDRAL15=32
  • ADDRAL2=32
  • ADDRAL3=32
  • ADDRAL4=32
  • ADDRAL5=32
  • ADDRAL6=32
  • ADDRAL7=32
  • ADDRAL8=32
  • ADDRAL9=32
  • ADDRAU0=32
  • ADDRAU1=32
  • ADDRAU10=32
  • ADDRAU11=32
  • ADDRAU12=32
  • ADDRAU13=32
  • ADDRAU14=32
  • ADDRAU2=32
  • ADDRAU3=32
  • ADDRAU4=32
  • ADDRAU5=32
  • ADDRAU6=32
  • ADDRAU7=32
  • ADDRAU8=32
  • ADDRAU9=32
  • ADDRBL0=32
  • ADDRBL1=32
  • ADDRBL10=32
  • ADDRBL11=32
  • ADDRBL12=32
  • ADDRBL13=32
  • ADDRBL14=32
  • ADDRBL15=32
  • ADDRBL2=32
  • ADDRBL3=32
  • ADDRBL4=32
  • ADDRBL5=32
  • ADDRBL6=32
  • ADDRBL7=32
  • ADDRBL8=32
  • ADDRBL9=32
  • ADDRBU0=32
  • ADDRBU1=32
  • ADDRBU10=32
  • ADDRBU11=32
  • ADDRBU12=32
  • ADDRBU13=32
  • ADDRBU14=32
  • ADDRBU2=32
  • ADDRBU3=32
  • ADDRBU4=32
  • ADDRBU5=32
  • ADDRBU6=32
  • ADDRBU7=32
  • ADDRBU8=32
  • ADDRBU9=32
  • CLKAL=32
  • CLKAU=32
  • CLKBL=32
  • CLKBU=32
  • DIA0=32
  • DIA1=32
  • DIB0=32
  • DIB1=32
  • DOA0=32
  • DOB0=32
  • ENAL=32
  • ENAU=32
  • ENBL=32
  • ENBU=32
  • REGCEAL=32
  • REGCEAU=32
  • REGCEBL=32
  • REGCEBU=32
  • REGCLKAL=32
  • REGCLKAU=32
  • REGCLKBL=32
  • REGCLKBU=32
  • SSRAL=32
  • SSRAU=32
  • SSRBL=32
  • SSRBU=32
  • WEAL0=32
  • WEAL1=32
  • WEAL2=32
  • WEAL3=32
  • WEAU0=32
  • WEAU1=32
  • WEAU2=32
  • WEAU3=32
  • WEBL0=32
  • WEBL1=32
  • WEBL2=32
  • WEBL3=32
  • WEBL4=32
  • WEBL5=32
  • WEBL6=32
  • WEBL7=32
  • WEBU0=32
  • WEBU1=32
  • WEBU2=32
  • WEBU3=32
  • WEBU4=32
  • WEBU5=32
  • WEBU6=32
  • WEBU7=32
SLICEL
  • A=474
  • A1=243
  • A2=399
  • A3=508
  • A4=698
  • A5=815
  • A6=841
  • AMUX=76
  • AQ=749
  • AX=529
  • B=286
  • B1=273
  • B2=414
  • B3=485
  • B4=599
  • B5=649
  • B6=666
  • BMUX=69
  • BQ=663
  • BX=385
  • C=280
  • C1=186
  • C2=289
  • C3=372
  • C4=494
  • C5=551
  • C6=571
  • CE=564
  • CIN=81
  • CLK=1010
  • CMUX=86
  • COUT=82
  • CQ=571
  • CX=421
  • D=265
  • D1=216
  • D2=335
  • D3=395
  • D4=503
  • D5=564
  • D6=582
  • DMUX=68
  • DQ=600
  • DX=385
  • SR=812
SLICEL_A5LUT
  • A1=10
  • A2=23
  • A3=14
  • A4=16
  • A5=17
  • O5=82
SLICEL_A6LUT
  • A1=242
  • A2=390
  • A3=505
  • A4=696
  • A5=815
  • A6=841
  • O6=851
SLICEL_AFF
  • CE=439
  • CK=749
  • D=749
  • Q=749
  • REV=13
  • SR=602
SLICEL_B5LUT
  • A1=12
  • A2=21
  • A3=11
  • A4=9
  • A5=15
  • O5=68
SLICEL_B6LUT
  • A1=273
  • A2=408
  • A3=484
  • A4=599
  • A5=649
  • A6=666
  • O6=673
SLICEL_BFF
  • CE=391
  • CK=663
  • D=663
  • Q=663
  • REV=7
  • SR=515
SLICEL_C5LUT
  • A1=10
  • A2=18
  • A3=10
  • A4=10
  • A5=14
  • O5=66
SLICEL_C6LUT
  • A1=186
  • A2=284
  • A3=369
  • A4=493
  • A5=551
  • A6=571
  • O6=580
SLICEL_CARRY4
  • CIN=81
  • CO0=2
  • CO1=5
  • CO2=7
  • CO3=90
  • CYINIT=35
  • DI0=107
  • DI1=103
  • DI2=97
  • DI3=87
  • O0=80
  • O1=78
  • O2=75
  • O3=74
  • S0=116
  • S1=110
  • S2=103
  • S3=96
SLICEL_CFF
  • CE=348
  • CK=571
  • D=571
  • Q=571
  • REV=1
  • SR=443
SLICEL_CYINITGND
  • 0=10
SLICEL_CYINITVCC
  • 1=15
SLICEL_D5LUT
  • A1=12
  • A2=17
  • A3=10
  • A4=10
  • A5=14
  • O5=66
SLICEL_D6LUT
  • A1=214
  • A2=330
  • A3=394
  • A4=502
  • A5=563
  • A6=582
  • O6=592
SLICEL_DFF
  • CE=369
  • CK=600
  • D=600
  • Q=600
  • REV=5
  • SR=465
SLICEL_F7AMUX
  • 0=68
  • 1=68
  • OUT=68
  • S0=68
SLICEL_F7BMUX
  • 0=58
  • 1=58
  • OUT=58
  • S0=58
SLICEL_F8MUX
  • 0=2
  • 1=2
  • OUT=2
  • S0=2
SLICEM
  • A=44
  • A1=62
  • A2=62
  • A3=63
  • A4=63
  • A5=63
  • A6=62
  • AI=60
  • AMUX=18
  • AQ=23
  • AX=8
  • B=44
  • B1=46
  • B2=48
  • B3=48
  • B4=51
  • B5=52
  • B6=52
  • BI=42
  • BMUX=17
  • BQ=12
  • BX=7
  • C=37
  • C1=41
  • C2=42
  • C3=44
  • C4=45
  • C5=46
  • C6=46
  • CE=65
  • CI=37
  • CIN=2
  • CLK=65
  • CMUX=16
  • COUT=1
  • CQ=14
  • CX=6
  • D=12
  • D1=33
  • D2=35
  • D3=36
  • D4=37
  • D5=38
  • D6=38
  • DI=32
  • DMUX=6
  • DQ=4
  • DX=23
  • SR=5
  • WE=6
SLICEM_A5LUT
  • A1=22
  • A2=22
  • A3=23
  • A4=23
  • A5=22
  • CLK=22
  • DI1=22
  • O5=23
  • WA1=21
  • WA2=21
  • WA3=21
  • WA4=21
  • WA5=21
  • WE=22
SLICEM_A6LUT
  • A1=61
  • A2=61
  • A3=62
  • A4=62
  • A5=62
  • A6=62
  • CLK=61
  • DI1=1
  • DI2=60
  • MC31=6
  • O6=61
  • WA1=22
  • WA2=22
  • WA3=22
  • WA4=22
  • WA5=22
  • WA6=22
  • WE=61
SLICEM_AFF
  • CE=6
  • CK=23
  • D=23
  • Q=23
  • SR=5
SLICEM_B5LUT
  • A1=21
  • A2=21
  • A3=21
  • A4=21
  • A5=21
  • CLK=21
  • DI1=21
  • O5=22
  • WA1=21
  • WA2=21
  • WA3=21
  • WA4=21
  • WA5=21
  • WE=21
SLICEM_B6LUT
  • A1=46
  • A2=48
  • A3=48
  • A4=51
  • A5=52
  • A6=52
  • CLK=43
  • DI1=1
  • DI2=42
  • MC31=1
  • O6=52
  • WA1=22
  • WA2=22
  • WA3=22
  • WA4=22
  • WA5=22
  • WA6=22
  • WE=43
SLICEM_BFF
  • CE=6
  • CK=12
  • D=12
  • Q=12
  • SR=1
SLICEM_C5LUT
  • A1=21
  • A2=21
  • A3=21
  • A4=21
  • A5=21
  • CLK=21
  • DI1=21
  • O5=22
  • WA1=21
  • WA2=21
  • WA3=21
  • WA4=21
  • WA5=21
  • WE=21
SLICEM_C6LUT
  • A1=41
  • A2=42
  • A3=44
  • A4=45
  • A5=46
  • A6=46
  • CLK=38
  • DI1=1
  • DI2=37
  • O6=46
  • WA1=22
  • WA2=22
  • WA3=22
  • WA4=22
  • WA5=22
  • WA6=22
  • WE=38
SLICEM_CARRY4
  • CIN=2
  • CO3=1
  • DI0=2
  • DI1=1
  • DI2=1
  • DI3=1
  • O0=1
  • O1=1
  • S0=2
  • S1=2
  • S2=1
  • S3=1
SLICEM_CFF
  • CE=6
  • CK=14
  • D=14
  • Q=14
  • SR=1
SLICEM_D5LUT
  • A1=21
  • A2=21
  • A3=21
  • A4=21
  • A5=21
  • CLK=21
  • DI1=21
  • O5=1
  • WA1=21
  • WA2=21
  • WA3=21
  • WA4=21
  • WA5=21
  • WE=21
SLICEM_D6LUT
  • A1=33
  • A2=35
  • A3=36
  • A4=37
  • A5=38
  • A6=38
  • CLK=33
  • DI1=1
  • DI2=32
  • O6=16
  • WA1=22
  • WA2=22
  • WA3=22
  • WA4=22
  • WA5=22
  • WA6=22
  • WE=33
SLICEM_DFF
  • CK=4
  • D=4
  • Q=4
SLICEM_F7BMUX
  • 0=1
  • 1=1
  • OUT=1
  • S0=1
 
Software Quality
Run Statistics
_impact 3 3 0 0 0 0 0
bitgen 29 29 0 0 0 0 0
bitinit 410 410 0 0 0 0 0
libgen 66 49 0 0 0 0 0
map 29 29 0 0 0 0 0
netgen 3 3 0 0 0 0 0
ngcbuild 39 39 0 0 0 0 0
ngdbuild 29 29 0 0 0 0 0
par 29 29 0 0 0 0 0
platgen 49 33 0 0 0 0 0
psf2Edward 67 67 0 0 0 0 0
trce 29 29 0 0 0 0 0
xbash 3 3 0 0 0 0 0
xilbfc 1 0 0 0 0 0 0
xps 45 45 0 0 0 0 0
xst 260 260 0 0 0 0 0
 
Core Statistics
Core Type=MicroBlaze
c_area_optimized=0 c_branch_target_cache_size=0 c_cache_byte_size=8192 c_d_lmb=1
c_d_plb=1 c_dcache_always_used=0 c_dcache_baseaddr=0x00000000 c_dcache_byte_size=8192
c_dcache_highaddr=0x3FFFFFFF c_dcache_line_len=4 c_dcache_use_writeback=0 c_debug_enabled=1
c_div_zero_exception=0 c_dplb_bus_exception=0 c_family=virtex5 c_fpu_exception=0
c_freq=125000000 c_fsl_exception=0 c_fsl_links=0 c_i_lmb=1
c_i_plb=1 c_icache_always_used=0 c_icache_baseaddr=0x00000000 c_icache_highaddr=0x3FFFFFFF
c_icache_line_len=4 c_ill_opcode_exception=0 c_instance=microblaze_0 c_interconnect=1
c_iplb_bus_exception=0 c_mmu_dtlb_size=4 c_mmu_itlb_size=2 c_mmu_tlb_access=3
c_mmu_zones=16 c_number_of_pc_brk=1 c_number_of_rd_addr_brk=0 c_number_of_wr_addr_brk=0
c_opcode_0x0_illegal=0 c_pvr=0 c_unaligned_exceptions=0 c_use_barrel=0
c_use_branch_target_cache=0 c_use_dcache=0 c_use_div=0 c_use_ext_brk=1
c_use_ext_nm_brk=1 c_use_extended_fsl_instr=0 c_use_fpu=1 c_use_hw_mul=1
c_use_icache=0 c_use_interrupt=1 c_use_mmu=0 c_use_msr_instr=1
c_use_pcmp_instr=1 mb_version=0x10
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BSCAN_VIRTEX5=1 NGDBUILD_NUM_BUFG=4 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_DSP48E=5
NGDBUILD_NUM_FD=240 NGDBUILD_NUM_FDC=63 NGDBUILD_NUM_FDCE=47 NGDBUILD_NUM_FDC_1=5
NGDBUILD_NUM_FDE=534 NGDBUILD_NUM_FDE_1=5 NGDBUILD_NUM_FDP=25 NGDBUILD_NUM_FDR=795
NGDBUILD_NUM_FDRE=1184 NGDBUILD_NUM_FDRE_1=1 NGDBUILD_NUM_FDRS=20 NGDBUILD_NUM_FDRSE=6
NGDBUILD_NUM_FDS=59 NGDBUILD_NUM_FDSE=58 NGDBUILD_NUM_GND=16 NGDBUILD_NUM_IBUF=4
NGDBUILD_NUM_INV=54 NGDBUILD_NUM_IOBUF=16 NGDBUILD_NUM_LUT1=128 NGDBUILD_NUM_LUT2=251
NGDBUILD_NUM_LUT3=558 NGDBUILD_NUM_LUT4=522 NGDBUILD_NUM_LUT5=506 NGDBUILD_NUM_LUT6=948
NGDBUILD_NUM_LUT6_2=31 NGDBUILD_NUM_MULT_AND=12 NGDBUILD_NUM_MUXCY=266 NGDBUILD_NUM_MUXCY_L=196
NGDBUILD_NUM_MUXF7=123 NGDBUILD_NUM_MUXF7_L=4 NGDBUILD_NUM_MUXF8_L=2 NGDBUILD_NUM_OBUF=11
NGDBUILD_NUM_PLL_ADV=1 NGDBUILD_NUM_RAM32M=21 NGDBUILD_NUM_RAM32X1D=2 NGDBUILD_NUM_RAMB36_EXP=32
NGDBUILD_NUM_SRL16=3 NGDBUILD_NUM_SRL16E=32 NGDBUILD_NUM_SRLC16E=55 NGDBUILD_NUM_VCC=12
NGDBUILD_NUM_XORCY=308
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BSCAN_VIRTEX5=1 NGDBUILD_NUM_BUFG=5 NGDBUILD_NUM_DSP48E=5 NGDBUILD_NUM_FD=240
NGDBUILD_NUM_FDC=63 NGDBUILD_NUM_FDCE=47 NGDBUILD_NUM_FDC_1=5 NGDBUILD_NUM_FDE=534
NGDBUILD_NUM_FDE_1=5 NGDBUILD_NUM_FDP=25 NGDBUILD_NUM_FDR=795 NGDBUILD_NUM_FDRE=1184
NGDBUILD_NUM_FDRE_1=1 NGDBUILD_NUM_FDRS=20 NGDBUILD_NUM_FDRSE=6 NGDBUILD_NUM_FDS=59
NGDBUILD_NUM_FDSE=58 NGDBUILD_NUM_GND=16 NGDBUILD_NUM_IBUF=20 NGDBUILD_NUM_IBUFG=1
NGDBUILD_NUM_INV=54 NGDBUILD_NUM_LUT1=128 NGDBUILD_NUM_LUT2=251 NGDBUILD_NUM_LUT3=558
NGDBUILD_NUM_LUT4=522 NGDBUILD_NUM_LUT5=506 NGDBUILD_NUM_LUT6=948 NGDBUILD_NUM_LUT6_2=31
NGDBUILD_NUM_MULT_AND=12 NGDBUILD_NUM_MUXCY=266 NGDBUILD_NUM_MUXCY_L=196 NGDBUILD_NUM_MUXF7=123
NGDBUILD_NUM_MUXF7_L=4 NGDBUILD_NUM_MUXF8_L=2 NGDBUILD_NUM_OBUF=11 NGDBUILD_NUM_OBUFT=16
NGDBUILD_NUM_PLL_ADV=1 NGDBUILD_NUM_PULLUP=1 NGDBUILD_NUM_RAM32M=21 NGDBUILD_NUM_RAMB36_EXP=32
NGDBUILD_NUM_SRL16E=35 NGDBUILD_NUM_SRLC16E=55 NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_VCC=12
NGDBUILD_NUM_XORCY=308