8-bit 50ksps ULV SAR ADC
Master thesis
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http://hdl.handle.net/11250/2371416Utgivelsesdato
2015Metadata
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Sammendrag
With the growing market of MCUs and embedded electronic powered by batteries, moreenergy efficient peripherals are needed. This project presents an Analog to Digital converterusing ultra low supply voltage on transistor level. With a charge recycling spiltcapacitive DAC using set and down switching method. And a comparator with a dynamicamplifier, resulted in a very energy efficient SAR ADC. The ADC got a samplings rate of50k Hz and an ENOB of 7.89 bits, while only draining 75nW power from a 0.5V supply.This results in a Walden FOM of 7.39fJ/conv.step.