Spherical Microphone Array Signal Processing on FPGA
Abstract
Spherical microphone arrays are finding an increasing number of applications, mainly because of their ability to describe the directionality of sound captured, and the ease with which this information can be used, e.g., to dampen sound from other directions than the one we are interested in.In a teleconference setting the benefits of having information about the direction from which sounds are coming are obvious. Imagine a setting where chatter from between participants at one location is picked up by the microphones, normally this would interfere with the sound from the person trying to talk to the people in the other end. With a spherical microphone array and signal processing, one would be able to largely dampen sound coming from all directions except one, the one we are interested in at that time. Of course, a conventional directional microphone offers the same, as long as the direction we are interested in stays static. However, using a spherical array, the directivity is not fixed, and can be changed by altering parameters in the signal processing. This alteration could be done either automatically or manually. The topic of this thesis is the implementation of parts of the signal processing associated with spherical microphone arrays. The aim of the work has been to implement said signal processing on FPGA, in an effort to enable the integration of more functionality into the array itself than is done in existing solutions.Implementation issues are discussed, and as a result of this discussion a flexible programmable architecture is proposed. This architecture is then implemented in the form of VHDL code, aimed at Altera's Cyclone II devices. Matlab scripts, acting as a rudimentary ``compiler'', are written to make the implementation of signal processing using different sets of parameters and coefficients easier.The VHDL design is verified to be working using simulation for Altera Cyclone II devices, and also verified on a Xilinx FPGA, in order to showcase that the design can be used, even if one decides for some reason to migrate to a different FPGA vendor.