Blar i NTNU Open på forfatter "Svarstad, Kjetil"

Viser treff 21-40 av 81

    • Design and analysis of an H.265 entropy encoder 

      Paulsen, Lars Erik Songe (Master thesis, 2017)
      The Context-Adaptive Binary Arithmetic Coding(CABAC) used in High Efficiency Video Coding(HEVC/H.265) is a near optimal entropy coding method. As a consequence of this coding efficiency, CABAC implementation is a complicated ...

    • Design and test of an active memory interface module for an H.264 encoder 

      Pehilj, Olja (Master thesis, 2014)
      In this thesis, the author describes a propositional design for a DDR3 memory interface, for an existing H.264/AVC video transcoder. The design uses the Memory Interface Generator (MIG), a Xilinx IP, as an overlying memory ...

    • Design of a Snoop Filter for Snoop Based Cache Coherency Protocols 

      Ulfsnes, Rasmus (Master thesis, 2013)
      Multi core architectures has become common in mobile SoCs; not only for CPUs, but also for mobile GPUs. With the introduction of OpenCl for mobile GPU architecture, the SoCs are able to become more powerful than before. ...

    • Design of an 8x8 Intra Prediction Module 

      Trønnes, Kim (Master thesis, 2014)
      In this thesis, a proposed hardware architecture of an H.264/AVC 8 × 8luminance intra prediction module is designed and realized in VHDL tobe used on an FPGA. The module is a part of a MPEG-2 to H.264/AVCtranscoder and its ...

    • Designing and computing bounds for non-deterministic state machines 

      Alexandrov, Stepan (Master thesis, 2016)
      Normally non-deterministic state machines can be transformed into deterministic FSMs, but this does not work if we allow output on non-deterministic state transitions. However, it can be done by executing the ...

    • Development of a Universal Verification Component for CPU UVM Verification 

      Bakken, Bernhard (Master thesis, 2018)
      The time used debugging and developing testbenches in FPGA and ASIC/IC projects is around 60% of the total time spent in verification. The last years has shown an increase in the adoption of the Universal Verification ...

    • DVB-S2 FEC Encoder: Implementation of DVB-S2 FEC encoder in FPGA 

      Myhr, Reidar (Master thesis, 2007)
      This Master Thesis describe how DVB-S2 Forward Error Correction (FEC) encoding can be implemented in hardware like a FPGA. It include the design, simulation, verification and synthesis of a complete encoder for the DVB-S2 ...

    • Dynamisk rekonfigurerbart digitalt filter 

      Helsing, Håkon (Master thesis, 2009)
      Denne masteroppgaven er et arbeid mot et system med et dynamisk rekonfigurerbart digitalt FIR-filter på FPGA. Filteret benytter konstantmultiplikatorer optimalisert med CSD-kode for lite areal og kort rekongureringstid ...

    • Efficient Implementation of Cross-Correlation in Hardware 

      Taylor, David Eirik (Master thesis, 2014)
      Low-area matched filter and correlator designs are explored in this thesis, for ADC resolutions of 1- and 2-bits. Correlators are used extensively in spread-spectrum communication technologies, where they serve as a means ...

    • Efficient Streaming and Compression of Hyperspectral Images 

      Fjeldtvedt, Johan Austlid (Master thesis, 2018)
      As a part of the SmallSat project at NTNU, a satellite payload capable of capturing and processing of hyperspectral images is being developed. Several processing steps are performed on-board in the satellite, as well as ...

    • Efficient Verification with Portable Stimulus 

      Kragseth, Karianne Krokan (Master thesis, 2018)
      Portable Stimulus is an upcoming technique for increasing productivity and quality of verification of digital designs. A single test description shall be used to generate tests between multiple abstraction levels and ...

    • Efficient video scaling algorithms implemented and optimized for FPGA. 

      Lindø, Svein Erik (Master thesis, 2011)
      The goal of this thesis was to find an alternative to a reference video scaler, providing the same or higher visual quality at faster operation, requiring less FPGA area and memory.The first part of the report is used to ...

    • Energy Harvesting for Sensor Nodes in the Internet of Things 

      Castillo, Erick (Master thesis, 2015)
      Wireless sensor networks have an extensive range of applications in the real world. From military uses saving lives, to environmental applications monitoring the fauna and weather conditions, but also by checking the health ...

    • Evaluation of state-of-the-art Huffman decoding algorithms and their asynchronous implementation using BALSA 

      Scheistrøen, Sigurd Røed (Master thesis, 2012)
      This report presents the design of an asynchronous Huffman decoder, implemented in the Balsa synthesis system. Power consumption, speed and area figures from the post layout design have been measured. In addition, a ...

    • Event System Implementations for Microcontroller Circuits 

      Bjørnerud, Rune André (Master thesis, 2009)
      To ensure effective peripheral communication on their new AVR® XMEGA microcontroller platform, Atmel has included a peripheral resource known as an Event System. Through the submitted research from this thesis, new solutions ...

    • Exploring the Use of IP-XACT in a TLM Environment 

      Prestegårdshus, Eirik (Master thesis, 2017)
      As both semiconductor technology and industry evolves, the need for robust methodologies and efficient design flows becomes more and more important. This thesis investigates IP-XACT, which is a standard that describes ...

    • Fine-Grained ASIP Power Gating: Gate-level study of the break-even point for fine-grained power gating 

      Niedermeier, Anja (Master thesis, 2009)
      Power consumption in portable electronic devices is a crucial design factor. While technology at 90~nm and above is still dominated by dynamic power, it is expected that leakage power will gain importance in sub-90~nm ...

    • FPGA based video scaling for broadcast systems 

      Stenseth, Thomas (Master thesis, 2019)
      Video skalering er en prosess brukt for å endre oppløsningen på en video. Dette er mye brukt i profesjonelle kringkastningssystem som skal støtte mange forskjellige typer brukerutstyr med ulik oppløsning. Siden profesjonelt ...

    • FPGA implementation of a Convolutional Neural Network for "Wake up word" detection 

      Skafså, Ole Martin (Master thesis, 2017)
      The popularity of machine learning has increased dramatically in the last years and the possible applications varies from web search, speech recognition, object detection, etc. A big part of this development is due to the ...

    • FPGA Implementation of a Video Scaler 

      Skarbø, Roger (Master thesis, 2010)
      Three algorithms for video scaling were developed and tested in software, for implementation on an FPGA. Two of the algorithms were implemented in a video scaler system. These two algorithms scale up with factors 1.25 and ...