src/MCP2515control.h
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00001 /***********************************************************************/
00011 #ifndef MCP2515_CONTROL_H_
00012 #define MCP2515_CONTROL_H_
00013 
00014 
00015 
00016 /* PRE-PROCESSOR DIRECTIVES =========================================== */
00017 
00018 #define SET_BIT                 1
00019 #define CLR_BIT                 0
00020  
00021 /* ================================= */
00022 
00023  /* MACRO DEFINES ================================= */
00024  /* Macro defines for TXBnCTRL ================================= */
00036  #define TXBCTRL_ABTF                       ((uint8_t)(6))
00037 
00040  #define TXBCTRL_MLOA                       ((uint8_t)(5))
00041 
00044  #define TXBCTRL_TXERR                      ((uint8_t)(4))
00045 
00047  #define TXBCTRL_TXREQ                      ((uint8_t)(3))
00048  
00050  #define TXBCTRL_TXP                        ((uint8_t)(0))
00051  
00052  
00053  
00054  /* Enum: MCP2515 - TXBnCTRL TXP */
00057  typedef enum {
00058     TXBCTRL_TXP_LOWEST_MSG_PRIORITY = 0,            
00059     TXBCTRL_TXP_LOW_INTERMEDIATE_MSG_PRIORITY,      
00060     TXP_HIGH_INTERMEDIATE_MSG_PRIORITY,             
00061     TXP_HIGHEST_MSG_PRIORITY                        
00062  } TXB_CONTROL_TXP;
00063  
00067  /* ================================= */ 
00068  
00069  
00070  
00071  
00072  /* Macro defines for RXB0CTRL ================================= */
00081  #define RXB0CTRL_RXM1                          ((uint8_t)(6))
00082  
00083 
00085  #define RXB0CTRL_RXM0                          ((uint8_t)(5))
00086  
00087 
00089  #define RXB0CTRL_RXRTR                         ((uint8_t)(3))
00090 
00093  #define RXB0CTRL_BUKT                          ((uint8_t)(2))
00094 
00095 
00097  #define RXB0CTRL_BUKT1                         ((uint8_t)(1))
00098 
00099 
00105  #define RXB0_FILHIT                            ((uint8_t)(0))
00106  #define RXB0_FILHIT_MASK                       ((uint8_t)((1<<0)))
00107  
00108 
00109  
00110  /* Enum: MCP2515 - RXB0CTRL RXM */
00113  typedef enum {
00114     RXB0CTRL_RXM_ALL_MSG_STAND_EXT_ID = 0,  
00115     RXB0CTRL_RXM_ONLY_VALID_STAND_ID,       
00116     RXB0CTRL_RXM_ONLY_VALID_EXT_ID,         
00117     RXB0CTRL_RXM_TURN_OFF_FIL_MASK_ALL_MSG  
00118  } RXB0_CONTROL_RXM;
00119  
00120  
00121  
00122  
00126  /* ================================= */
00127  
00128  
00129  /* Macro defines for RXB1CTRL ================================= */
00138  #define RXB1CTRL_RXM1              ((uint8_t)(6))
00139  
00140 
00142  #define RXB1CTRL_RXM0              ((uint8_t)(5))
00143 
00144 
00146  #define RXB1CTRL_RXRTR             ((uint8_t)(3))
00147 
00148 
00158  #define RXB1CTRL_FILHIT_MASK       ((uint8_t)  ((1<<2)|(1<<1)|(1<<0)))
00159 
00160  
00161 
00162  /* Enum: MCP2515 - RXB1CTRL RXM */
00165  typedef enum {
00166     RXB1CTRL_RXM_ALL_MSG_STAND_EXT_ID = 0,  
00167     RXB1CTRL_RXM_ONLY_VALID_STAND_ID,       
00168     RXB1CTRL_RXM_ONLY_VALID_EXT_ID,         
00169     RXB1CTRL_RXM_TURN_OFF_FIL_MASK_ALL_MSG  
00170  } RXB1_CONTROL_RXM;
00171  
00175  /* ================================= */
00176  
00177  
00178 
00179 
00180  /* Macro defines for RXBnDLC ================================= */
00191  #define    RXB_DLC_RTR         ((uint8_t)(6))
00192 
00193 
00196  #define    RXB_DLC_MASK        ((uint8_t)((1<<3)|(1<<2)|(1<<1)|(1<<0)))
00197 
00201  /* ================================= */
00202  
00203 
00204  
00205  
00206  /* Macro defines for EFLG ================================= */ 
00218  #define    EFLG_RX1OVR     ((uint8_t)(7))
00219  
00220 
00225  #define    EFLG_RX0OVR     ((uint8_t)(6))
00226   
00227 
00232  #define    EFLG_TXBO       ((uint8_t)(5))
00233  
00234 
00239  #define    EFLG_TXEP       ((uint8_t)(4))
00240  
00241 
00246  #define    EFLG_RXEP       ((uint8_t)(3))
00247   
00248 
00253  #define    EFLG_TXWAR      ((uint8_t)(2))
00254  
00255 
00260  #define    EFLG_RXWAR      ((uint8_t)(1))
00261  
00262 
00267  #define    EFLG_EWARN      ((uint8_t)(0))
00268  
00269 
00273  /* ================================= */ 
00274  
00275  
00276  /* Macro defines for CANINTE ================================= */ 
00289  #define    CANINTE_MERRE   ((uint8_t)(7))
00290  
00291 
00297  #define    CANINTE_WAKIE   ((uint8_t)(6))
00298   
00299 
00305  #define    CANINTE_ERRIE   ((uint8_t)(5))
00306  
00307 
00313  #define    CANINTE_TX2IE   ((uint8_t)(4))
00314  
00315 
00321  #define    CANINTE_TX1IE   ((uint8_t)(3))
00322   
00323 
00329  #define    CANINTE_TX0IE   ((uint8_t)(2))
00330  
00331 
00337  #define    CANINTE_RX1IE   ((uint8_t)(1))
00338  
00339 
00345  #define    CANINTE_RX0IE   ((uint8_t)(0))
00346  
00347 
00351  /* ================================= */  
00352  
00353 
00354 
00355  /* Macro defines for CANINTF ================================= */ 
00368  #define    CANINTF_FLAG_MERRF  ((uint8_t)(7))
00369  
00370 
00376  #define    CANINTF_FLAG_WAKIF  ((uint8_t)(6))
00377   
00378 
00384  #define    CANINTF_FLAG_ERRIF  ((uint8_t)(5))
00385  
00386 
00392  #define    CANINTF_FLAG_TX2IF  ((uint8_t)(4))
00393  
00394 
00400  #define    CANINTF_FLAG_TX1IF      ((uint8_t)(3))
00401   
00402 
00408  #define    CANINTF_FLAG_TX0IF      ((uint8_t)(2))
00409  
00410 
00416  #define    CANINTF_FLAG_RX1IF      ((uint8_t)(1))
00417  
00418 
00424  #define    CANINTF_FLAG_RX0IF      ((uint8_t)(0))
00425  
00429  /* ================================= */
00430  
00431  
00432  
00433  
00434  
00435  /* Macro defines for CANCTRL ================================= */ 
00451  #define    CANCTRL_REQOP_MASK              ((uint8_t)( (1<<7)|(1<<6)|(1<<5) ))
00452 
00453 
00456  #define    CANCTRL_REQOP_SHIFT             ((uint8_t)(5))
00457  
00458  
00463  #define    CANCTRL_ABAT                    ((uint8_t)(4))
00464 
00465 
00470  #define    CANCTRL_OSM                     ((uint8_t)(3))
00471  
00472 
00477  #define    CANCTRL_CLKEN                   ((uint8_t)(2))
00478   
00479  
00486  #define    CANCTRL_CLKPRE_MASK                 ((uint8_t)( (1<<1)|(1<<0) ))
00487  
00488  
00489  
00490  /* Enum: MCP2515 - Operation Mode */
00495  typedef enum {
00496     CANCTRL_REQOP_NORMAL = 0,       
00497     CANCTRL_REQOP_SLEEP,            
00498     CANCTRL_REQOP_LOOPBACK,         
00499     CANCTRL_REQOP_LISTEN_ONLY,      
00500     CANCTRL_REQOP_CONFIGURATION     
00501  } CONTROL_REQOP;
00502  
00503  
00504  
00505  /* Macro defines for CANSTAT ================================= */ 
00521  #define    CANSTAT_OPMOD_MASK              ((uint8_t)( (1<<7)|(1<<6)|(1<<5) ))
00522  
00523  
00535  #define    CANSTAT_ICOD_MASK           ((uint8_t)( (1<<3)|(1<<2)|(1<<1) ))
00536  
00537  
00538  /* Enum: MCP2515 - OPMOD */
00542  typedef enum {
00543     CANSTAT_OPMOD_NORMAL = 0,       
00544     CANSTAT_OPMOD_SLEEP,            
00545     CANSTAT_OPMOD_LOOPBACK,         
00546     CANSTAT_OPMOD_LISTEN_ONLY,      
00547     CANSTAT_OPMOD_CONFIGURATION     
00548  } STATUS_OPMOD;
00549  
00550 
00554  /* ================================= */
00555  
00556  
00557  
00558  
00559 
00560  /* Register Addresses ================================= */ 
00570  #define    TXB0CTRL        ((uint8_t)(0x30))
00571  
00572 
00576  #define    TXB1CTRL        ((uint8_t)(0x40))
00577  
00578 
00582  #define    TXB2CTRL        ((uint8_t)(0x50))
00583  
00584 
00588  #define    TXRTSCTRL       ((uint8_t)(0x0D))
00589  
00590 
00593  #define    TXB0SIDH        ((uint8_t)(0x31))
00594  
00595 
00598  #define    TXB1SIDH        ((uint8_t)(0x41))
00599  
00600 
00603  #define    TXB2SIDH        ((uint8_t)(0x51))
00604  
00605  
00608  #define    TXB0SIDL        ((uint8_t)(0x32))
00609  
00610 
00613  #define    TXB1SIDL        ((uint8_t)(0x42))
00614  
00615 
00618  #define    TXB2SIDL        ((uint8_t)(0x52))
00619  
00620  
00623  #define    TXB0EID8        ((uint8_t)(0x33))
00624  
00625 
00628  #define    TXB1EID8        ((uint8_t)(0x43))
00629  
00630 
00633  #define    TXB2EID8        ((uint8_t)(0x53))
00634  
00635 
00638  #define    TXB0EID0        ((uint8_t)(0x34))
00639  
00640 
00643  #define    TXB1EID0        ((uint8_t)(0x44))
00644  
00645 
00648  #define    TXB2EID0        ((uint8_t)(0x54))
00649  
00650 
00653  #define    TXB0DLC         ((uint8_t)(0x35))
00654  
00655 
00658  #define    TXB1DLC         ((uint8_t)(0x45))
00659  
00662  #define    TXB2DLC         ((uint8_t)(0x55))
00663  
00664  
00665  
00668  #define    TXB0D0          ((uint8_t)(0x36))
00669 
00670  
00673  #define    TXB1D0          ((uint8_t)(0x46))
00674 
00675  
00678  #define    TXB2D0          ((uint8_t)(0x56))
00679 
00680  
00681  
00682  //* RECEIVE buffer addresses
00686  #define    RXB0CTRL            ((uint8_t)(0x60))
00687  
00688 
00692  #define    RXB1CTRL            ((uint8_t)(0x70))
00693  
00694 
00697  #define    BFPCTRL         ((uint8_t)(0x0C))
00698  
00699 
00702  #define    RXB0SIDH            ((uint8_t)(0x61))
00703  #define    RXB1SIDH            ((uint8_t)(0x71))
00704  
00705 
00708  #define    RXB0SIDL            ((uint8_t)(0x62))
00709  #define    RXB1SIDL            ((uint8_t)(0x72))
00710  
00711 
00714  #define    RXB0EID8            ((uint8_t)(0x63))
00715  #define    RXB1EID8            ((uint8_t)(0x73))
00716  
00717 
00720  #define    RXB0EID0            ((uint8_t)(0x64))
00721  #define    RXB1EID0            ((uint8_t)(0x74))
00722  
00723 
00727  #define    RXB0DLC             ((uint8_t)(0x65))
00728  #define    RXB1DLC             ((uint8_t)(0x75))
00729  
00730 
00734  #define    RXB0D0              ((uint8_t)(0x66))
00735 
00736  
00740  #define    RXB1D0              ((uint8_t)(0x76))
00741  #define    RXB1D1              ((uint8_t)(0x77))
00742  #define    RXB1D2              ((uint8_t)(0x78))
00743  #define    RXB1D3              ((uint8_t)(0x79))
00744  #define    RXB1D4              ((uint8_t)(0x7A))
00745  #define    RXB1D5              ((uint8_t)(0x7B))
00746  #define    RXB1D6              ((uint8_t)(0x7C))
00747  #define    RXB1D7              ((uint8_t)(0x7D))
00748  
00749 
00750  //* filters
00753  #define    RXF0SIDH            ((uint8_t)(0x00))
00754  #define    RXF1SIDH            ((uint8_t)(0x04))
00755  #define    RXF2SIDH            ((uint8_t)(0x08))
00756  #define    RXF3SIDH            ((uint8_t)(0x10))
00757  #define    RXF4SIDH            ((uint8_t)(0x14))
00758  #define    RXF5SIDH            ((uint8_t)(0x18))
00759  
00760 
00763  #define    RXF0SIDL            ((uint8_t)(0x01))
00764  #define    RXF1SIDL            ((uint8_t)(0x05))
00765  #define    RXF2SIDL            ((uint8_t)(0x09))
00766  #define    RXF3SIDL            ((uint8_t)(0x11))
00767  #define    RXF4SIDL            ((uint8_t)(0x15))
00768  #define    RXF5SIDL            ((uint8_t)(0x19))
00769  
00770 
00773  #define    RXF0EID8            ((uint8_t)(0x02))
00774  #define    RXF1EID8            ((uint8_t)(0x06))
00775  #define    RXF2EID8            ((uint8_t)(0x0A))
00776  #define    RXF3EID8            ((uint8_t)(0x12))
00777  #define    RXF4EID8            ((uint8_t)(0x16))
00778  #define    RXF5EID8            ((uint8_t)(0x1A))
00779  
00782  #define    RXF0EID0            ((uint8_t)(0x03))
00783  #define    RXF1EID0            ((uint8_t)(0x07))
00784  #define    RXF2EID0            ((uint8_t)(0x0B))
00785  #define    RXF3EID0            ((uint8_t)(0x13))
00786  #define    RXF4EID0            ((uint8_t)(0x17))
00787  #define    RXF5EID0            ((uint8_t)(0x1B))
00788  
00789 
00790 
00791  //* masks
00794  #define    RXM0SIDH            ((uint8_t)(0x20))
00795  #define    RXM1SIDH            ((uint8_t)(0x24))
00796 
00797 
00800  #define    RXM0SIDL            ((uint8_t)(0x21))
00801  #define    RXM1SIDL            ((uint8_t)(0x25)) 
00802  
00803 
00806  #define    RXM0EID8            ((uint8_t)(0x22))
00807  #define    RXM1EID8            ((uint8_t)(0x26))
00808  
00809 
00812  #define    RXM0EID0            ((uint8_t)(0x23))
00813  #define    RXM1EID0            ((uint8_t)(0x27))
00814  
00815  
00816  
00817  
00818  //* BIT TIMING
00821  #define    CNF1                ((uint8_t)(0x2A))
00822  #define    CNF2                ((uint8_t)(0x29))
00823  #define    CNF3                ((uint8_t)(0x28))
00824  
00825  
00826  
00827 
00828  //* ERROR and INTERRUPT handling
00832  #define    TEC     ((uint8_t)(0x1C))
00833  
00834 
00838  #define    REC     ((uint8_t)(0x1D))
00839  
00840 
00844  #define    EFLG    ((uint8_t)(0x2D))
00845  
00846 
00850  #define    CANINTE ((uint8_t)(0x2B))
00851  
00852 
00856  #define    CANINTF ((uint8_t)(0x2C))
00857  
00858 
00862  #define    CANCTRL ((uint8_t)(0x0F))
00863  
00864 
00868  #define    CANSTAT ((uint8_t)(0xE))
00869  
00870  
00871  
00876  /* ================================= */
00877  
00878  
00879  
00880  /* Control Addresses ================================= */ 
00886  #define    MCP_RESET               0xC0    
00887  #define    MCP_READ_CMD            0x03
00888  #define    MCP_WRITE_CMD           0x02
00889 
00890  #define    MCP_RECEIVE_RXB0SIDH    0x90
00891  #define    MCP_RECEIVE_RXB0D0      0x91
00892  #define    MCP_RECEIVE_RXB1SIDH    0x92
00893  #define    MCP_RECEIVE_RXB1D0      0x93
00894 
00895 
00896  #define    MCP_LOAD_TXB0SIDH       0x40
00897  #define    MCP_LOAD_TXB0D0         0x41
00898  #define    MCP_LOAD_TXB1SIDH       0x42
00899  #define    MCP_LOAD_TXB1D0         0x43
00900  #define    MCP_LOAD_TXB2SIDH       0x44
00901  #define    MCP_LOAD_TXB2D0         0x45
00902 
00903  #define    MCP_READ_STATUS         0xA0
00904  #define    MCP_RX_STATUS           0xB0
00905  #define    MPC_BIT_MODIFY          0x05
00906  
00914  #define    REG_OFFSET              0x10
00915  #define    REC_REG_0               0
00916  #define    REC_REG_1               1
00917  #define    SEND_REG_0              0
00918  #define    SEND_REG_1              1
00919  #define    SEND_REG_2              2
00920 
00921 
00922 #endif
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