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Macro defines for RXB0CTRL - CAN Receive Buffer 0 Control Register. More...
Defines | |
#define | RXB0CTRL_RXM1 ((uint8_t)(6)) |
Receive Buffer Operating Mode bits - turn mask/filter off. | |
#define | RXB0CTRL_RXM0 ((uint8_t)(5)) |
Receive Buffer Operating Mode bits - turn mask/filter off. | |
#define | RXB0CTRL_RXRTR ((uint8_t)(3)) |
Received Remote Transfer Request bit 1 - ON, 0 - no remote. | |
#define | RXB0CTRL_BUKT ((uint8_t)(2)) |
Rollover Enable bit. | |
#define | RXB0CTRL_BUKT1 ((uint8_t)(1)) |
Read-only Copy of BUKT bit (used internally by the MCP2515) | |
#define | RXB0_FILHIT ((uint8_t)(0)) |
Filter Hit Bit - indicates which acceptance filter enabled reception of message. | |
#define | RXB0_FILHIT_MASK ((uint8_t)((1<<0))) |
Enumerations | |
enum | RXB0_CONTROL_RXM { RXB0CTRL_RXM_ALL_MSG_STAND_EXT_ID = 0, RXB0CTRL_RXM_ONLY_VALID_STAND_ID, RXB0CTRL_RXM_ONLY_VALID_EXT_ID, RXB0CTRL_RXM_TURN_OFF_FIL_MASK_ALL_MSG } |
Message Aborted Flag bit enum. More... | |
enum | RXB1_CONTROL_RXM { RXB1CTRL_RXM_ALL_MSG_STAND_EXT_ID = 0, RXB1CTRL_RXM_ONLY_VALID_STAND_ID, RXB1CTRL_RXM_ONLY_VALID_EXT_ID, RXB1CTRL_RXM_TURN_OFF_FIL_MASK_ALL_MSG } |
Message Aborted Flag bit enum. More... | |
#define | RXB1CTRL_RXM1 ((uint8_t)(6)) |
Macro defines for RXB1CTRL - CAN Receive Buffer 1 Control Register. | |
#define | RXB1CTRL_RXM0 ((uint8_t)(5)) |
Receive Buffer Operating Mode bits - turn mask/filter off; receive any message. | |
#define | RXB1CTRL_RXRTR ((uint8_t)(3)) |
Received Remote Transfer Request bit 1 - ON, 0 - no remote. | |
#define | RXB1CTRL_FILHIT_MASK ((uint8_t) ((1<<2)|(1<<1)|(1<<0))) |
Filter Hit Bit - indicates which acceptance filter enabled reception of message. |
Macro defines for RXB0CTRL - CAN Receive Buffer 0 Control Register.
Address: 60h
#define RXB0_FILHIT ((uint8_t)(0)) |
Filter Hit Bit - indicates which acceptance filter enabled reception of message.
1 - Acceptance Filter 1 (RXF1) 0 - Acceptance Filter 0 (RXF0)
#define RXB0CTRL_BUKT ((uint8_t)(2)) |
Rollover Enable bit.
1 - RXB0 message will rollover and be written to RXB1 if RXB0 is full
#define RXB1CTRL_FILHIT_MASK ((uint8_t) ((1<<2)|(1<<1)|(1<<0))) |
Filter Hit Bit - indicates which acceptance filter enabled reception of message.
101 - Acceptance Filter 5 (RXF5) 100 - Acceptance Filter 4 (RXF4) 011 - Acceptance Filter 3 (RXF3) 010 - Acceptance Filter 2 (RXF2) 001 - Acceptance Filter 1 (RXF1) 000 - Acceptance Filter 0 (RXF0)
#define RXB1CTRL_RXM1 ((uint8_t)(6)) |
Macro defines for RXB1CTRL - CAN Receive Buffer 1 Control Register.
Address: 70h
enum RXB0_CONTROL_RXM |
Message Aborted Flag bit enum.
enum RXB1_CONTROL_RXM |
Message Aborted Flag bit enum.