Defines
MCP2515_ERROR_HANDLING

Macro defines for EFLG (documentation p. 47) More...

Defines

#define EFLG_RX1OVR   ((uint8_t)(7))
 RX1OVR.
#define EFLG_RX0OVR   ((uint8_t)(6))
 RX0OVR.
#define EFLG_TXBO   ((uint8_t)(5))
 TXBO.
#define EFLG_TXEP   ((uint8_t)(4))
 TXEP.
#define EFLG_RXEP   ((uint8_t)(3))
 RXEP.
#define EFLG_TXWAR   ((uint8_t)(2))
 TXWAR.
#define EFLG_RXWAR   ((uint8_t)(1))
 RXWAR.
#define EFLG_EWARN   ((uint8_t)(0))
 EWARN.

Detailed Description

Macro defines for EFLG (documentation p. 47)

Address: 2Dh

Author:
AZ

Define Documentation

#define EFLG_EWARN   ((uint8_t)(0))

EWARN.

Error Warning Flag bit

Attention:
Set when TEC or REC is equal to or greater than 96 (TXWAR or RXWAR = 1) Read-only! Reset when both REC and TEC are less than 96
#define EFLG_RX0OVR   ((uint8_t)(6))

RX0OVR.

Receive Buffer 0 Overflow Flag bit

Attention:
Set when valid message is received for RXB0 and CAINTF.RX0IF = 1 R/W, bit is cleared, must be reset by MCU
#define EFLG_RX1OVR   ((uint8_t)(7))

RX1OVR.

Receive Buffer 1 Overflow Flag bit

Attention:
Set when valid message is received for RXB1 and CAINTF.RX1IF = 1 R/W, bit is cleared, must be reset by MCU
#define EFLG_RXEP   ((uint8_t)(3))

RXEP.

Receive Error-Passive Flag bit

Attention:
Set when REC is equal to or greater than 128 Read-only! Reset when REC is less than 128
#define EFLG_RXWAR   ((uint8_t)(1))

RXWAR.

Receive Error Warning Flag bit

Attention:
Set when REC is equal to or greater than 96 Read-only! Reset when REC is less than 96
#define EFLG_TXBO   ((uint8_t)(5))

TXBO.

Bus-off Error Flag bit

Attention:
Bit set when TEC reaches 255 Read-only!, reset after successful bus recovery sequence
#define EFLG_TXEP   ((uint8_t)(4))

TXEP.

Transmit Error-Passive Flag bit

Attention:
Set when TEC is equal to or greater than 128 Read-only! Reset when TEC is less than 128
#define EFLG_TXWAR   ((uint8_t)(2))

TXWAR.

Transmit Error Warning Flag bit

Attention:
Set when TEC is equal to or greater than 96 Read-only! Reset when REC is less than 96
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