00001 #ifndef CONFIG_H_
00002 #define CONFIG_H_
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00017 #define BUS_ARBITRATOR 1
00018 #define BUS_DEVICE 0
00019 #ifndef CONFIG_BUS_MODE //let Makefile override
00020 # define CONFIG_BUS_MODE BUS_DEVICE
00021 #endif
00022
00023
00024
00025
00030 #define CONFIG_NUM_CANMSG 8
00031
00036 #define CONFIG_TRIE_BITS_PER_NODE 8
00037
00041 #define CONFIG_VENDOR_ID 1
00042 #define CONFIG_PRODUCT_ID 2
00043 #define CONFIG_SERIAL_NUMBER 3
00044
00045 #ifndef F_CPU
00046 # define F_CPU 16000000
00047 #endif
00048
00049
00050
00051
00052
00053
00054
00055
00060 #define HW_CS_MCP2515_PORT DATA_PORT_B
00061 #define HW_CS_MCP2515 B0
00062 #define HW_CS_MCP2515_DDR DATA_DIR_REG_B
00063
00064 #define HW_MISO_MCP2515 B3
00065 #define HW_MOSI_MCP2515 B2
00066 #define HW_MISO_MCP2515_DDR DATA_DIR_REG_B
00067 #define HW_MISO_MCP2515_PIN PORT_INPUT_PIN_B
00068 #define HW_MOSI_MCP2515_DDR DATA_DIR_REG_B
00069 #define HW_MOSI_MCP2515_PORT DATA_PORT_B
00070
00071 #define HW_SCK_MCP2515_DDR DATA_DIR_REG_B
00072 #define HW_SCK_MCP2515 B1
00073
00074
00075 #define ENABLE_SPI_INT 1
00076 #define SPI_INTERRUPT ENABLE_SPI_INT
00077
00078
00079
00084 #define HW_MCP_EXT_INT 0
00085 #define HW_MCP_EXT_INT_DDR DDRD
00086 #define HW_MCP_EXT_INT_PORT PORTD
00087
00088
00095 #define HW_SOFT_EXT_INT_DDR DDRE
00096 #define HW_SOFT_EXT_INT_PORT PORTE
00097 #define HW_SOFT_EXT_INT_1 PE4
00098 #define HW_SOFT_EXT_INT_2 PE5
00099 #define HW_SOFT_EXT_INT_TRIG PE5
00100
00101 #define INT_SENDING INT4_VECTOR
00102 #define INT_RECEIVING INT5_VECTOR
00103 #define INT_SENDING_NUM 4
00104 #define INT_RECEIVING_NUM 5
00105
00106 #define TRIGGER_RECEIVING HW_SOFT_EXT_INT_2
00107 #define TRIGGER_SENDING HW_SOFT_EXT_INT_1
00108
00113 #define WDT_OFF 0
00114 #define WDT_ON 1
00115 #define WDT_MODE WDT_OFF
00116
00122
00123
00124 #define CONFIG_DEBUG_CAPACITY 0
00125
00126
00127
00128 #define CONFIG_DEBUG_UART_INFO 1
00129
00130 #define CONFIG_DEBUG_TEST_HLL 0
00131
00132 #define MSG_AMOUNT_TEST 10000
00133
00134
00135
00136 #define CONFIG_DEBUG_LED_TOGGLING 0
00137 #define HW_PORT_LED PORTF
00138 #define HW_DDR_LED DDRF
00139 #define HW_PORT_LED0 PF0
00140 #define HW_PORT_LED1 PF1
00141 #define HW_PORT_LED2 PF2
00142
00143
00144
00145 #define CONFIG_TESTING_HAL 1
00146
00147
00148
00149 #if ( CONFIG_DEBUG_UART_INFO )
00150 #define F_CPU 16000000UL
00151 #define RS_BAUD 9600UL
00152 #define RS_UBRR ((F_CPU/16/RS_BAUD) - 1)
00153 #endif
00154
00155
00156
00157 #define DEVICE_DEF_ID 0xFF
00158
00159
00160 #define ARB_DEF_ID 0x00
00161
00162
00163
00164
00165 #define DATA_TO_SEND_1 0x5
00166
00167
00168 #endif