Overview
Block Diagram
External Ports
 Processor
   processing_system7_0
 Busses
   axi_interconnect_0
   axi_interconnect_1
 Memorys
   bram_block_high
   bram_block_low
 Memory Controllers
   axi_bram_ctrl_acc_high
   axi_bram_ctrl_acc_low
   axi_bram_ctrl_cpu_high
   axi_bram_ctrl_cpu_low
 Peripheral
   lbm_acc_top_0
Timing Information