# |
NAME |
DIR |
[LSB:MSB] |
SIG |
ATTRIBUTES |
processing_system7_0
|
processing_system7_0_PS_CLK |
I |
1 |
processing_system7_0_PS_CLK |
CLK |
processing_system7_0
|
processing_system7_0_PS_PORB |
I |
1 |
processing_system7_0_PS_PORB |
|
processing_system7_0
|
processing_system7_0_PS_SRSTB |
I |
1 |
processing_system7_0_PS_SRSTB |
|
processing_system7_0
|
processing_system7_0_DDR_Addr |
IO |
0:14 |
processing_system7_0_DDR_Addr |
|
processing_system7_0
|
processing_system7_0_DDR_BankAddr |
IO |
0:2 |
processing_system7_0_DDR_BankAddr |
|
processing_system7_0
|
processing_system7_0_DDR_CAS_n |
IO |
1 |
processing_system7_0_DDR_CAS_n |
|
processing_system7_0
|
processing_system7_0_DDR_CKE |
IO |
1 |
processing_system7_0_DDR_CKE |
|
processing_system7_0
|
processing_system7_0_DDR_CS_n |
IO |
1 |
processing_system7_0_DDR_CS_n |
|
processing_system7_0
|
processing_system7_0_DDR_Clk |
IO |
1 |
processing_system7_0_DDR_Clk |
CLK |
processing_system7_0
|
processing_system7_0_DDR_Clk_n |
IO |
1 |
processing_system7_0_DDR_Clk_n |
CLK |
processing_system7_0
|
processing_system7_0_DDR_DM |
IO |
0:3 |
processing_system7_0_DDR_DM |
|
processing_system7_0
|
processing_system7_0_DDR_DQ |
IO |
0:31 |
processing_system7_0_DDR_DQ |
|
processing_system7_0
|
processing_system7_0_DDR_DQS |
IO |
0:3 |
processing_system7_0_DDR_DQS |
|
processing_system7_0
|
processing_system7_0_DDR_DQS_n |
IO |
0:3 |
processing_system7_0_DDR_DQS_n |
|
processing_system7_0
|
processing_system7_0_DDR_DRSTB |
IO |
1 |
processing_system7_0_DDR_DRSTB |
RESET |
processing_system7_0
|
processing_system7_0_DDR_ODT |
IO |
1 |
processing_system7_0_DDR_ODT |
|
processing_system7_0
|
processing_system7_0_DDR_RAS_n |
IO |
1 |
processing_system7_0_DDR_RAS_n |
|
processing_system7_0
|
processing_system7_0_DDR_VRN |
IO |
1 |
processing_system7_0_DDR_VRN |
|
processing_system7_0
|
processing_system7_0_DDR_VRP |
IO |
1 |
processing_system7_0_DDR_VRP |
|
processing_system7_0
|
processing_system7_0_MIO |
IO |
0:53 |
processing_system7_0_MIO |
|
processing_system7_0
|
processing_system7_0_DDR_WEB_pin |
O |
1 |
processing_system7_0_DDR_WEB |
|