#include <stdint.h>
#include "spb.h"
Go to the source code of this file.
Defines | |
#define | MAX_BLOCK_LEN 512 |
Enumerations | |
enum | { SDIO_FLAG_POLL = (1 << 0), SDIO_FLAG_1BIT_MODE = (1 << 1) } |
enum | { SDIO_IRQ_RX = (1 << 0) } |
enum | { IRQ_OP_ENABLE, IRQ_OP_DISABLE } |
enum | { CMD_FLAG_TO_HOST = (1 << 0) } |
Functions | |
void | platform_sdio_cmd (uint8_t idx, uint32_t arg, uint8_t flags, uint32_t *rsp, const uint8_t *data, uint16_t len) |
void | platform_sdio_init (uint8_t *flags) |
void | platform_sdio_irq (uint8_t op) |
void | platform_sdio_reset (void) |
void | platform_sdio_rx (uint8_t *data, uint16_t len) |
void | platform_sdio_tx (const uint8_t *data, uint16_t len) |
void | sdio_irq_handler (uint8_t status) |
#define MAX_BLOCK_LEN 512 |
Definition at line 33 of file platform_sdio.h.
Referenced by platform_sdio_cmd(), and platform_txrx().
anonymous enum |
Definition at line 44 of file platform_sdio.h.
00044 { 00045 SDIO_FLAG_POLL = (1 << 0), 00046 SDIO_FLAG_1BIT_MODE = (1 << 1), 00047 };
anonymous enum |
anonymous enum |
Definition at line 35 of file platform_sdio.h.
00035 { 00036 IRQ_OP_ENABLE, 00037 IRQ_OP_DISABLE 00038 };
anonymous enum |
void platform_sdio_cmd | ( | uint8_t | idx, | |
uint32_t | arg, | |||
uint8_t | flags, | |||
uint32_t * | rsp, | |||
const uint8_t * | data, | |||
uint16_t | len | |||
) |
void platform_sdio_init | ( | uint8_t * | flags | ) |
void platform_sdio_irq | ( | uint8_t | op | ) |
void platform_sdio_reset | ( | void | ) |
Definition at line 93 of file avr32_sdio.c.
References mdelay.
00094 { 00095 volatile avr32_mci_t *mci = &AVR32_MCI; 00096 00097 /* Reset MCI controller. It is not specified in the data sheet how long 00098 * to wait for reset to complete, so we'll just wait a few ms here. 00099 */ 00100 mci->CR.swrst = 1; 00101 mdelay(10); 00102 00103 /* Disable MCI controller during configuration */ 00104 mci->CR.mcidis = 1; 00105 00106 /* Use read proof, otherwise we might not be able to read all data and 00107 * will get overrun errors. 00108 */ 00109 mci->MR.rdproof = 1; 00110 00111 /* Write proof is needed to make 4-bit mode stable since we might not 00112 * be able to fill the fifo fast enough with the CPU. 00113 */ 00114 mci->MR.wrproof = 1; 00115 00116 /* Use maximum values for data timeout */ 00117 mci->DTOR.dtocyc = 0xf; 00118 mci->DTOR.dtomul = 0x7; 00119 00120 /* MCI_CLK = FMCK / (2 * (clkdiv + 1)), FMCK is 60 MHz */ 00121 mci->MR.clkdiv = 0; 00122 00123 /* 4 bit or 1 bit */ 00124 #ifdef USE_1BIT_MODE 00125 mci->SDCR.sdcbus = 0; 00126 #else 00127 mci->SDCR.sdcbus = 2; 00128 #endif 00129 00130 /* Use MCI slot A/B */ 00131 #ifdef SDIO_SLOT_A 00132 mci->SDCR.sdcsel = 0; 00133 #else 00134 mci->SDCR.sdcsel = 1; 00135 #endif 00136 00137 /* Enable MCI controller */ 00138 mci->CR.mcien = 1; 00139 }
void platform_sdio_rx | ( | uint8_t * | data, | |
uint16_t | len | |||
) |
void platform_sdio_tx | ( | const uint8_t * | data, | |
uint16_t | len | |||
) |
void sdio_irq_handler | ( | uint8_t | status | ) |
Referenced by avr32_irq_handler().