00001 /*This file has been prepared for Doxygen automatic documentation generation.*/ 00020 /* Copyright (c) 2009 Atmel Corporation. All rights reserved. 00021 * 00022 * Redistribution and use in source and binary forms, with or without 00023 * modification, are permitted provided that the following conditions are met: 00024 * 00025 * 1. Redistributions of source code must retain the above copyright notice, this 00026 * list of conditions and the following disclaimer. 00027 * 00028 * 2. Redistributions in binary form must reproduce the above copyright notice, 00029 * this list of conditions and the following disclaimer in the documentation 00030 * and/or other materials provided with the distribution. 00031 * 00032 * 3. The name of Atmel may not be used to endorse or promote products derived 00033 * from this software without specific prior written permission. 00034 * 00035 * 4. This software may only be redistributed and used in connection with an Atmel 00036 * AVR product. 00037 * 00038 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 00039 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00040 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 00041 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 00042 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 00043 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00044 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 00045 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00046 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 00047 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 00048 * 00049 */ 00050 00120 #include <avr32/io.h> 00121 #include "board.h" 00122 #include "intc.h" 00123 #include "cycle_counter.h" 00124 #include "gpio.h" 00125 #include "flashvault.h" 00126 00127 00128 #define NB_CLOCK_CYCLE_DELAY_SHORT 1000 // 8.69 ms if fCPU==115kHz 00129 00130 //****************************************************************************** 00131 //*** 00132 //*** T H I R D - P A R T Y A P P L I C A T I O N 00133 //*** 00134 //****************************************************************************** 00135 00136 __attribute__((__section__(".thirdparty_data"))) 00137 static volatile unsigned char bFirstInterrupt = FALSE; 00138 00139 // Counter of COUNT/COMPARE matches. 00140 __attribute__((__section__(".thirdparty_data"))) 00141 static volatile unsigned int u32NbCompareIrqTrigger = 0; 00142 00143 // Created just to check that dummy gets placed in the .bss. 00144 static volatile int dummy; 00145 00146 // COUNT/COMPARE match interrupt handler 00147 // GCC-specific syntax to declare an interrupt handler. The interrupt handler 00148 // registration is done in the main function using the INTC software driver module. 00149 __attribute__((__interrupt__)) static void compare_irq_handler(void) 00150 { 00151 bFirstInterrupt = TRUE; 00152 // Count the number of times this IRQ handler is called. 00153 u32NbCompareIrqTrigger++; 00154 00155 dummy++; 00156 00157 // Toggle LED0. 00158 gpio_tgl_gpio_pin(LED0_GPIO); 00159 00160 // Clear the pending interrupt(writing a value to the COMPARE register clears 00161 // any pending compare interrupt requests). Schedule the COUNT&COMPARE match 00162 // interrupt to happen every NB_CLOCK_CYCLE_DELAY_SHORT cycles. 00163 Set_sys_compare(NB_CLOCK_CYCLE_DELAY_SHORT); 00164 } 00165 00166 00167 static void delay(int d) 00168 { 00169 volatile int i = d; 00170 while(i--); 00171 } 00172 00173 00174 //** 00175 //** The non-secure world application 00176 //** 00177 __attribute__((__used__)) 00178 int main(void) 00179 { 00180 U32 u32CompareVal; 00181 U32 u32CountVal; 00182 00183 00184 // Disable all interrupts. 00185 Disable_global_interrupt(); 00186 00187 INTC_init_interrupts(); 00188 00189 // Register the compare interrupt handler to the interrupt controller. 00190 // compare_irq_handler is the interrupt handler to register. 00191 // AVR32_CORE_COMPARE_IRQ is the IRQ of the interrupt handler to register. 00192 // AVR32_INTC_INT0 is the interrupt priority level to assign to the group of this IRQ. 00193 // void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level); 00194 INTC_register_interrupt(&compare_irq_handler, AVR32_CORE_COMPARE_IRQ, AVR32_INTC_INT0); 00195 00196 // Enable all interrupts. 00197 Enable_global_interrupt(); 00198 00199 // Schedule the COUNT&COMPARE match interrupt in NB_CLOCK_CYCLE_DELAY_SHORT 00200 // clock cycles from now. 00201 u32CountVal = Get_sys_count(); 00202 00203 u32CompareVal = u32CountVal + NB_CLOCK_CYCLE_DELAY_SHORT; // WARNING: MUST FIT IN 32bits. 00204 // If u32CompareVal ends up to be 0, make it 1 so that the COMPARE and exception 00205 // generation feature does not get disabled. 00206 if(0 == u32CompareVal) 00207 { 00208 u32CompareVal++; 00209 } 00210 00211 Set_sys_compare(u32CompareVal); // GO 00212 00213 // Wait for the first COUNT/COMPARE match interrupt to trigger. 00214 while(bFirstInterrupt == FALSE); 00215 00216 while(1) 00217 { 00218 // Toggle led1. According to the FlashVault API, we must fill R8 with the 00219 // target function id before calling SSCALL. 00220 __asm__ __volatile__ ( \ 00221 /* Fill the api vector id. */ \ 00222 "mov r8, %[TGL_LED1]\n\t" \ 00223 \ 00224 /* Call the secure world. */ \ 00225 ".int %[SSCALL]" \ 00226 : \ 00227 : [SSCALL] "i" (INST_SSCALL), \ 00228 [TGL_LED1] "i" (FLASHVAULT_API_TGL_LED1) \ 00229 ); 00230 00231 // Insert a delay 00232 delay(5000); 00233 } 00234 return 0; // Never reached 00235 }