mdma_example.c File Reference


Detailed Description

MDMA Example for AVR32 MDMA driver module.

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file mdma_example.c.

#include "intc.h"
#include "power_clocks_lib.h"
#include "gpio.h"
#include "usart.h"
#include "mdma.h"
#include "board.h"
#include "sdramc.h"
#include "flashc_buffer.h"
#include "cycle_counter.h"
#include "print_funcs.h"

Go to the source code of this file.

Defines

#define BUFFER_SIZE   1024
 Buffer Size.
#define BURST_MODE   MDMA_SINGLE_TRANSFERT_MODE
 Burst Mode : Single.
#define CHANNEL_NBR   0
 Number of MDMA channel used.
#define FCPU_HZ   48000000
 CPU Clock at 48MHz.
#define FPBA_HZ   24000000
 PBA Clock at 24MHz.
#define FPBB_HZ   48000000
 PBB Clock at 48MHz.
#define TRANSFERT_SIZE   MDMA_TRANSFERT_SIZE_WORD
 Transfer Size: Word.
Configuration to use for the example
#define EXAMPLE_MDMA_LED_ERRORS   (LED0 | LED1 | LED2 | LED3)
#define EXAMPLE_MDMA_LED_OK   (LED0 | LED1 | LED2 | LED3)
#define EXAMPLE_MDMA_LED_READ   LED1
#define EXAMPLE_MDMA_USART   (&AVR32_USART2)
#define EXAMPLE_MDMA_USART_RX_FUNCTION   AVR32_USART2_RXD_0_1_FUNCTION
#define EXAMPLE_MDMA_USART_RX_PIN   AVR32_USART2_RXD_0_1_PIN
#define EXAMPLE_MDMA_USART_TX_FUNCTION   AVR32_USART2_TXD_0_1_FUNCTION
#define EXAMPLE_MDMA_USART_TX_PIN   AVR32_USART2_TXD_0_1_PIN

Functions

void init_usart (void)
int main (void)
 Main function.
void mdma_init_buffer_descriptor (void)
 Initialize the MDMA buffer descriptor.
static void mdma_int_handler (void)
 Interrupt for End of MDMA Transfer.

Variables

volatile avr32_mdma_t * mdma = &AVR32_MDMA
mdma_descriptor_t mdma_buf_desc [5]
System Clock Frequencies
Initializes the MCU system clocks.

U32 sram_buffer [BUFFER_SIZE]


Define Documentation

#define BUFFER_SIZE   1024

Buffer Size.

Definition at line 112 of file mdma_example.c.

Referenced by mdma_init_buffer_descriptor().

#define BURST_MODE   MDMA_SINGLE_TRANSFERT_MODE

Burst Mode : Single.

Definition at line 114 of file mdma_example.c.

Referenced by mdma_init_buffer_descriptor().

#define CHANNEL_NBR   0

Number of MDMA channel used.

Definition at line 111 of file mdma_example.c.

Referenced by main().

#define EXAMPLE_MDMA_LED_ERRORS   (LED0 | LED1 | LED2 | LED3)

Definition at line 126 of file mdma_example.c.

Referenced by main().

#define EXAMPLE_MDMA_LED_OK   (LED0 | LED1 | LED2 | LED3)

Definition at line 127 of file mdma_example.c.

Referenced by main().

#define EXAMPLE_MDMA_LED_READ   LED1

Definition at line 125 of file mdma_example.c.

Referenced by main().

#define EXAMPLE_MDMA_USART   (&AVR32_USART2)

Definition at line 120 of file mdma_example.c.

Referenced by init_usart().

#define EXAMPLE_MDMA_USART_RX_FUNCTION   AVR32_USART2_RXD_0_1_FUNCTION

Definition at line 122 of file mdma_example.c.

Referenced by init_usart().

#define EXAMPLE_MDMA_USART_RX_PIN   AVR32_USART2_RXD_0_1_PIN

Definition at line 121 of file mdma_example.c.

Referenced by init_usart().

#define EXAMPLE_MDMA_USART_TX_FUNCTION   AVR32_USART2_TXD_0_1_FUNCTION

Definition at line 124 of file mdma_example.c.

Referenced by init_usart().

#define EXAMPLE_MDMA_USART_TX_PIN   AVR32_USART2_TXD_0_1_PIN

Definition at line 123 of file mdma_example.c.

Referenced by init_usart().

#define FCPU_HZ   48000000

CPU Clock at 48MHz.

Definition at line 107 of file mdma_example.c.

#define FPBA_HZ   24000000

PBA Clock at 24MHz.

Definition at line 108 of file mdma_example.c.

Referenced by init_usart().

#define FPBB_HZ   48000000

PBB Clock at 48MHz.

Definition at line 109 of file mdma_example.c.

Referenced by main().

#define TRANSFERT_SIZE   MDMA_TRANSFERT_SIZE_WORD

Transfer Size: Word.

Definition at line 113 of file mdma_example.c.

Referenced by mdma_init_buffer_descriptor().


Function Documentation

void init_usart ( void   ) 

Definition at line 151 of file mdma_example.c.

References EXAMPLE_MDMA_USART, EXAMPLE_MDMA_USART_RX_FUNCTION, EXAMPLE_MDMA_USART_RX_PIN, EXAMPLE_MDMA_USART_TX_FUNCTION, EXAMPLE_MDMA_USART_TX_PIN, and FPBA_HZ.

Referenced by main().

00152 {
00153   static const gpio_map_t USART_GPIO_MAP =
00154   {
00155     {EXAMPLE_MDMA_USART_RX_PIN, EXAMPLE_MDMA_USART_RX_FUNCTION},
00156     {EXAMPLE_MDMA_USART_TX_PIN, EXAMPLE_MDMA_USART_TX_FUNCTION}
00157   };
00158 
00159   // USART options.
00160   static const usart_options_t USART_OPTIONS =
00161   {
00162     .baudrate     = 57600,
00163     .charlength   = 8,
00164     .paritytype   = USART_NO_PARITY,
00165     .stopbits     = USART_1_STOPBIT,
00166     .channelmode  = USART_NORMAL_CHMODE
00167   };
00168 
00169   // Assign GPIO to USART.
00170   gpio_enable_module(USART_GPIO_MAP,
00171                      sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));
00172 
00173   // Initialize USART in RS232 mode.
00174   usart_init_rs232(EXAMPLE_MDMA_USART, &USART_OPTIONS, FPBA_HZ);
00175 
00176   print_dbg("MDMA Example : This example demonstrates how to use the MDMA driver. \n");
00177 }

int main ( void   ) 

Main function.

Definition at line 315 of file mdma_example.c.

References CHANNEL_NBR, EXAMPLE_MDMA_LED_ERRORS, EXAMPLE_MDMA_LED_OK, EXAMPLE_MDMA_LED_READ, flashc_data, FLASHC_DATA_BUFFER_SIZE, FPBB_HZ, init_usart(), mdma, mdma_configure_interrupts(), mdma_descriptor_mode_xfert_init(), MDMA_FIXED_PRIORITY_MODE, mdma_init_buffer_descriptor(), mdma_int_handler(), and mdma_start_descriptor_xfert().

00316 {
00317   int i;
00318   unsigned long noErrors = 0;
00319   volatile unsigned char *sdram = SDRAM;
00320 
00321   // Enable Channel 0 complete Interrupt
00322   static const mdma_interrupt_t MDMA_INTERRUPT =
00323   {
00324     .ch0c = 1, 
00325   };
00326 
00327   // Initialize System Clock
00328   init_sys_clocks();
00329 
00330   // Initialize USART for Debug
00331   init_usart();  
00332 
00333   // Initialize the external SDRAM chip.
00334   sdramc_init(FPBB_HZ);
00335   print_dbg("SDRAM initialized...\n");
00336 
00337   gpio_set_gpio_pin(LED0_GPIO);
00338   gpio_set_gpio_pin(LED1_GPIO);
00339   gpio_set_gpio_pin(LED2_GPIO);
00340   gpio_set_gpio_pin(LED3_GPIO);
00341 
00342   // Initialize MDMA Buffer Descriptor.
00343   mdma_init_buffer_descriptor();
00344   
00345   Disable_global_interrupt();
00346 
00347   // Initialize interrupt vectors.
00348   INTC_init_interrupts();
00349 
00350   // Register the MDMA interrupt handler to the interrupt controller.
00351   INTC_register_interrupt(&mdma_int_handler, AVR32_MDMA_IRQ, AVR32_INTC_INT0);
00352 
00353   // Enable global interrupt
00354   Enable_global_interrupt();
00355 
00356   // Initialize MDMA Transfer.
00357   mdma_descriptor_mode_xfert_init(mdma,CHANNEL_NBR,(U32*)&mdma_buf_desc);
00358 
00359   // Configure MDMA Interrupts.  
00360   mdma_configure_interrupts(mdma, &MDMA_INTERRUPT);    
00361 
00362   print_dbg("MDMA initialized...\n");
00363 
00364   // Clear SDRAM area for the flash buffer size
00365   for (i=0;i<FLASHC_DATA_BUFFER_SIZE;i++)
00366   {
00367     sdram[i] = 0;
00368   }
00369   
00370   // Start MDMA transfer
00371   mdma_start_descriptor_xfert(mdma,CHANNEL_NBR,MDMA_FIXED_PRIORITY_MODE);
00372 
00373   print_dbg("Start MDMA Transfer...\n");
00374 
00375   // Wait end of transfer for Descriptor 4
00376   while (mdma_buf_desc[4].ccr.V==1);
00377 
00378   print_dbg("End of MDMA Transfer, check transfer on last transfer ...\n");
00379 
00380   // Check content inside the buffer of descriptor 4  
00381   for (i=0;i<FLASHC_DATA_BUFFER_SIZE;i++)
00382   {
00383     if (sdram[i] != flashc_data[i])
00384     {
00385       noErrors++;
00386     }
00387   }
00388 
00389   LED_Off(EXAMPLE_MDMA_LED_READ);
00390   print_dbg_ulong(noErrors);
00391   print_dbg(" corrupted word(s)       \n");
00392   if (noErrors)
00393   {
00394     LED_Off(EXAMPLE_MDMA_LED_ERRORS);
00395     while (1)
00396     {
00397       LED_Toggle(EXAMPLE_MDMA_LED_ERRORS);
00398       cpu_delay_ms(200, FOSC0);   // Fast blink means errors.
00399     }
00400   }
00401   else
00402   {
00403     LED_Off(EXAMPLE_MDMA_LED_OK);
00404     while (1)
00405     {
00406       LED_Toggle(EXAMPLE_MDMA_LED_OK);
00407       cpu_delay_ms(1000, FOSC0);  // Slow blink means OK.
00408     }
00409   }
00410 }

void mdma_init_buffer_descriptor ( void   ) 

Initialize the MDMA buffer descriptor.

Definition at line 210 of file mdma_example.c.

References BUFFER_SIZE, BURST_MODE, mdma_opt_t::burst_size, mdma_descriptor_t::ccr, mdma_opt_t::count, mdma_descriptor_t::dest, flashc_data, mdma_opt_t::L, mdma_opt_t::size, mdma_descriptor_t::src, mdma_opt_t::tc_ienable, TRANSFERT_SIZE, and mdma_opt_t::V.

Referenced by main().

00211 {
00212   // First MDMA Descriptor
00213   // Source : Flash
00214   // Destination : SDRAM
00215   // Size : BUFFER_SIZE
00216   // Transfer Size: TRANSFERT_SIZE
00217   // Mode : BURST_MODE
00218   // Interrupt : 1 (Enable)
00219   // Valid : 1 (TRUE)
00220   // Last : 0 (FALSE)
00221   mdma_buf_desc[0].src            = (U32)flashc_data;             // First MDMA Descriptor
00222   mdma_buf_desc[0].src            = (U32)flashc_data;             // Source : Flash
00223   mdma_buf_desc[0].dest           = (U32)AVR32_EBI_CS1_0_ADDRESS; // Destination : SDRAM
00224   mdma_buf_desc[0].ccr.count      = BUFFER_SIZE;                  // Size : BUFFER_SIZE
00225   mdma_buf_desc[0].ccr.size       = TRANSFERT_SIZE;               // Transfer Size: TRANSFERT_SIZE
00226   mdma_buf_desc[0].ccr.burst_size = BURST_MODE;                   // Mode : BURST_MODE
00227   mdma_buf_desc[0].ccr.tc_ienable = 1;                            // Interrupt : 1 (Enable)
00228   mdma_buf_desc[0].ccr.V          = 1;                            // Valid : 1 (TRUE)
00229   mdma_buf_desc[0].ccr.L          = 0;                            // Last : 0 (FALSE)
00230 
00231   mdma_buf_desc[0].src             = (U32)((unsigned short *)flashc_data);
00232   mdma_buf_desc[0].src             = (U32)((unsigned short *)flashc_data);
00233   mdma_buf_desc[0].dest            = (U32)((unsigned short *)AVR32_EBI_CS1_0_ADDRESS);
00234   mdma_buf_desc[0].ccr.count       = BUFFER_SIZE;
00235   mdma_buf_desc[0].ccr.size        = TRANSFERT_SIZE;
00236   mdma_buf_desc[0].ccr.burst_size  = BURST_MODE;
00237   mdma_buf_desc[0].ccr.tc_ienable  = 1;
00238   mdma_buf_desc[0].ccr.V           = 1;
00239   mdma_buf_desc[0].ccr.L           = 0; 
00240 
00241   // Second MDMA Descriptor
00242   // Source : SDRAM
00243   // Destination : HSB Ram
00244   // Size : BUFFER_SIZE
00245   // Transfert Size: TRANSFERT_SIZE
00246   // Mode : BURST_MODE
00247   // Interrupt : 1 (Enable)
00248   // Valid : 1 (TRUE)
00249   // Last : 0 (FALSE)
00250   mdma_buf_desc[1].src             = (U32)((unsigned short *)AVR32_EBI_CS1_0_ADDRESS);
00251   mdma_buf_desc[1].dest            = (U32)((unsigned short *)AVR32_HRAMC0_ADDRESS);
00252   mdma_buf_desc[1].ccr.count       = BUFFER_SIZE;
00253   mdma_buf_desc[1].ccr.size        = TRANSFERT_SIZE;
00254   mdma_buf_desc[1].ccr.burst_size  = BURST_MODE;
00255   mdma_buf_desc[1].ccr.tc_ienable  = 1;
00256   mdma_buf_desc[1].ccr.V           = 1;
00257   mdma_buf_desc[1].ccr.L           = 0; 
00258 
00259   // Third MDMA Descriptor
00260   // Source : HSB Ram
00261   // Destination : CPU Ram
00262   // Size : BUFFER_SIZE
00263   // Transfert Size: TRANSFERT_SIZE
00264   // Mode : BURST_MODE
00265   // Interrupt : 1 (Enable)
00266   // Valid : 1 (TRUE)
00267   // Last : 0 (FALSE)  
00268   mdma_buf_desc[2].src             = (U32)((unsigned short *)AVR32_HRAMC0_ADDRESS);
00269   mdma_buf_desc[2].dest            = (U32)sram_buffer;
00270   mdma_buf_desc[2].ccr.count       = BUFFER_SIZE;
00271   mdma_buf_desc[2].ccr.size        = TRANSFERT_SIZE;
00272   mdma_buf_desc[2].ccr.burst_size  = BURST_MODE;
00273   mdma_buf_desc[2].ccr.tc_ienable  = 1;
00274   mdma_buf_desc[2].ccr.V           = 1;
00275   mdma_buf_desc[2].ccr.L           = 0;
00276 
00277   // Fourth MDMA Descriptor
00278   // Source : CPU Ram
00279   // Destination : HSB Ram
00280   // Size : BUFFER_SIZE
00281   // Transfert Size: TRANSFERT_SIZE
00282   // Mode : BURST_MODE
00283   // Interrupt : 1 (Enable)
00284   // Valid : 1 (TRUE)
00285   // Last : 0 (FALSE)   
00286   mdma_buf_desc[3].src             = (U32)((unsigned short *)sram_buffer);
00287   mdma_buf_desc[3].dest            = (U32)AVR32_HRAMC0_ADDRESS;
00288   mdma_buf_desc[3].ccr.count       = BUFFER_SIZE;
00289   mdma_buf_desc[3].ccr.size        = TRANSFERT_SIZE;
00290   mdma_buf_desc[3].ccr.burst_size  = BURST_MODE;
00291   mdma_buf_desc[3].ccr.tc_ienable  = 1;
00292   mdma_buf_desc[3].ccr.V           = 1;
00293   mdma_buf_desc[3].ccr.L           = 0;  
00294 
00295   // Fifth MDMA Descriptor
00296   // Source : HSB Ram
00297   // Destination : SDRAM
00298   // Size : BUFFER_SIZE
00299   // Transfert Size: TRANSFERT_SIZE
00300   // Mode : BURST_MODE
00301   // Interrupt : 1 (Enable)
00302   // Valid : 1 (TRUE)
00303   // Last : 1 (TRUE) 
00304   mdma_buf_desc[4].src             = (U32)((unsigned short *)AVR32_HRAMC0_ADDRESS);
00305   mdma_buf_desc[4].dest            = (U32)AVR32_EBI_CS1_0_ADDRESS;
00306   mdma_buf_desc[4].ccr.count       = BUFFER_SIZE;
00307   mdma_buf_desc[4].ccr.size        = TRANSFERT_SIZE;
00308   mdma_buf_desc[4].ccr.burst_size  = BURST_MODE;
00309   mdma_buf_desc[4].ccr.tc_ienable  = 1;
00310   mdma_buf_desc[4].ccr.V           = 1;
00311   mdma_buf_desc[4].ccr.L           = 1;
00312 }

static void mdma_int_handler ( void   )  [static]

Interrupt for End of MDMA Transfer.

Definition at line 143 of file mdma_example.c.

References mdma.

Referenced by main().

00144 {
00145   Disable_global_interrupt();
00146   U32 status = mdma->isr;
00147   mdma->icr = status;
00148   Enable_global_interrupt();  
00149 }


Variable Documentation

volatile avr32_mdma_t* mdma = &AVR32_MDMA

Definition at line 134 of file mdma_example.c.

Referenced by main(), and mdma_int_handler().

Definition at line 206 of file mdma_example.c.

U32 sram_buffer[BUFFER_SIZE]

Definition at line 203 of file mdma_example.c.


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