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00047 #include "preprocessor.h"
00048
00049 #if !defined(FORCE_ALL_GENERICS) && \
00050 !defined(FORCE_GENERIC_VECT32_NEG) && \
00051 defined(TARGET_SPECIFIC_VECT32_NEG)
00052
00053 #if __GNUC__
00054 # define DSP32_NEG_END_KERNEL_X_FCT(x_num, data) __attribute__((__naked__)) DSP32_NEG_END_KERNEL_X_FCT__(x_num, data)
00055 #elif __ICCAVR32__
00056 # define DSP32_NEG_END_KERNEL_X_FCT(x_num, data) DSP32_NEG_END_KERNEL_X_FCT__(x_num, data)
00057 #endif
00058
00059
00060 #if __GNUC__
00061 # define ASM_INSTRUCT_COMPACKED(str) str
00062 # define ASM_INSTRUCT_EXTENDED(str) str
00063 #elif __ICCAVR32__
00064 # define ASM_INSTRUCT_COMPACKED(str) str":C"
00065 # define ASM_INSTRUCT_EXTENDED(str) str":E"
00066 #endif
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00080 #define DSP32_NEGATE_0(r_vect1, r_vect2)
00081
00082 #define DSP32_NEGATE_1(r_vect1, r_vect2) \
00083 "ld.w r2, "ASTRINGZ(r_vect2)"[0x0]\n\t" \
00084 \
00085 "neg r2\n\t" \
00086 "st.w "ASTRINGZ(r_vect1)"[0x0], r2\n\t"
00087
00088 #define DSP32_NEGATE_2(r_vect1, r_vect2) \
00089 "ld.d r0, "ASTRINGZ(r_vect2)"[0x0]\n\t" \
00090 \
00091 "neg r0\n\t" \
00092 "neg r1\n\t" \
00093 "st.d "ASTRINGZ(r_vect1)"[0x0], r0\n\t"
00094
00095 #define DSP32_NEGATE_3(r_vect1, r_vect2) \
00096 "ld.d r0, "ASTRINGZ(r_vect2)"[0x0]\n\t" \
00097 \
00098 "neg r0\n\t" \
00099 "neg r1\n\t" \
00100 "st.d "ASTRINGZ(r_vect1)"[0x0], r0\n\t" \
00101 \
00102 "ld.w r0, "ASTRINGZ(r_vect2)"[0x8]\n\t" \
00103 \
00104 "neg r0\n\t" \
00105 "st.w "ASTRINGZ(r_vect1)"[0x8], r0\n\t"
00106
00107
00108
00109
00110
00111
00112 #define DSP32_NEG_END_KERNEL_X_FCT__(x_num, data) \
00113 static void TPASTE2(dsp32_vect_neg_end_kernel_x, x_num)(dsp32_t *vect1, dsp32_t *vect2) \
00114 { \
00115 __asm__ __volatile__ ( \
00116 "pushm r0-r7, lr\n\t" \
00117 TPASTE2(DSP32_NEGATE_, x_num)(r12, r11) \
00118 "popm r0-r7, pc\n\t" \
00119 ); \
00120 }
00121
00122
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00134
00136 #if __GNUC__
00137 __attribute__((__naked__))
00138 __attribute__((__noinline__))
00139 #elif __ICCAVR32__
00140 # pragma shadow_registers=full
00141 # pragma optimize=none no_inline
00142 #endif
00143 static int dsp32_vect_neg_kernel_ext(dsp32_t *vect1, dsp32_t *vect2, int size)
00144 {
00145 __asm__ __volatile__ (
00146 "pushm r0-r7, lr\n\t"
00147
00148 "mov lr, 0\n\t"
00149 "sub r10, 3\n\t"
00150
00151 "cp.h lr, r10\n\t"
00152 ASM_INSTRUCT_COMPACKED("brge __dsp32_neg_ext_end_loop")"\n"
00153
00154 "__dsp32_neg_ext_loop:\n\t"
00155
00156 "ld.d r0, r11[lr << 2]\n\t"
00157
00158 "neg r0\n\t"
00159 "neg r1\n\t"
00160 "st.d r12[lr << 2], r0\n\t"
00161
00162 "sub lr, -2\n\t"
00163
00164 "ld.d r0, r11[lr << 2]\n\t"
00165
00166 "neg r0\n\t"
00167 "neg r1\n\t"
00168 "st.d r12[lr << 2], r0\n\t"
00169
00170 "sub lr, -2\n\t"
00171
00172 "cp.h lr, r10\n\t"
00173 ASM_INSTRUCT_COMPACKED("brlt __dsp32_neg_ext_loop")"\n"
00174
00175 "__dsp32_neg_ext_end_loop:\n\t"
00176
00177 "mov r12, lr\n\t"
00178 "popm r0-r7, pc\n\t"
00179 );
00180
00181 return 0;
00182 }
00183
00184
00185 DSP32_NEG_END_KERNEL_X_FCT(0, "")
00186 DSP32_NEG_END_KERNEL_X_FCT(1, "")
00187 DSP32_NEG_END_KERNEL_X_FCT(2, "")
00188 DSP32_NEG_END_KERNEL_X_FCT(3, "")
00189
00190 void dsp32_vect_neg(dsp32_t *vect1, dsp32_t *vect2, int size)
00191 {
00192 typedef void (*neg_end_kernel_opti_t)(dsp32_t *, dsp32_t *);
00193 static const neg_end_kernel_opti_t neg_end_kernel_opti[4] = {
00194 dsp32_vect_neg_end_kernel_x0,
00195 dsp32_vect_neg_end_kernel_x1,
00196 dsp32_vect_neg_end_kernel_x2,
00197 dsp32_vect_neg_end_kernel_x3
00198 };
00199 int n;
00200
00201 n = dsp32_vect_neg_kernel_ext(vect1, vect2, size);
00202
00203
00204 neg_end_kernel_opti[size&0x3](&vect1[n], &vect2[n]);
00205 }
00206
00207 #endif