toplevel Project Status (05/09/2012 - 10:35:43) | |||
Project File: | EMB.xise | Parser Errors: | No Errors |
Module Name: | toplevel | Implementation State: | Programming File Not Generated |
Target Device: | xc3s500e-5pq208 |
|
No Errors |
Product Version: | ISE 13.4 |
|
141 Warnings (0 new) |
Design Goal: | Balanced |
|
All Signals Completely Routed |
Design Strategy: | Xilinx Default (unlocked) |
|
All Constraints Met |
Environment: | System Settings |
|
0 (Timing Report) |
Device Utilization Summary | [-] | ||||
Logic Utilization | Used | Available | Utilization | Note(s) | |
Number of Slice Flip Flops | 1,934 | 9,312 | 20% | ||
Number of 4 input LUTs | 6,495 | 9,312 | 69% | ||
Number of occupied Slices | 3,849 | 4,656 | 82% | ||
Number of Slices containing only related logic | 3,849 | 3,849 | 100% | ||
Number of Slices containing unrelated logic | 0 | 3,849 | 0% | ||
Total Number of 4 input LUTs | 6,532 | 9,312 | 70% | ||
Number used as logic | 5,471 | ||||
Number used as a route-thru | 37 | ||||
Number used for Dual Port RAMs | 1,024 | ||||
Number of bonded IOBs | 98 | 158 | 62% | ||
Number of RAMB16s | 3 | 20 | 15% | ||
Number of BUFGMUXs | 1 | 24 | 4% | ||
Average Fanout of Non-Clock Nets | 4.01 |
Performance Summary | [-] | |||
Final Timing Score: | 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report | |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
Timing Constraints: | All Constraints Met |
Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | fr 18. mai 08:07:37 2012 | 0 | 139 Warnings (0 new) | 47 Infos (0 new) | |
Translation Report | Current | fr 18. mai 08:07:50 2012 | 0 | 0 | 0 | |
Map Report | Current | fr 18. mai 08:08:06 2012 | 0 | 1 Warning (0 new) | 5 Infos (0 new) | |
Place and Route Report | Current | fr 18. mai 08:09:16 2012 | 0 | 0 | 0 | |
Power Report | ||||||
Post-PAR Static Timing Report | Current | fr 18. mai 08:09:26 2012 | 0 | 0 | 5 Infos (0 new) | |
Bitgen Report | Current | fr 18. mai 08:09:58 2012 | 0 | 1 Warning (0 new) | 0 |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
ISIM Simulator Log | Out of Date | to 17. mai 02:02:03 2012 | |
WebTalk Report | Current | fr 18. mai 08:09:59 2012 | |
WebTalk Log File | Current | fr 18. mai 08:10:11 2012 |