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00047 #include "preprocessor.h"
00048
00049 #if !defined(FORCE_ALL_GENERICS) && \
00050 !defined(FORCE_GENERIC_WIN32_RECT) && \
00051 defined(TARGET_SPECIFIC_WIN32_RECT)
00052
00053 #if __GNUC__
00054 # define DSP32_RECT_END_KERNEL_X_FCT(x_num, data) __attribute__((__naked__)) DSP32_RECT_END_KERNEL_X_FCT__(x_num, data)
00055 #elif __ICCAVR32__
00056 # define DSP32_RECT_END_KERNEL_X_FCT(x_num, data) DSP32_RECT_END_KERNEL_X_FCT__(x_num, data)
00057 #endif
00058
00059
00060 #if __GNUC__
00061 # define ASM_INSTRUCT_COMPACKED(str) str
00062 # define ASM_INSTRUCT_EXTENDED(str) str
00063 #elif __ICCAVR32__
00064 # define ASM_INSTRUCT_COMPACKED(str) str":C"
00065 # define ASM_INSTRUCT_EXTENDED(str) str":E"
00066 #endif
00067
00068
00069 #if __GNUC__
00070 # define CST_ONE "%[CST_ONE__]"
00071 #elif __ICCAVR32__
00072 # if DSP16_QB >= 31
00073 # define CST_ONE ASTRINGZ((1 << 31) - 1)
00074 # else
00075 # define CST_ONE ASTRINGZ(1 << DSP32_QB)
00076 # endif
00077 #endif
00078
00079 #if __GNUC__
00080 # define LO "lo"
00081 # define HI "hi"
00082 #elif __ICCAVR32__
00083 # define LO "LWRD"
00084 # define HI "HWRD"
00085 #endif
00086
00087
00088
00089
00090
00091
00092
00093
00094
00095
00096
00097
00098 #define DSP32_RECTANGLE_0(r_vect1)
00099
00100 #define DSP32_RECTANGLE_1(r_vect1) \
00101 "mov r8, "LO"("CST_ONE")\n\t" \
00102 "orh r8, "HI"("CST_ONE")\n\t" \
00103 "st.w "ASTRINGZ(r_vect1)"[0], r8\n\t"
00104
00105 #define DSP32_RECTANGLE_2(r_vect1) \
00106 "mov r8, "LO"("CST_ONE")\n\t" \
00107 "orh r8, "HI"("CST_ONE")\n\t" \
00108 "mov r9, r8\n\t" \
00109 "st.d "ASTRINGZ(r_vect1)"[0], r8\n\t"
00110
00111 #define DSP32_RECTANGLE_3(r_vect1) \
00112 "mov r8, "LO"("CST_ONE")\n\t" \
00113 "orh r8, "HI"("CST_ONE")\n\t" \
00114 "mov r9, r8\n\t" \
00115 "st.d "ASTRINGZ(r_vect1)"[0], r8\n\t" \
00116 "st.w "ASTRINGZ(r_vect1)"[8], r8\n\t"
00117
00118 #define DSP32_RECTANGLE_4(r_vect1) \
00119 "mov r8, "LO"("CST_ONE")\n\t" \
00120 "orh r8, "HI"("CST_ONE")\n\t" \
00121 "mov r9, r8\n\t" \
00122 "st.d "ASTRINGZ(r_vect1)"[0], r8\n\t" \
00123 "st.d "ASTRINGZ(r_vect1)"[8], r8\n\t"
00124
00125 #define DSP32_RECTANGLE_5(r_vect1) \
00126 "mov r8, "LO"("CST_ONE")\n\t" \
00127 "orh r8, "HI"("CST_ONE")\n\t" \
00128 "mov r9, r8\n\t" \
00129 "st.d "ASTRINGZ(r_vect1)"[0], r8\n\t" \
00130 "st.d "ASTRINGZ(r_vect1)"[8], r8\n\t" \
00131 "st.w "ASTRINGZ(r_vect1)"[16], r8\n\t"
00132
00133 #define DSP32_RECTANGLE_6(r_vect1) \
00134 "mov r8, "LO"("CST_ONE")\n\t" \
00135 "orh r8, "HI"("CST_ONE")\n\t" \
00136 "mov r9, r8\n\t" \
00137 "st.d "ASTRINGZ(r_vect1)"[0], r8\n\t" \
00138 "st.d "ASTRINGZ(r_vect1)"[8], r8\n\t" \
00139 "st.d "ASTRINGZ(r_vect1)"[16], r8\n\t"
00140
00141 #define DSP32_RECTANGLE_7(r_vect1) \
00142 "mov r8, "LO"("CST_ONE")\n\t" \
00143 "orh r8, "HI"("CST_ONE")\n\t" \
00144 "mov r9, r8\n\t" \
00145 "st.d "ASTRINGZ(r_vect1)"[0], r8\n\t" \
00146 "st.d "ASTRINGZ(r_vect1)"[8], r8\n\t" \
00147 "st.d "ASTRINGZ(r_vect1)"[16], r8\n\t" \
00148 "st.w "ASTRINGZ(r_vect1)"[24], r8\n\t"
00149
00150
00151
00152
00153
00154
00155
00156 #if __GNUC__
00157 # define DSP32_RECT_END_KERNEL_X_FCT__(x_num, data) \
00158 static void TPASTE2(dsp32_win_rect_end_kernel_x, x_num)(dsp32_t *vect1) \
00159 { \
00160 __asm__ __volatile__ ( \
00161 TPASTE2(DSP32_RECTANGLE_, x_num)(r12) \
00162 "mov pc, lr\n\t" \
00163 : \
00164 : \
00165 [CST_ONE__] "i" (DSP32_Q(1.)) \
00166 ); \
00167 }
00168 #elif __ICCAVR32__
00169 # define DSP32_RECT_END_KERNEL_X_FCT__(x_num, data) \
00170 static void TPASTE2(dsp32_win_rect_end_kernel_x, x_num)(dsp32_t *vect1) \
00171 { \
00172 __asm__ __volatile__ ( \
00173 TPASTE2(DSP32_RECTANGLE_, x_num)(r12) \
00174 "mov pc, lr\n\t" \
00175 ); \
00176 }
00177 #endif
00178
00179
00180
00181
00182
00183
00184
00185
00186
00187
00188
00189
00190
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00192
00193
00195 #if __GNUC__
00196 __attribute__((__naked__))
00197 __attribute__((__noinline__))
00198 #elif __ICCAVR32__
00199 # pragma shadow_registers=full
00200 # pragma optimize=none no_inline
00201 #endif
00202 static dsp32_t *dsp32_win_rect_kernel_ext(dsp32_t *vect1, int size)
00203 {
00204 __asm__ __volatile__ (
00205 "sub r11, 7\n\t"
00206
00207 "add r11, r12, r11 << 2\n"
00208 "cp.w r12, r11\n\t"
00209 ASM_INSTRUCT_COMPACKED("brge __dsp32_rect_ext_end_loop")"\n\t"
00210
00211
00212 "mov r8, "LO"("CST_ONE")\n\t"
00213 "orh r8, "HI"("CST_ONE")\n\t"
00214 "mov r9, r8\n"
00215
00216 "__dsp32_rect_ext_loop:\n\t"
00217
00218 "st.d r12[0], r8\n\t"
00219 "st.d r12[8], r8\n\t"
00220 "st.d r12[16], r8\n\t"
00221 "st.d r12[24], r8\n\t"
00222
00223 "sub r12, -32\n\t"
00224
00225 "cp.w r12, r11\n\t"
00226 ASM_INSTRUCT_COMPACKED("brlt __dsp32_rect_ext_loop")"\n"
00227
00228 "__dsp32_rect_ext_end_loop:\n\t"
00229
00230 "retal r12\n\t"
00231 #if __GNUC__
00232 :
00233 :
00234 [CST_ONE__] "i" (DSP32_Q(1.))
00235 #endif
00236 );
00237
00238 return (dsp32_t *) 0;
00239 }
00240
00241
00242 DSP32_RECT_END_KERNEL_X_FCT(0, "")
00243 DSP32_RECT_END_KERNEL_X_FCT(1, "")
00244 DSP32_RECT_END_KERNEL_X_FCT(2, "")
00245 DSP32_RECT_END_KERNEL_X_FCT(3, "")
00246 DSP32_RECT_END_KERNEL_X_FCT(4, "")
00247 DSP32_RECT_END_KERNEL_X_FCT(5, "")
00248 DSP32_RECT_END_KERNEL_X_FCT(6, "")
00249 DSP32_RECT_END_KERNEL_X_FCT(7, "")
00250
00251 void dsp32_win_rect(dsp32_t *vect1, int size)
00252 {
00253 typedef void (*rect_end_kernel_opti_t)(dsp32_t *);
00254 static const rect_end_kernel_opti_t rect_end_kernel_opti[8] = {
00255 dsp32_win_rect_end_kernel_x0,
00256 dsp32_win_rect_end_kernel_x1,
00257 dsp32_win_rect_end_kernel_x2,
00258 dsp32_win_rect_end_kernel_x3,
00259 dsp32_win_rect_end_kernel_x4,
00260 dsp32_win_rect_end_kernel_x5,
00261 dsp32_win_rect_end_kernel_x6,
00262 dsp32_win_rect_end_kernel_x7
00263 };
00264
00265 vect1 = dsp32_win_rect_kernel_ext(vect1, size);
00266
00267
00268 rect_end_kernel_opti[size&0x7](vect1);
00269 }
00270
00271 #endif