This example involves one TC channel configured in capture mode (input). Upon a GPIO pin change, an event triggers a TC.Ai capture.
Definition in file tc_event_example4_uc3l.c.
#include <avr32/io.h>
#include "intc.h"
#include "compiler.h"
#include "board.h"
#include "power_clocks_lib.h"
#include "gpio.h"
#include "tc.h"
Go to the source code of this file.
Defines | |
TC Channel Choice | |
#define | EXAMPLE_EVENT_PIN AVR32_PIN_PA11 |
#define | EXAMPLE_TARGET_DFLL_FREQ_HZ 96000000 |
#define | EXAMPLE_TARGET_MCUCLK_FREQ_HZ 12000000 |
#define | EXAMPLE_TARGET_PBACLK_FREQ_HZ 12000000 |
#define | EXAMPLE_TC (&AVR32_TC0) |
#define | EXAMPLE_TC_CHANNEL 1 |
#define | EXAMPLE_TC_IRQ AVR32_TC0_IRQ1 |
#define | EXAMPLE_TC_IRQ_GROUP AVR32_TC0_IRQ_GROUP |
Functions | |
static void | init_tc_input (volatile avr32_tc_t *tc, unsigned int channel) |
Initializes the timer/counter capture. | |
int | main (void) |
Main function:
| |
static void | tc_irq_handler (void) |
TC interrupt handler. | |
Variables | |
static volatile int | chan_status = 0 |
Parameters to pcl_configure_clocks(). | |
static scif_gclk_opt_t | gc_dfllif_ref_opt = { SCIF_GCCTRL_SLOWCLOCK, 0, OFF } |
static pcl_freq_param_t | pcl_dfll_freq_param |
#define EXAMPLE_EVENT_PIN AVR32_PIN_PA11 |
#define EXAMPLE_TARGET_DFLL_FREQ_HZ 96000000 |
Definition at line 128 of file tc_event_example4_uc3l.c.
#define EXAMPLE_TARGET_MCUCLK_FREQ_HZ 12000000 |
Definition at line 129 of file tc_event_example4_uc3l.c.
#define EXAMPLE_TARGET_PBACLK_FREQ_HZ 12000000 |
Definition at line 130 of file tc_event_example4_uc3l.c.
#define EXAMPLE_TC (&AVR32_TC0) |
Definition at line 118 of file tc_event_example4_uc3l.c.
Referenced by main(), and tc_irq_handler().
#define EXAMPLE_TC_CHANNEL 1 |
Definition at line 119 of file tc_event_example4_uc3l.c.
Referenced by main(), and tc_irq_handler().
#define EXAMPLE_TC_IRQ AVR32_TC0_IRQ1 |
#define EXAMPLE_TC_IRQ_GROUP AVR32_TC0_IRQ_GROUP |
Definition at line 120 of file tc_event_example4_uc3l.c.
static void init_tc_input | ( | volatile avr32_tc_t * | tc, | |
unsigned int | channel | |||
) | [static] |
Initializes the timer/counter capture.
Definition at line 179 of file tc_event_example4_uc3l.c.
References TC_BURST_NOT_GATED, TC_CLOCK_RISING_EDGE, TC_CLOCK_SOURCE_TC4, TC_EXT_TRIG_SEL_TIOA, tc_init_capture(), TC_NO_TRIGGER_COMPARE_RC, TC_SEL_NO_EDGE, and TC_SEL_RISING_EDGE.
Referenced by main().
00180 { 00181 // Options for capture mode. 00182 tc_capture_opt_t capture_opt = 00183 { 00184 .channel = channel, // Channel selection. 00185 00186 .ldrb = TC_SEL_NO_EDGE, // RB loading selection. 00187 .ldra = TC_SEL_RISING_EDGE, // RA loading selection. 00188 00189 .cpctrg = TC_NO_TRIGGER_COMPARE_RC, // RC compare trigger disabled. 00190 .abetrg = TC_EXT_TRIG_SEL_TIOA, // TIOA external trigger selection. 00191 .etrgedg = TC_SEL_RISING_EDGE, // External trigger edge selection. 00192 00193 .ldbdis = FALSE, // Counter clock disable with RB loading. 00194 .ldbstop = FALSE, // Counter clock stopped with RB loading. 00195 00196 .burst = TC_BURST_NOT_GATED, // Burst signal selection. 00197 .clki = TC_CLOCK_RISING_EDGE, // Clock inversion. 00198 .tcclks = TC_CLOCK_SOURCE_TC4 // Internal source clock 4, connected to fPBA / 32. 00199 }; 00200 00201 // Initialize the timer/counter capture. 00202 tc_init_capture(tc, &capture_opt); 00203 }
int main | ( | void | ) |
Main function:
Definition at line 209 of file tc_event_example4_uc3l.c.
References EXAMPLE_EVENT_PIN, EXAMPLE_TC, EXAMPLE_TC_CHANNEL, EXAMPLE_TC_IRQ, init_tc_input(), pcl_dfll_freq_param, tc_configure_interrupts(), tc_irq_handler(), and tc_start().
00210 { 00211 static const tc_interrupt_t TC_INTERRUPT = 00212 { 00213 .etrgs = 0, 00214 .ldrbs = 0, 00215 .ldras = 1, // Generate an interrupt upon RA load occurence 00216 .cpcs = 0, 00217 .cpbs = 0, 00218 .cpas = 0, 00219 .lovrs = 0, 00220 .covfs = 0 00221 }; 00222 // The timer/counter instance and channel numbers are used in several functions. 00223 // It's defined as local variable for ease-of-use and readability. 00224 volatile avr32_tc_t *tc = EXAMPLE_TC; 00225 00226 // Clear LED0. 00227 gpio_set_gpio_pin(LED0_GPIO); 00228 00229 00230 #if BOARD == UC3L_EK 00231 // Note: on the AT32UC3L-EK board, there is no crystal/external clock connected 00232 // to the OSC0 pinout XIN0/XOUT0. We shall then program the DFLL and switch the 00233 // main clock source to the DFLL. 00234 pcl_configure_clocks(&pcl_dfll_freq_param); 00235 // Note: since it is dynamically computing the appropriate field values of the 00236 // configuration registers from the parameters structure, this function is not 00237 // optimal in terms of code size. For a code size optimal solution, it is better 00238 // to create a new function from pcl_configure_clocks_dfll0() and modify it 00239 // to use preprocessor computation from pre-defined target frequencies. 00240 #else 00241 // Configure Osc0 in crystal mode (i.e. use of an external crystal source, with 00242 // frequency FOSC0) with an appropriate startup time then switch the main clock 00243 // source to Osc0. 00244 pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP); 00245 #endif 00246 00247 //# 00248 //# Configure the EXAMPLE_EVENT_PIN gpio to generate an event on falling edge, 00249 //# with input Glitch filter enabled. 00250 //# 00251 //# Note: Make sure that the corresponding pin functions for the TIOA line are 00252 //# not enabled. 00253 //# 00254 // Configure 00255 gpio_configure_pin_periph_event_mode(EXAMPLE_EVENT_PIN, GPIO_FALLING_EDGE, TRUE); 00256 // Enable the pull-up so that we can easily get a falling edge by connecting the 00257 // pin to the GND. 00258 gpio_enable_pin_pull_up(EXAMPLE_EVENT_PIN); 00259 // Enable the peripheral event generation of the EXAMPLE_EVENT_PIN pin. 00260 gpio_enable_pin_periph_event(EXAMPLE_EVENT_PIN); 00261 00262 Disable_global_interrupt(); 00263 00264 // The INTC driver has to be used only for GNU GCC for AVR32. 00265 #ifdef __GNUC__ 00266 // Initialize interrupt vectors. 00267 INTC_init_interrupts(); 00268 00269 // Register the TC interrupt handler to the interrupt controller. 00270 INTC_register_interrupt(&tc_irq_handler, EXAMPLE_TC_IRQ, AVR32_INTC_INT3); 00271 #endif 00272 00273 Enable_global_interrupt(); 00274 00275 // Initialize the timer/counter. 00276 init_tc_input(tc, EXAMPLE_TC_CHANNEL); 00277 00278 // Configure the chosen interrupts of the timer/counter. 00279 tc_configure_interrupts(tc, EXAMPLE_TC_CHANNEL, &TC_INTERRUPT); 00280 00281 // Start the timer/counter. 00282 tc_start(tc, EXAMPLE_TC_CHANNEL); 00283 00284 while(1); 00285 }
static void tc_irq_handler | ( | void | ) | [static] |
TC interrupt handler.
Definition at line 167 of file tc_event_example4_uc3l.c.
References chan_status, EXAMPLE_TC, EXAMPLE_TC_CHANNEL, and tc_read_sr().
Referenced by main().
00168 { 00169 // Clear the interrupt flag. This is a side effect of reading the TC SR. 00170 chan_status = tc_read_sr(EXAMPLE_TC, EXAMPLE_TC_CHANNEL); 00171 00172 // Toggle LED0. 00173 gpio_tgl_gpio_pin(LED0_GPIO); 00174 }
volatile int chan_status = 0 [static] |
scif_gclk_opt_t gc_dfllif_ref_opt = { SCIF_GCCTRL_SLOWCLOCK, 0, OFF } [static] |
Definition at line 134 of file tc_event_example4_uc3l.c.
pcl_freq_param_t pcl_dfll_freq_param [static] |
Initial value:
{ .main_clk_src = PCL_MC_DFLL0, .cpu_f = EXAMPLE_TARGET_MCUCLK_FREQ_HZ, .pba_f = EXAMPLE_TARGET_PBACLK_FREQ_HZ, .pbb_f = EXAMPLE_TARGET_PBACLK_FREQ_HZ, .dfll_f = EXAMPLE_TARGET_DFLL_FREQ_HZ, .pextra_params = &gc_dfllif_ref_opt }
Definition at line 135 of file tc_event_example4_uc3l.c.
Referenced by main().