Defines | |
#define | Is_usb_bank_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_NBUSYBKE_MASK)) |
tests if all banks full (OUT) or free (IN) interrupt enabled | |
#define | Is_usb_control_in_ready() (Tst_bits(AVR32_USBB_uestax(EP_CONTROL), AVR32_USBB_UESTAX_TXINI_MASK)) |
tests if IN ready on control endpoint | |
#define | Is_usb_control_in_ready_interrupt_enabled() (Tst_bits(AVR32_USBB_ueconx(EP_CONTROL), AVR32_USBB_UECONX_TXINE_MASK)) |
tests if IN ready on control endpoint interrupt is enabled | |
#define | Is_usb_control_out_received() (Tst_bits(AVR32_USBB_uestax(EP_CONTROL), AVR32_USBB_UESTAX_RXOUTI_MASK)) |
tests if OUT received on control endpoint | |
#define | Is_usb_control_out_received_interrupt_enabled() (Tst_bits(AVR32_USBB_ueconx(EP_CONTROL), AVR32_USBB_UECONX_RXOUTE_MASK)) |
tests if OUT received on control endpoint interrupt is enabled | |
#define | Is_usb_crc_error(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_STALLEDI_MASK)) |
tests if CRC ERROR ISO OUT detected | |
#define | Is_usb_crc_error_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_STALLEDE_MASK)) |
tests if CRC ERROR ISO OUT detected interrupt is enabled | |
#define | Is_usb_data_toggle_reset(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_RSTDT_MASK)) |
tests if the data toggle sequence is being reset | |
#define | Is_usb_endpoint_bank_autoswitch_enabled(ep) (Tst_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_AUTOSW_MASK)) |
#define | Is_usb_endpoint_configured(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_CFGOK_MASK)) |
tests if current endpoint is configured | |
#define | Is_usb_endpoint_enabled(ep) (Tst_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
tests if the selected endpoint is enabled | |
#define | Is_usb_endpoint_interrupt(ep) (Tst_bits(AVR32_USBB_udint, AVR32_USBB_UDINT_EP0INT_MASK << (ep))) |
tests if an interrupt is triggered by the selected endpoint | |
#define | Is_usb_endpoint_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_udinte, AVR32_USBB_UDINTE_EP0INTE_MASK << (ep))) |
tests if the selected endpoint interrupt is enabled | |
#define | Is_usb_endpoint_stall_requested(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_STALLRQ_MASK)) |
tests if STALL handshake request is running | |
#define | Is_usb_fifocon(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_FIFOCON_MASK)) |
tests if FIFOCON bit set | |
#define | Is_usb_in_ready(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_TXINI_MASK)) |
tests if IN ready | |
#define | Is_usb_in_ready_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_TXINE_MASK)) |
tests if IN ready interrupt is enabled | |
#define | Is_usb_in_sent(ep) (Is_usb_fifocon(ep)) |
tests if current bank sent for IN endpoint | |
#define | Is_usb_last_in_bank_killed(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_KILLBK_MASK)) |
tests if last bank killed | |
#define | Is_usb_memory_allocated(ep) (Tst_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_ALLOC_MASK)) |
#define | Is_usb_nak_in(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_NAKINI_MASK)) |
tests if NAK IN received | |
#define | Is_usb_nak_in_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_NAKINE_MASK)) |
tests if NAK IN interrupt is enabled | |
#define | Is_usb_nak_out(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_NAKOUTI_MASK)) |
tests if NAK OUT received | |
#define | Is_usb_nak_out_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_NAKOUTE_MASK)) |
tests if NAK OUT interrupt is enabled | |
#define | Is_usb_out_filled(ep) (Is_usb_fifocon(ep)) |
tests if current bank filled for OUT endpoint | |
#define | Is_usb_out_received(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_RXOUTI_MASK)) |
tests if OUT received | |
#define | Is_usb_out_received_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_RXOUTE_MASK)) |
tests if OUT received interrupt is enabled | |
#define | Is_usb_overflow(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_OVERFI_MASK)) |
tests if an overflow occurs | |
#define | Is_usb_overflow_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_OVERFE_MASK)) |
tests if overflow interrupt is enabled | |
#define | Is_usb_read_enabled(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_RWALL_MASK)) |
tests if endpoint read allowed | |
#define | Is_usb_resetting_endpoint(ep) (Tst_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) |
tests if the selected endpoint is being reset | |
#define | Is_usb_setup_received() (Tst_bits(AVR32_USBB_uestax(EP_CONTROL), AVR32_USBB_UESTAX_RXSTPI_MASK)) |
tests if SETUP received | |
#define | Is_usb_setup_received_interrupt_enabled() (Tst_bits(AVR32_USBB_ueconx(EP_CONTROL), AVR32_USBB_UECONX_RXSTPE_MASK)) |
tests if SETUP received interrupt is enabled | |
#define | Is_usb_short_packet(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_SHORTPACKETI_MASK)) |
tests if SHORT PACKET received | |
#define | Is_usb_short_packet_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_SHORTPACKETE_MASK)) |
tests if SHORT PACKET received interrupt is enabled | |
#define | Is_usb_stall(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_STALLEDI_MASK)) |
tests if STALL sent | |
#define | Is_usb_stall_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_STALLEDE_MASK)) |
tests if STALL sent interrupt is enabled | |
#define | Is_usb_underflow(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_RXSTPI_MASK)) |
tests if an underflow occurs | |
#define | Is_usb_underflow_interrupt_enabled(ep) (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_RXSTPE_MASK)) |
tests if underflow interrupt is enabled | |
#define | Is_usb_write_enabled(ep) (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_RWALL_MASK)) |
tests if endpoint write allowed | |
#define | Usb_ack_control_in_ready_send() (AVR32_USBB_uestaxclr(EP_CONTROL) = AVR32_USBB_UESTAXCLR_TXINIC_MASK) |
acks IN ready on control endpoint and sends current bank | |
#define | Usb_ack_control_out_received_free() (AVR32_USBB_uestaxclr(EP_CONTROL) = AVR32_USBB_UESTAXCLR_RXOUTIC_MASK) |
acks OUT received on control endpoint and frees current bank | |
#define | Usb_ack_crc_error(ep) (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_STALLEDIC_MASK) |
acks CRC ERROR ISO OUT detected | |
#define | Usb_ack_fifocon(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_FIFOCONC_MASK) |
clears FIFOCON bit | |
#define | Usb_ack_in_ready(ep) (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_TXINIC_MASK) |
acks IN ready | |
#define | Usb_ack_in_ready_send(ep) (Usb_ack_in_ready(ep), Usb_send_in(ep)) |
acks IN ready and sends current bank | |
#define | Usb_ack_nak_in(ep) (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_NAKINIC_MASK) |
acks NAK IN received | |
#define | Usb_ack_nak_out(ep) (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_NAKOUTIC_MASK) |
acks NAK OUT received | |
#define | Usb_ack_out_received(ep) (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_RXOUTIC_MASK) |
acks OUT received | |
#define | Usb_ack_out_received_free(ep) (Usb_ack_out_received(ep), Usb_free_out(ep)) |
acks OUT received and frees current bank | |
#define | Usb_ack_overflow_interrupt(ep) (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_OVERFIC_MASK) |
acks endpoint overflow interrupt | |
#define | Usb_ack_setup_received_free() (AVR32_USBB_uestaxclr(EP_CONTROL) = AVR32_USBB_UESTAXCLR_RXSTPIC_MASK) |
acks SETUP received | |
#define | Usb_ack_short_packet(ep) (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_SHORTPACKETIC_MASK) |
acks SHORT PACKET received | |
#define | Usb_ack_stall(ep) (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_STALLEDIC_MASK) |
acks STALL sent | |
#define | Usb_ack_underflow_interrupt(ep) (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_RXSTPIC_MASK) |
acks endpoint underflow interrupt | |
#define | Usb_allocate_memory(ep) (Set_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_ALLOC_MASK)) |
allocates the configuration x in DPRAM memory | |
#define | Usb_byte_count(ep) (Rd_bitfield(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_BYCT_MASK)) |
returns the byte count | |
#define | Usb_configure_endpoint(ep, type, dir, size, bank) |
configures selected endpoint in one step | |
#define | Usb_configure_endpoint_bank(ep, bank) (Wr_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPBK_MASK, bank)) |
configures the selected endpoint number of banks | |
#define | Usb_configure_endpoint_direction(ep, dir) (Wr_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPDIR_MASK, dir)) |
configures the selected endpoint direction | |
#define | Usb_configure_endpoint_size(ep, size) (Wr_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPSIZE_MASK, Usb_format_endpoint_size(size))) |
configures the selected endpoint size | |
#define | Usb_configure_endpoint_type(ep, type) (Wr_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPTYPE_MASK, type)) |
configures the selected endpoint type | |
#define | Usb_control_direction() (Rd_bitfield(AVR32_USBB_uestax(EP_CONTROL), AVR32_USBB_UESTAX_CTRLDIR_MASK)) |
returns the control direction | |
#define | Usb_current_bank(ep) (Rd_bitfield(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_CURRBK_MASK)) |
returns the number of the current bank | |
#define | Usb_data_toggle(ep) (Rd_bitfield(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_DTSEQ_MASK)) |
returns data toggle | |
#define | Usb_disable_bank_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_NBUSYBKEC_MASK) |
disables all banks full (OUT) or free (IN) interrupt | |
#define | Usb_disable_control_in_ready_interrupt() (AVR32_USBB_ueconxclr(EP_CONTROL) = AVR32_USBB_UECONXCLR_TXINEC_MASK) |
disables IN ready on control endpoint interrupt | |
#define | Usb_disable_control_out_received_interrupt() (AVR32_USBB_ueconxclr(EP_CONTROL) = AVR32_USBB_UECONXCLR_RXOUTEC_MASK) |
disables OUT received on control endpoint interrupt | |
#define | Usb_disable_crc_error_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_STALLEDEC_MASK) |
disables CRC ERROR ISO OUT detected interrupt | |
#define | Usb_disable_endpoint(ep) (Clr_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
disables the selected endpoint | |
#define | Usb_disable_endpoint_bank_autoswitch(ep) (Clr_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_AUTOSW_MASK)) |
disables the bank autoswitch for the selected endpoint | |
#define | Usb_disable_endpoint_interrupt(ep) (AVR32_USBB_udinteclr = AVR32_USBB_UDINTECLR_EP0INTEC_MASK << (ep)) |
disables the selected endpoint interrupt | |
#define | Usb_disable_in_ready_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_TXINEC_MASK) |
disables IN ready interrupt | |
#define | Usb_disable_nak_in_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_NAKINEC_MASK) |
disables NAK IN interrupt | |
#define | Usb_disable_nak_out_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_NAKOUTEC_MASK) |
disables NAK OUT interrupt | |
#define | Usb_disable_out_received_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_RXOUTEC_MASK) |
disables OUT received interrupt | |
#define | Usb_disable_overflow_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_OVERFEC_MASK) |
disables overflow interrupt | |
#define | Usb_disable_setup_received_interrupt() (AVR32_USBB_ueconxclr(EP_CONTROL) = AVR32_USBB_UECONXCLR_RXSTPEC_MASK) |
disables SETUP received interrupt | |
#define | Usb_disable_short_packet_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_SHORTPACKETEC_MASK) |
disables SHORT PACKET received interrupt | |
#define | Usb_disable_stall_handshake(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_STALLRQC_MASK) |
disables the STALL handshake | |
#define | Usb_disable_stall_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_STALLEDEC_MASK) |
disables STALL sent interrupt | |
#define | Usb_disable_underflow_interrupt(ep) (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_RXSTPEC_MASK) |
disables underflow interrupt | |
#define | Usb_enable_bank_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_NBUSYBKES_MASK) |
enables all banks full (OUT) or free (IN) interrupt | |
#define | Usb_enable_control_in_ready_interrupt() (AVR32_USBB_ueconxset(EP_CONTROL) = AVR32_USBB_UECONXSET_TXINES_MASK) |
enables IN ready on control endpoint interrupt | |
#define | Usb_enable_control_out_received_interrupt() (AVR32_USBB_ueconxset(EP_CONTROL) = AVR32_USBB_UECONXSET_RXOUTES_MASK) |
enables OUT received on control endpoint interrupt | |
#define | Usb_enable_crc_error_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_STALLEDES_MASK) |
enables CRC ERROR ISO OUT detected interrupt | |
#define | Usb_enable_endpoint(ep) (Set_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
enables the selected endpoint | |
#define | Usb_enable_endpoint_bank_autoswitch(ep) (Set_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_AUTOSW_MASK)) |
enables the bank autoswitch for the selected endpoint | |
#define | Usb_enable_endpoint_interrupt(ep) (AVR32_USBB_udinteset = AVR32_USBB_UDINTESET_EP0INTES_MASK << (ep)) |
enables the selected endpoint interrupt | |
#define | Usb_enable_in_ready_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_TXINES_MASK) |
enables IN ready interrupt | |
#define | Usb_enable_nak_in_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_NAKINES_MASK) |
enables NAK IN interrupt | |
#define | Usb_enable_nak_out_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_NAKOUTES_MASK) |
enables NAK OUT interrupt | |
#define | Usb_enable_out_received_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_RXOUTES_MASK) |
enables OUT received interrupt | |
#define | Usb_enable_overflow_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_OVERFES_MASK) |
enables overflow interrupt | |
#define | Usb_enable_setup_received_interrupt() (AVR32_USBB_ueconxset(EP_CONTROL) = AVR32_USBB_UECONXSET_RXSTPES_MASK) |
enables SETUP received interrupt | |
#define | Usb_enable_short_packet_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_SHORTPACKETES_MASK) |
enables SHORT PACKET received interrupt | |
#define | Usb_enable_stall_handshake(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_STALLRQS_MASK) |
enables the STALL handshake | |
#define | Usb_enable_stall_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_STALLEDES_MASK) |
enables STALL sent interrupt | |
#define | Usb_enable_underflow_interrupt(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_RXSTPES_MASK) |
enables underflow interrupt | |
#define | Usb_force_bank_interrupt(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_NBUSYBKS_MASK) |
forces all banks full (OUT) or free (IN) interrupt | |
#define | Usb_format_endpoint_size(size) (32 - clz(((U32)min(max(size, 8), 1024) << 1) - 1) - 1 - 3) |
Bounds given integer size to allowed range and rounds it up to the nearest available greater size, then applies register format of USBB controller for endpoint size bit-field. | |
#define | Usb_free_out(ep) (Usb_ack_fifocon(ep)) |
frees current bank for OUT endpoint | |
#define | Usb_get_endpoint_bank(ep) (Rd_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPBK_MASK)) |
gets the configured selected endpoint number of banks | |
#define | Usb_get_endpoint_direction(ep) (Rd_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPDIR_MASK)) |
gets the configured selected endpoint direction | |
#define | Usb_get_endpoint_fifo_access(ep, scale) (AVR32_USBB_FIFOX_DATA(ep, scale)) |
Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint. | |
#define | Usb_get_endpoint_size(ep) (8 << Rd_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPSIZE_MASK)) |
gets the configured selected endpoint size | |
#define | Usb_get_endpoint_type(ep) (Rd_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPTYPE_MASK)) |
gets the configured selected endpoint type | |
#define | Usb_get_interrupt_endpoint_number() |
returns the lowest endpoint number generating an endpoint interrupt or MAX_PEP_NB if none | |
#define | Usb_halt_endpoint(ep) (Usb_enable_stall_handshake(ep)) |
Sends a STALL handshake for the next host request. | |
#define | Usb_kill_last_in_bank(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_KILLBKS_MASK) |
kills last bank | |
#define | Usb_nb_busy_bank(ep) (Rd_bitfield(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_NBUSYBK_MASK)) |
returns the number of busy banks | |
#define | Usb_raise_control_in_ready() (AVR32_USBB_uestaxset(EP_CONTROL) = AVR32_USBB_UESTAXSET_TXINIS_MASK) |
raises IN ready on control endpoint | |
#define | Usb_raise_control_out_received() (AVR32_USBB_uestaxset(EP_CONTROL) = AVR32_USBB_UESTAXSET_RXOUTIS_MASK) |
raises OUT received on control endpoint | |
#define | Usb_raise_crc_error(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_STALLEDIS_MASK) |
raises CRC ERROR ISO OUT detected | |
#define | Usb_raise_in_ready(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_TXINIS_MASK) |
raises IN ready | |
#define | Usb_raise_nak_in(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_NAKINIS_MASK) |
raises NAK IN received | |
#define | Usb_raise_nak_out(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_NAKOUTIS_MASK) |
raises NAK OUT received | |
#define | Usb_raise_out_received(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_RXOUTIS_MASK) |
raises OUT received | |
#define | Usb_raise_overflow_interrupt(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_OVERFIS_MASK) |
raises endpoint overflow interrupt | |
#define | Usb_raise_setup_received() (AVR32_USBB_uestaxset(EP_CONTROL) = AVR32_USBB_UESTAXSET_RXSTPIS_MASK) |
raises SETUP received | |
#define | Usb_raise_short_packet(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_SHORTPACKETIS_MASK) |
raises SHORT PACKET received | |
#define | Usb_raise_stall(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_STALLEDIS_MASK) |
raises STALL sent | |
#define | Usb_raise_underflow_interrupt(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_RXSTPIS_MASK) |
raises endpoint underflow interrupt | |
#define | Usb_read_endpoint_data(ep, scale) |
Read 64-, 32-, 16- or 8-bit data from FIFO data register of selected endpoint. | |
#define | Usb_read_endpoint_indexed_data(ep, scale, index) (AVR32_USBB_FIFOX_DATA(ep, scale)[(index)]) |
Read 64-, 32-, 16- or 8-bit indexed data from FIFO data register of selected endpoint. | |
#define | Usb_reset_data_toggle(ep) (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_RSTDTS_MASK) |
resets the data toggle sequence | |
#define | Usb_reset_endpoint(ep) |
resets the selected endpoint | |
#define | Usb_reset_endpoint_fifo_access(ep) (pep_fifo[(ep)].u64ptr = Usb_get_endpoint_fifo_access(ep, 64)) |
Reset known position inside FIFO data register of selected endpoint. | |
#define | Usb_send_in(ep) (Usb_ack_fifocon(ep)) |
sends current bank for IN endpoint | |
#define | Usb_unallocate_memory(ep) (Clr_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_ALLOC_MASK)) |
un-allocates the configuration x in DPRAM memory | |
#define | Usb_unforce_bank_interrupt(ep) (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_NBUSYBKS_MASK) |
unforces all banks full (OUT) or free (IN) interrupt | |
#define | Usb_write_endpoint_data(ep, scale, data) |
Write 64-, 32-, 16- or 8-bit data to FIFO data register of selected endpoint. | |
#define | Usb_write_endpoint_indexed_data(ep, scale, index, data) (AVR32_USBB_FIFOX_DATA(ep, scale)[(index)] = (data)) |
Write 64-, 32-, 16- or 8-bit indexed data to FIFO data register of selected endpoint. |
#define Is_usb_bank_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_NBUSYBKE_MASK)) |
#define Is_usb_control_in_ready | ( | ) | (Tst_bits(AVR32_USBB_uestax(EP_CONTROL), AVR32_USBB_UESTAX_TXINI_MASK)) |
tests if IN ready on control endpoint
Definition at line 757 of file usb_drv.h.
Referenced by usb_get_descriptor(), usb_set_address(), usb_set_feature(), and usb_set_interface().
#define Is_usb_control_in_ready_interrupt_enabled | ( | ) | (Tst_bits(AVR32_USBB_ueconx(EP_CONTROL), AVR32_USBB_UECONX_TXINE_MASK)) |
#define Is_usb_control_out_received | ( | ) | (Tst_bits(AVR32_USBB_uestax(EP_CONTROL), AVR32_USBB_UESTAX_RXOUTI_MASK)) |
tests if OUT received on control endpoint
Definition at line 750 of file usb_drv.h.
Referenced by usb_get_configuration(), usb_get_descriptor(), usb_get_interface(), and usb_get_status().
#define Is_usb_control_out_received_interrupt_enabled | ( | ) | (Tst_bits(AVR32_USBB_ueconx(EP_CONTROL), AVR32_USBB_UECONX_RXOUTE_MASK)) |
#define Is_usb_crc_error | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_STALLEDI_MASK)) |
#define Is_usb_crc_error_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_STALLEDE_MASK)) |
#define Is_usb_data_toggle_reset | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_RSTDT_MASK)) |
#define Is_usb_endpoint_bank_autoswitch_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_AUTOSW_MASK)) |
#define Is_usb_endpoint_configured | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_CFGOK_MASK)) |
#define Is_usb_endpoint_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
tests if the selected endpoint is enabled
Definition at line 574 of file usb_drv.h.
Referenced by usb_clear_feature(), usb_init_device(), and usb_set_feature().
#define Is_usb_endpoint_interrupt | ( | ep | ) | (Tst_bits(AVR32_USBB_udint, AVR32_USBB_UDINT_EP0INT_MASK << (ep))) |
#define Is_usb_endpoint_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_udinte, AVR32_USBB_UDINTE_EP0INTE_MASK << (ep))) |
#define Is_usb_endpoint_stall_requested | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_STALLRQ_MASK)) |
tests if STALL handshake request is running
Definition at line 576 of file usb_drv.h.
Referenced by usb_get_status().
#define Is_usb_fifocon | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_FIFOCON_MASK)) |
#define Is_usb_in_ready | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_TXINI_MASK)) |
#define Is_usb_in_ready_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_TXINE_MASK)) |
#define Is_usb_in_sent | ( | ep | ) | (Is_usb_fifocon(ep)) |
#define Is_usb_last_in_bank_killed | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_KILLBK_MASK)) |
#define Is_usb_memory_allocated | ( | ep | ) | (Tst_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_ALLOC_MASK)) |
#define Is_usb_nak_in | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_NAKINI_MASK)) |
#define Is_usb_nak_in_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_NAKINE_MASK)) |
#define Is_usb_nak_out | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_NAKOUTI_MASK)) |
tests if NAK OUT received
Definition at line 705 of file usb_drv.h.
Referenced by usb_get_descriptor().
#define Is_usb_nak_out_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_NAKOUTE_MASK)) |
#define Is_usb_out_filled | ( | ep | ) | (Is_usb_fifocon(ep)) |
#define Is_usb_out_received | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_RXOUTI_MASK)) |
tests if OUT received
Definition at line 746 of file usb_drv.h.
Referenced by device_template_task().
#define Is_usb_out_received_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_RXOUTE_MASK)) |
#define Is_usb_overflow | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_OVERFI_MASK)) |
#define Is_usb_overflow_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_OVERFE_MASK)) |
#define Is_usb_read_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_RWALL_MASK)) |
#define Is_usb_resetting_endpoint | ( | ep | ) | (Tst_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) |
#define Is_usb_setup_received | ( | ) | (Tst_bits(AVR32_USBB_uestax(EP_CONTROL), AVR32_USBB_UESTAX_RXSTPI_MASK)) |
#define Is_usb_setup_received_interrupt_enabled | ( | ) | (Tst_bits(AVR32_USBB_ueconx(EP_CONTROL), AVR32_USBB_UECONX_RXSTPE_MASK)) |
#define Is_usb_short_packet | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_SHORTPACKETI_MASK)) |
#define Is_usb_short_packet_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_SHORTPACKETE_MASK)) |
#define Is_usb_stall | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_STALLEDI_MASK)) |
#define Is_usb_stall_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_STALLEDE_MASK)) |
#define Is_usb_underflow | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_RXSTPI_MASK)) |
#define Is_usb_underflow_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_ueconx(ep), AVR32_USBB_UECONX_RXSTPE_MASK)) |
#define Is_usb_write_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_RWALL_MASK)) |
#define Usb_ack_control_in_ready_send | ( | ) | (AVR32_USBB_uestaxclr(EP_CONTROL) = AVR32_USBB_UESTAXCLR_TXINIC_MASK) |
acks IN ready on control endpoint and sends current bank
Definition at line 736 of file usb_drv.h.
Referenced by usb_clear_feature(), usb_get_configuration(), usb_get_descriptor(), usb_get_interface(), usb_get_status(), usb_set_address(), usb_set_configuration(), usb_set_feature(), and usb_set_interface().
#define Usb_ack_control_out_received_free | ( | ) | (AVR32_USBB_uestaxclr(EP_CONTROL) = AVR32_USBB_UESTAXCLR_RXOUTIC_MASK) |
acks OUT received on control endpoint and frees current bank
Definition at line 723 of file usb_drv.h.
Referenced by usb_get_configuration(), usb_get_descriptor(), usb_get_interface(), and usb_get_status().
#define Usb_ack_crc_error | ( | ep | ) | (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_STALLEDIC_MASK) |
#define Usb_ack_fifocon | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_FIFOCONC_MASK) |
#define Usb_ack_in_ready | ( | ep | ) | (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_TXINIC_MASK) |
#define Usb_ack_in_ready_send | ( | ep | ) | (Usb_ack_in_ready(ep), Usb_send_in(ep)) |
acks IN ready and sends current bank
Definition at line 734 of file usb_drv.h.
Referenced by device_template_task().
#define Usb_ack_nak_in | ( | ep | ) | (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_NAKINIC_MASK) |
#define Usb_ack_nak_out | ( | ep | ) | (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_NAKOUTIC_MASK) |
#define Usb_ack_out_received | ( | ep | ) | (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_RXOUTIC_MASK) |
#define Usb_ack_out_received_free | ( | ep | ) | (Usb_ack_out_received(ep), Usb_free_out(ep)) |
acks OUT received and frees current bank
Definition at line 721 of file usb_drv.h.
Referenced by device_template_task().
#define Usb_ack_overflow_interrupt | ( | ep | ) | (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_OVERFIC_MASK) |
#define Usb_ack_setup_received_free | ( | ) | (AVR32_USBB_uestaxclr(EP_CONTROL) = AVR32_USBB_UESTAXCLR_RXSTPIC_MASK) |
acks SETUP received
Definition at line 711 of file usb_drv.h.
Referenced by usb_clear_feature(), usb_get_configuration(), usb_get_descriptor(), usb_get_interface(), usb_get_status(), usb_process_request(), usb_set_address(), usb_set_configuration(), usb_set_feature(), and usb_set_interface().
#define Usb_ack_short_packet | ( | ep | ) | (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_SHORTPACKETIC_MASK) |
#define Usb_ack_stall | ( | ep | ) | (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_STALLEDIC_MASK) |
#define Usb_ack_underflow_interrupt | ( | ep | ) | (AVR32_USBB_uestaxclr(ep) = AVR32_USBB_UESTAXCLR_RXSTPIC_MASK) |
#define Usb_allocate_memory | ( | ep | ) | (Set_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_ALLOC_MASK)) |
#define Usb_byte_count | ( | ep | ) | (Rd_bitfield(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_BYCT_MASK)) |
returns the byte count
Definition at line 661 of file usb_drv.h.
Referenced by device_template_task(), usb_read_ep_rxpacket(), usb_set_ep_txpacket(), and usb_write_ep_txpacket().
#define Usb_configure_endpoint | ( | ep, | |||
type, | |||||
dir, | |||||
size, | |||||
bank | ) |
Value:
(\ Usb_enable_endpoint(ep),\ Wr_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPTYPE_MASK |\ AVR32_USBB_UECFGX_EPDIR_MASK |\ AVR32_USBB_UECFGX_EPSIZE_MASK |\ AVR32_USBB_UECFGX_EPBK_MASK, \ (((U32)(type) << AVR32_USBB_UECFGX_EPTYPE_OFFSET) & AVR32_USBB_UECFGX_EPTYPE_MASK) |\ (((U32)(dir ) << AVR32_USBB_UECFGX_EPDIR_OFFSET ) & AVR32_USBB_UECFGX_EPDIR_MASK ) |\ ( (U32)Usb_format_endpoint_size(size) << AVR32_USBB_UECFGX_EPSIZE_OFFSET ) |\ (((U32)(bank) << AVR32_USBB_UECFGX_EPBK_OFFSET ) & AVR32_USBB_UECFGX_EPBK_MASK )),\ Usb_allocate_memory(ep),\ \ Is_usb_endpoint_configured(ep)\ )
Definition at line 625 of file usb_drv.h.
Referenced by usb_init_device(), usb_set_feature(), and usb_user_endpoint_init().
#define Usb_configure_endpoint_bank | ( | ep, | |||
bank | ) | (Wr_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPBK_MASK, bank)) |
#define Usb_configure_endpoint_direction | ( | ep, | |||
dir | ) | (Wr_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPDIR_MASK, dir)) |
#define Usb_configure_endpoint_size | ( | ep, | |||
size | ) | (Wr_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPSIZE_MASK, Usb_format_endpoint_size(size))) |
#define Usb_configure_endpoint_type | ( | ep, | |||
type | ) | (Wr_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPTYPE_MASK, type)) |
#define Usb_control_direction | ( | ) | (Rd_bitfield(AVR32_USBB_uestax(EP_CONTROL), AVR32_USBB_UESTAX_CTRLDIR_MASK)) |
#define Usb_current_bank | ( | ep | ) | (Rd_bitfield(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_CURRBK_MASK)) |
#define Usb_data_toggle | ( | ep | ) | (Rd_bitfield(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_DTSEQ_MASK)) |
#define Usb_disable_bank_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_NBUSYBKEC_MASK) |
#define Usb_disable_control_in_ready_interrupt | ( | ) | (AVR32_USBB_ueconxclr(EP_CONTROL) = AVR32_USBB_UECONXCLR_TXINEC_MASK) |
#define Usb_disable_control_out_received_interrupt | ( | ) | (AVR32_USBB_ueconxclr(EP_CONTROL) = AVR32_USBB_UECONXCLR_RXOUTEC_MASK) |
#define Usb_disable_crc_error_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_STALLEDEC_MASK) |
#define Usb_disable_endpoint | ( | ep | ) | (Clr_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
disables the selected endpoint
Definition at line 570 of file usb_drv.h.
Referenced by usb_set_feature().
#define Usb_disable_endpoint_bank_autoswitch | ( | ep | ) | (Clr_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_AUTOSW_MASK)) |
#define Usb_disable_endpoint_interrupt | ( | ep | ) | (AVR32_USBB_udinteclr = AVR32_USBB_UDINTECLR_EP0INTEC_MASK << (ep)) |
#define Usb_disable_in_ready_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_TXINEC_MASK) |
#define Usb_disable_nak_in_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_NAKINEC_MASK) |
#define Usb_disable_nak_out_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_NAKOUTEC_MASK) |
#define Usb_disable_out_received_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_RXOUTEC_MASK) |
#define Usb_disable_overflow_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_OVERFEC_MASK) |
#define Usb_disable_setup_received_interrupt | ( | ) | (AVR32_USBB_ueconxclr(EP_CONTROL) = AVR32_USBB_UECONXCLR_RXSTPEC_MASK) |
#define Usb_disable_short_packet_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_SHORTPACKETEC_MASK) |
#define Usb_disable_stall_handshake | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_STALLRQC_MASK) |
disables the STALL handshake
Definition at line 572 of file usb_drv.h.
Referenced by usb_clear_feature(), and usb_set_interface().
#define Usb_disable_stall_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_STALLEDEC_MASK) |
#define Usb_disable_underflow_interrupt | ( | ep | ) | (AVR32_USBB_ueconxclr(ep) = AVR32_USBB_UECONXCLR_RXSTPEC_MASK) |
#define Usb_enable_bank_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_NBUSYBKES_MASK) |
#define Usb_enable_control_in_ready_interrupt | ( | ) | (AVR32_USBB_ueconxset(EP_CONTROL) = AVR32_USBB_UECONXSET_TXINES_MASK) |
#define Usb_enable_control_out_received_interrupt | ( | ) | (AVR32_USBB_ueconxset(EP_CONTROL) = AVR32_USBB_UECONXSET_RXOUTES_MASK) |
#define Usb_enable_crc_error_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_STALLEDES_MASK) |
#define Usb_enable_endpoint | ( | ep | ) | (Set_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
#define Usb_enable_endpoint_bank_autoswitch | ( | ep | ) | (Set_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_AUTOSW_MASK)) |
#define Usb_enable_endpoint_interrupt | ( | ep | ) | (AVR32_USBB_udinteset = AVR32_USBB_UDINTESET_EP0INTES_MASK << (ep)) |
#define Usb_enable_in_ready_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_TXINES_MASK) |
#define Usb_enable_nak_in_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_NAKINES_MASK) |
#define Usb_enable_nak_out_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_NAKOUTES_MASK) |
#define Usb_enable_out_received_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_RXOUTES_MASK) |
#define Usb_enable_overflow_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_OVERFES_MASK) |
#define Usb_enable_setup_received_interrupt | ( | ) | (AVR32_USBB_ueconxset(EP_CONTROL) = AVR32_USBB_UECONXSET_RXSTPES_MASK) |
#define Usb_enable_short_packet_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_SHORTPACKETES_MASK) |
#define Usb_enable_stall_handshake | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_STALLRQS_MASK) |
enables the STALL handshake
Definition at line 562 of file usb_drv.h.
Referenced by usb_clear_feature(), usb_get_descriptor(), usb_get_status(), usb_process_request(), usb_set_configuration(), usb_set_feature(), and usb_set_interface().
#define Usb_enable_stall_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_STALLEDES_MASK) |
#define Usb_enable_underflow_interrupt | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_RXSTPES_MASK) |
#define Usb_force_bank_interrupt | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_NBUSYBKS_MASK) |
#define Usb_format_endpoint_size | ( | size | ) | (32 - clz(((U32)min(max(size, 8), 1024) << 1) - 1) - 1 - 3) |
#define Usb_free_out | ( | ep | ) | (Usb_ack_fifocon(ep)) |
#define Usb_get_endpoint_bank | ( | ep | ) | (Rd_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPBK_MASK)) |
#define Usb_get_endpoint_direction | ( | ep | ) | (Rd_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPDIR_MASK)) |
#define Usb_get_endpoint_fifo_access | ( | ep, | |||
scale | ) | (AVR32_USBB_FIFOX_DATA(ep, scale)) |
Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint.
ep | Endpoint of which to access FIFO data register | |
scale | Data scale in bits: 64, 32, 16 or 8 |
It is up to the user of this macro to make sure that used HSB addresses are identical to the DPRAM internal pointer modulo 32 bits.
#define Usb_get_endpoint_size | ( | ep | ) | (8 << Rd_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPSIZE_MASK)) |
gets the configured selected endpoint size
Definition at line 613 of file usb_drv.h.
Referenced by usb_set_ep_txpacket(), and usb_write_ep_txpacket().
#define Usb_get_endpoint_type | ( | ep | ) | (Rd_bitfield(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_EPTYPE_MASK)) |
#define Usb_get_interrupt_endpoint_number | ( | ) |
Value:
(ctz(((AVR32_USBB_udint >> AVR32_USBB_UDINT_EP0INT_OFFSET) &\ (AVR32_USBB_udinte >> AVR32_USBB_UDINTE_EP0INTE_OFFSET)) |\ (1 << MAX_PEP_NB)))
#define Usb_halt_endpoint | ( | ep | ) | (Usb_enable_stall_handshake(ep)) |
#define Usb_kill_last_in_bank | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_KILLBKS_MASK) |
#define Usb_nb_busy_bank | ( | ep | ) | (Rd_bitfield(AVR32_USBB_uestax(ep), AVR32_USBB_UESTAX_NBUSYBK_MASK)) |
#define Usb_raise_control_in_ready | ( | ) | (AVR32_USBB_uestaxset(EP_CONTROL) = AVR32_USBB_UESTAXSET_TXINIS_MASK) |
#define Usb_raise_control_out_received | ( | ) | (AVR32_USBB_uestaxset(EP_CONTROL) = AVR32_USBB_UESTAXSET_RXOUTIS_MASK) |
#define Usb_raise_crc_error | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_STALLEDIS_MASK) |
#define Usb_raise_in_ready | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_TXINIS_MASK) |
#define Usb_raise_nak_in | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_NAKINIS_MASK) |
#define Usb_raise_nak_out | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_NAKOUTIS_MASK) |
#define Usb_raise_out_received | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_RXOUTIS_MASK) |
#define Usb_raise_overflow_interrupt | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_OVERFIS_MASK) |
#define Usb_raise_setup_received | ( | ) | (AVR32_USBB_uestaxset(EP_CONTROL) = AVR32_USBB_UESTAXSET_RXSTPIS_MASK) |
#define Usb_raise_short_packet | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_SHORTPACKETIS_MASK) |
#define Usb_raise_stall | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_STALLEDIS_MASK) |
#define Usb_raise_underflow_interrupt | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_RXSTPIS_MASK) |
#define Usb_read_endpoint_data | ( | ep, | |||
scale | ) |
Value:
(*pep_fifo[(ep)].TPASTE3(u, scale, ptr)\ TPASTE3(Pep_fifo_access_, scale, _post_inc)())
ep | Endpoint of which to access FIFO data register | |
scale | Data scale in bits: 64, 32, 16 or 8 |
Do not mix calls to this macro with calls to indexed macros below.
Definition at line 873 of file usb_drv.h.
Referenced by usb_clear_feature(), usb_get_descriptor(), usb_get_interface(), usb_get_status(), usb_process_request(), usb_set_address(), usb_set_configuration(), usb_set_feature(), usb_set_interface(), and usb_user_read_request().
#define Usb_read_endpoint_indexed_data | ( | ep, | |||
scale, | |||||
index | ) | (AVR32_USBB_FIFOX_DATA(ep, scale)[(index)]) |
Read 64-, 32-, 16- or 8-bit indexed data from FIFO data register of selected endpoint.
ep | Endpoint of which to access FIFO data register | |
scale | Data scale in bits: 64, 32, 16 or 8 | |
index | Index of scaled data array to access |
It is up to the user of this macro to make sure that used HSB addresses are identical to the DPRAM internal pointer modulo 32 bits.
Do not mix calls to this macro with calls to non-indexed macros above.
#define Usb_reset_data_toggle | ( | ep | ) | (AVR32_USBB_ueconxset(ep) = AVR32_USBB_UECONXSET_RSTDTS_MASK) |
resets the data toggle sequence
Definition at line 568 of file usb_drv.h.
Referenced by usb_clear_feature(), and usb_set_interface().
#define Usb_reset_endpoint | ( | ep | ) |
Value:
(Set_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep)),\ Clr_bits(AVR32_USBB_uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep)))
Definition at line 554 of file usb_drv.h.
Referenced by usb_clear_feature(), usb_device_task(), usb_set_feature(), and usb_set_interface().
#define Usb_reset_endpoint_fifo_access | ( | ep | ) | (pep_fifo[(ep)].u64ptr = Usb_get_endpoint_fifo_access(ep, 64)) |
Reset known position inside FIFO data register of selected endpoint.
ep | Endpoint of which to reset known position |
Definition at line 858 of file usb_drv.h.
Referenced by device_template_task(), usb_get_configuration(), usb_get_descriptor(), usb_get_interface(), usb_get_status(), and usb_process_request().
#define Usb_send_in | ( | ep | ) | (Usb_ack_fifocon(ep)) |
sends current bank for IN endpoint
Definition at line 732 of file usb_drv.h.
Referenced by usb_set_feature().
#define Usb_unallocate_memory | ( | ep | ) | (Clr_bits(AVR32_USBB_uecfgx(ep), AVR32_USBB_UECFGX_ALLOC_MASK)) |
un-allocates the configuration x in DPRAM memory
Definition at line 621 of file usb_drv.h.
Referenced by usb_set_feature().
#define Usb_unforce_bank_interrupt | ( | ep | ) | (AVR32_USBB_uestaxset(ep) = AVR32_USBB_UESTAXSET_NBUSYBKS_MASK) |
#define Usb_write_endpoint_data | ( | ep, | |||
scale, | |||||
data | ) |
Value:
(*pep_fifo[(ep)].TPASTE3(u, scale, ptr)\ TPASTE3(Pep_fifo_access_, scale, _post_inc)() = (data))
ep | Endpoint of which to access FIFO data register | |
scale | Data scale in bits: 64, 32, 16 or 8 | |
data | 64-, 32-, 16- or 8-bit data to write |
Do not mix calls to this macro with calls to indexed macros below.
Definition at line 890 of file usb_drv.h.
Referenced by usb_get_configuration(), usb_get_interface(), and usb_get_status().
#define Usb_write_endpoint_indexed_data | ( | ep, | |||
scale, | |||||
index, | |||||
data | ) | (AVR32_USBB_FIFOX_DATA(ep, scale)[(index)] = (data)) |
Write 64-, 32-, 16- or 8-bit indexed data to FIFO data register of selected endpoint.
ep | Endpoint of which to access FIFO data register | |
scale | Data scale in bits: 64, 32, 16 or 8 | |
index | Index of scaled data array to access | |
data | 64-, 32-, 16- or 8-bit data to write |
It is up to the user of this macro to make sure that used HSB addresses are identical to the DPRAM internal pointer modulo 32 bits.
Do not mix calls to this macro with calls to non-indexed macros above.