#include <avr32/io.h>
#include "board.h"
#include "clocks.h"
#include "pm.h"
#include "flashc.h"
#include "gpio.h"
Go to the source code of this file.
Functions | |
void | init_sys_clocks (void) |
Initializes the MCU system clocks. |
void init_sys_clocks | ( | void | ) |
Initializes the MCU system clocks.
Definition at line 41 of file clocks.c.
Referenced by startup_init().
00042 { 00043 /* switch to OSC0 to speed up the booting */ 00044 pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP); 00045 00046 #ifndef USE_PLL 00047 return; 00048 #endif 00049 00050 /* For audio, ee have to use OSC1 on to generate the correct clockrate 00051 * for the SSC 00052 */ 00053 #if OSC == 1 00054 /* start oscillator1 */ 00055 pm_enable_osc1_crystal(&AVR32_PM, FOSC1); 00056 pm_enable_clk1(&AVR32_PM, OSC1_STARTUP); 00057 #endif 00058 00059 /* configure pll multipliers */ 00060 pm_pll_setup(&AVR32_PM, 00061 0, /* pll */ 00062 PLL_MUL, /* mul */ 00063 1, /* div */ 00064 OSC, /* osc */ 00065 16); /* lockcount */ 00066 00067 /* set PLL operating range and divider (fpll = fvco/2) 00068 * this gives PLL output = 66 MHz (62.0928 MHz for EVK1105/OSC1) 00069 */ 00070 pm_pll_set_option(&AVR32_PM, 00071 0, /* pll */ 00072 1, /* pll_freq */ 00073 1, /* pll_div2 */ 00074 0); /* pll_wbwdisable. */ 00075 00076 00077 /* start PLL0 and wait for the lock */ 00078 pm_pll_enable(&AVR32_PM, 0); 00079 pm_wait_for_pll0_locked(&AVR32_PM); 00080 00081 /* Set all peripheral clocks torun at master clock rate */ 00082 pm_cksel(&AVR32_PM, 00083 0, /* pbadiv */ 00084 0, /* pbasel */ 00085 0, /* pbbdiv */ 00086 0, /* pbbsel */ 00087 0, /* hsbdiv */ 00088 0); /* hsbsel */ 00089 00090 /* Set one waitstate for the flash */ 00091 flashc_set_wait_state(1); 00092 00093 /* Switch to PLL0 as the master clock */ 00094 pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0); 00095 00096 #if OSC == 1 00097 pm_configure_usb_clock(); 00098 #endif 00099 }