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00049 #ifndef AVR32_MACB_H
00050 #define AVR32_MACB_H
00051
00052 #include <avr32/io.h>
00053
00054 #include "compiler.h"
00055
00056 #ifdef FREERTOS_USED
00057 #include "arch/sys_arch.h"
00058 #endif
00059
00060 #include "conf_eth.h"
00061
00062
00065
00066 #define AVR32_MACB_RX_USED_OFFSET 0
00067 #define AVR32_MACB_RX_USED_SIZE 1
00068 #define AVR32_MACB_RX_WRAP_OFFSET 1
00069 #define AVR32_MACB_RX_WRAP_SIZE 1
00070 #define AVR32_MACB_RX_LEN_OFFSET 0
00071 #define AVR32_MACB_RX_LEN_SIZE 12
00072 #define AVR32_MACB_RX_OFFSET_OFFSET 12
00073 #define AVR32_MACB_RX_OFFSET_SIZE 2
00074 #define AVR32_MACB_RX_SOF_OFFSET 14
00075 #define AVR32_MACB_RX_SOF_SIZE 1
00076 #define AVR32_MACB_RX_EOF_OFFSET 15
00077 #define AVR32_MACB_RX_EOF_SIZE 1
00078 #define AVR32_MACB_RX_CFI_OFFSET 16
00079 #define AVR32_MACB_RX_CFI_SIZE 1
00081
00082
00084
00085 #define AVR32_MACB_TX_LEN_OFFSET 0
00086 #define AVR32_MACB_TX_LEN_SIZE 11
00087 #define AVR32_MACB_TX_EOF_OFFSET 15
00088 #define AVR32_MACB_TX_EOF_SIZE 1
00089 #define AVR32_MACB_TX_NOCRC_OFFSET 16
00090 #define AVR32_MACB_TX_NOCRC_SIZE 1
00091 #define AVR32_MACB_TX_EMF_OFFSET 27
00092 #define AVR32_MACB_TX_EMF_SIZE 1
00093 #define AVR32_MACB_TX_UNR_OFFSET 28
00094 #define AVR32_MACB_TX_UNR_SIZE 1
00095 #define AVR32_MACB_TX_MAXRETRY_OFFSET 29
00096 #define AVR32_MACB_TX_MAXRETRY_SIZE 1
00097 #define AVR32_MACB_TX_WRAP_OFFSET 30
00098 #define AVR32_MACB_TX_WRAP_SIZE 1
00099 #define AVR32_MACB_TX_USED_OFFSET 31
00100 #define AVR32_MACB_TX_USED_SIZE 1
00102
00103
00105
00106 #define PHY_BMCR 0x00
00107 #define PHY_BMSR 0x01
00108 #define PHY_PHYSID1 0x02
00109 #define PHY_PHYSID2 0x03
00110 #define PHY_ADVERTISE 0x04
00111 #define PHY_LPA 0x05
00112
00113
00114 #if BOARD == EVK1100 || BOARD == EVK1105
00115
00117
00118 #define PHY_RBR 0x17
00119 #define PHY_MICR 0x11
00120 #define PHY_MISR 0x12
00121 #define PHY_PHYCR 0x19
00122
00123 #endif
00124
00127
00128 #define BMCR_RESV 0x007f
00129 #define BMCR_CTST 0x0080
00130 #define BMCR_FULLDPLX 0x0100
00131 #define BMCR_ANRESTART 0x0200
00132 #define BMCR_ISOLATE 0x0400
00133 #define BMCR_PDOWN 0x0800
00134 #define BMCR_ANENABLE 0x1000
00135 #define BMCR_SPEED100 0x2000
00136 #define BMCR_LOOPBACK 0x4000
00137 #define BMCR_RESET 0x8000
00138
00139
00140
00142
00143 #define BMSR_ERCAP 0x0001
00144 #define BMSR_JCD 0x0002
00145 #define BMSR_LSTATUS 0x0004
00146 #define BMSR_ANEGCAPABLE 0x0008
00147 #define BMSR_RFAULT 0x0010
00148 #define BMSR_ANEGCOMPLETE 0x0020
00149 #define BMSR_RESV 0x00c0
00150 #define BMSR_ESTATEN 0x0100
00151 #define BMSR_100FULL2 0x0200
00152 #define BMSR_100HALF2 0x0400
00153 #define BMSR_10HALF 0x0800
00154 #define BMSR_10FULL 0x1000
00155 #define BMSR_100HALF 0x2000
00156 #define BMSR_100FULL 0x4000
00157 #define BMSR_100BASE4 0x8000
00158
00159
00160
00162
00163 #define ADVERTISE_SLCT 0x001f
00164 #define ADVERTISE_CSMA 0x0001
00165 #define ADVERTISE_10HALF 0x0020
00166 #define ADVERTISE_1000XFULL 0x0020
00167 #define ADVERTISE_10FULL 0x0040
00168 #define ADVERTISE_1000XHALF 0x0040
00169 #define ADVERTISE_100HALF 0x0080
00170 #define ADVERTISE_1000XPAUSE 0x0080
00171 #define ADVERTISE_100FULL 0x0100
00172 #define ADVERTISE_1000XPSE_ASYM 0x0100
00173 #define ADVERTISE_100BASE4 0x0200
00174 #define ADVERTISE_PAUSE_CAP 0x0400
00175 #define ADVERTISE_PAUSE_ASYM 0x0800
00176 #define ADVERTISE_RESV 0x1000
00177 #define ADVERTISE_RFAULT 0x2000
00178 #define ADVERTISE_LPACK 0x4000
00179 #define ADVERTISE_NPAGE 0x8000
00180
00181
00182 #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | ADVERTISE_CSMA)
00183 #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
00184 ADVERTISE_100HALF | ADVERTISE_100FULL)
00185
00188
00189 #define LPA_SLCT 0x001f
00190 #define LPA_10HALF 0x0020
00191 #define LPA_1000XFULL 0x0020
00192 #define LPA_10FULL 0x0040
00193 #define LPA_1000XHALF 0x0040
00194 #define LPA_100HALF 0x0080
00195 #define LPA_1000XPAUSE 0x0080
00196 #define LPA_100FULL 0x0100
00197 #define LPA_1000XPAUSE_ASYM 0x0100
00198 #define LPA_100BASE4 0x0200
00199 #define LPA_PAUSE_CAP 0x0400
00200 #define LPA_PAUSE_ASYM 0x0800
00201 #define LPA_RESV 0x1000
00202 #define LPA_RFAULT 0x2000
00203 #define LPA_LPACK 0x4000
00204 #define LPA_NPAGE 0x8000
00205
00206 #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
00207 #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
00209
00210 #if BOARD == EVK1100 || BOARD == EVK1105
00211
00212 #define RBR_RMII 0x0020
00213
00215
00216 #define MICR_INTEN 0x0002
00217 #define MICR_INTOE 0x0001
00218
00219
00220
00222
00223 #define MISR_ED_INT_EN 0x0040
00224 #define MISR_LINK_INT_EN 0x0020
00225 #define MISR_SPD_INT_EN 0x0010
00226 #define MISR_DP_INT_EN 0x0008
00227 #define MISR_ANC_INT_EN 0x0004
00228 #define MISR_FHF_INT_EN 0x0002
00229 #define MISR_RHF_INT_EN 0x0001
00230 #define MISR_ED_INT 0x4000
00231 #define MISR_LINK_INT 0x2000
00232 #define MISR_SPD_INT 0x1000
00233 #define MISR_DP_INT 0x0800
00234 #define MISR_ANC_INT 0x0400
00235 #define MISR_FHF_INT 0x0200
00236 #define MISR_RHF_INT 0x0100
00237
00238
00239
00241
00242 #define PHYCR_MDIX_EN 0x8000
00243 #define PHYCR_MDIX_FORCE 0x4000
00244
00245 #endif
00246
00247
00250
00251 typedef struct
00252 {
00253 unsigned char *data;
00254 unsigned int len;
00255 } macb_packet_t;
00257
00260
00261 typedef struct _AVR32_RxTdDescriptor {
00262 unsigned int addr;
00263 union
00264 {
00265 unsigned int status;
00266 struct {
00267 unsigned int BroadCast:1;
00268 unsigned int MultiCast:1;
00269 unsigned int UniCast:1;
00270 unsigned int ExternalAdd:1;
00271 unsigned int Res1:1;
00272 unsigned int Sa1Match:1;
00273 unsigned int Sa2Match:1;
00274 unsigned int Sa3Match:1;
00275 unsigned int Sa4Match:1;
00276 unsigned int TypeID:1;
00277 unsigned int VlanTag:1;
00278 unsigned int PriorityTag:1;
00279 unsigned int VlanPriority:3;
00280 unsigned int Cfi:1;
00281 unsigned int EndOfFrame:1;
00282 unsigned int StartOfFrame:1;
00283 unsigned int Rxbuf_off:2;
00284 unsigned int Res0:1;
00285 unsigned int Length:11;
00286 }S_Status;
00287 }U_Status;
00288 }AVR32_RxTdDescriptor, *AVR32P_RxTdDescriptor;
00290
00293
00294 typedef struct _AVR32_TxTdDescriptor {
00295 unsigned int addr;
00296 union
00297 {
00298 unsigned int status;
00299 struct {
00300 unsigned int BuffUsed:1;
00301 unsigned int Wrap:1;
00302 unsigned int TransmitError:1;
00303 unsigned int TransmitUnderrun:1;
00304 unsigned int BufExhausted:1;
00305 unsigned int Res1:10;
00306 unsigned int NoCrc:1;
00307 unsigned int LastBuff:1;
00308 unsigned int Res0:4;
00309 unsigned int Length:11;
00310 }S_Status;
00311 }U_Status;
00312 }AVR32_TxTdDescriptor, *AVR32P_TxTdDescriptor;
00314
00315
00317 #define AVR32_OWNERSHIP_BIT 0x00000001
00318
00321
00322 #define AVR32_BROADCAST_ADDR ((unsigned int) (1 << 31)) //* Broadcat address detected
00323 #define AVR32_MULTICAST_HASH ((unsigned int) (1 << 30)) //* MultiCast hash match
00324 #define AVR32_UNICAST_HASH ((unsigned int) (1 << 29)) //* UniCast hash match
00325 #define AVR32_EXTERNAL_ADDR ((unsigned int) (1 << 28)) //* External Address match
00326 #define AVR32_SA1_ADDR ((unsigned int) (1 << 26)) //* Specific address 1 match
00327 #define AVR32_SA2_ADDR ((unsigned int) (1 << 25)) //* Specific address 2 match
00328 #define AVR32_SA3_ADDR ((unsigned int) (1 << 24)) //* Specific address 3 match
00329 #define AVR32_SA4_ADDR ((unsigned int) (1 << 23)) //* Specific address 4 match
00330 #define AVR32_TYPE_ID ((unsigned int) (1 << 22)) //* Type ID match
00331 #define AVR32_VLAN_TAG ((unsigned int) (1 << 21)) //* VLAN tag detected
00332 #define AVR32_PRIORITY_TAG ((unsigned int) (1 << 20)) //* PRIORITY tag detected
00333 #define AVR32_VLAN_PRIORITY ((unsigned int) (7 << 17)) //* PRIORITY Mask
00334 #define AVR32_CFI_IND ((unsigned int) (1 << 16)) //* CFI indicator
00335 #define AVR32_EOF ((unsigned int) (1 << 15)) //* EOF
00336 #define AVR32_SOF ((unsigned int) (1 << 14)) //* SOF
00337 #define AVR32_RBF_OFFSET ((unsigned int) (3 << 12)) //* Receive Buffer Offset Mask
00338 #define AVR32_LENGTH_FRAME ((unsigned int) 0x0FFF) //* Length of frame
00340
00341
00343 #define AVR32_TRANSMIT_OK ((unsigned int) (1 << 31)) //*
00344 #define AVR32_TRANSMIT_WRAP ((unsigned int) (1 << 30)) //* Wrap bit: mark the last descriptor
00345 #define AVR32_TRANSMIT_ERR ((unsigned int) (1 << 29)) //* RLE:transmit error
00346 #define AVR32_TRANSMIT_UND ((unsigned int) (1 << 28)) //* Transmit Underrun
00347 #define AVR32_BUF_EX ((unsigned int) (1 << 27)) //* Buffers exhausted in mid frame
00348 #define AVR32_TRANSMIT_NO_CRC ((unsigned int) (1 << 16)) //* No CRC will be appended to the current frame
00349 #define AVR32_LAST_BUFFER ((unsigned int) (1 << 15)) //*
00351
00352
00360 extern Bool xMACBInit(volatile avr32_macb_t *macb);
00361
00375 extern long lMACBSend(volatile avr32_macb_t *macb, const void *pvFrom, unsigned long ulLength, long lEndOfFrame);
00376
00388 extern void vMACBRead(void *pvTo, unsigned long ulSectionLength, unsigned long ulTotalFrameLength);
00389
00395 extern void vMACBFlushCurrentPacket(unsigned long ulTotalFrameLength);
00396
00402 extern void vClearMACBTxBuffer(void);
00403
00412 extern void vMACBWaitForInput(unsigned long ulTimeOut);
00413
00419 extern unsigned long ulMACBInputLength(void);
00420
00426 extern void vMACBSetMACAddress(const unsigned char *MACAddress);
00427
00433 extern void vDisableMACBOperations(volatile avr32_macb_t *macb);
00434
00435
00436 #endif