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00048 #ifndef _DMACA_H_
00049 #define _DMACA_H_
00050
00051 #include <avr32/io.h>
00052 #include "compiler.h"
00053
00055 #define BYTE AVR32_DMACA_8_BITS
00056 #define HALF_WORD AVR32_DMACA_16_BITS
00057 #define WORD AVR32_DMACA_32_BITS
00058
00060 #define CHUNK_1 AVR32_DMACA_1_DATA_ITEM
00061 #define CHUNK_4 AVR32_DMACA_4_DATA_ITEMS
00062 #define CHUNK_8 AVR32_DMACA_8_DATA_ITEMS
00063 #define CHUNK_16 AVR32_DMACA_16_DATA_ITEMS
00064 #define CHUNK_32 AVR32_DMACA_32_DATA_ITEMS
00065
00066
00067 #define INC_MODE AVR32_DMACA_INCREMENT
00068 #define DEC_MODE AVR32_DMACA_DECREMENT
00069 #define FIX_MODE AVR32_DMACA_NO_CHANGE
00070
00072 #define DMACA_M2M AVR32_DMACA_MEM_TO_MEM_BY_DMACA
00073 #define DMACA_M2P AVR32_DMACA_MEM_TO_PRPH_BY_DMACA
00074 #define DMACA_P2M AVR32_DMACA_PRPH_TO_MEM_BY_DMACA
00075 #define DMACA_P2P AVR32_DMACA_PRPH_TO_PRPH_BY_DMACA
00076
00078 #define DISABLED 0
00079 #define ENABLED 1
00080
00082 #define SOFTWARE AVR32_DMACA_SOFTWARE
00083 #define HARDWARE AVR32_DMACA_HARDWARE
00084
00086 #define DMACA1 0
00087 #define DMACA2 1
00088
00090 #define HIF0 0
00091 #define HIF1 1
00092 #define HIF2 2
00093 #define HIF3 3
00094 #define HIF4 4
00095 #define HIF5 5
00096
00097 #define DW_DMAC_CHAN_SAR 0x000
00098 #define DW_DMAC_CHAN_DAR 0x008
00099 #define DW_DMAC_CHAN_LLP 0x010
00100 #define DW_DMAC_CHAN_CTL 0x018
00101 #define DW_DMAC_CHAN_CFG 0x040
00102
00103 typedef struct {
00104 int channel_no;
00105 unsigned long src_address;
00106 unsigned long dst_address;
00107 char dst_width;
00108 char src_width;
00109 char dst_add_mode;
00110 char src_add_mode;
00111 char dst_chunk_size;
00112 char src_chunk_size;
00113 char flow_controller;
00114 char dst_ahb_if;
00115 char src_ahb_if;
00116 unsigned int transfer_size;
00117 char dst_handshake;
00118 char src_handshake;
00119 char src_handshake_if;
00120 char dst_handshake_if;
00121 } dmaca_channel_options_t;
00122
00123
00124 typedef struct {
00125 unsigned char Tfr;
00126 unsigned char Block;
00127 unsigned char SrcTran;
00128 unsigned char DstTran;
00129 unsigned char Err;
00130 }dmaca_interrupt_t;
00131
00132 #endif // _DMACA_H_