adcifa.c File Reference


Detailed Description

ADCIFA driver for AVR UC3.

This file defines a useful set of functions for ADC on AVR UC3 devices.

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file adcifa.c.

#include <avr32/io.h>
#include "compiler.h"
#include "adcifa.h"

Go to the source code of this file.

Functions

Bool adcifa_check_eoc (volatile avr32_adcifa_t *adcifa, U8 sequencer)
Bool adcifa_check_eos (volatile avr32_adcifa_t *adcifa, U8 sequencer)
U8 adcifa_configure (volatile avr32_adcifa_t *adcifa, adcifa_opt_t *p_adcifa_opt, unsigned long pb_hz)
U8 adcifa_configure_sequencer (volatile avr32_adcifa_t *adcifa, U8 sequencer, adcifa_sequencer_opt_t *p_adcifa_sequencer_opt, adcifa_sequencer_conversion_opt_t *p_adcifa_sequencer_conversion_opt)
 Configure ADCIFA specific sequencer.
  • Sequence, Gain and Mux.

void adcifa_get_calibration_data (volatile avr32_adcifa_t *adcifa, adcifa_opt_t *p_adcifa_opt, U8 sequencer)
 Get ADCIFA Calibration Data. Mandatory to call if factory calibration data are wanted to be used. If not called, Calibration Data should be set by the application.
U8 adcifa_get_values_from_sequencer (volatile avr32_adcifa_t *adcifa, U8 sequencer, adcifa_sequencer_opt_t *p_adcifa_sequencer_opt, S16 *adcifa_values)
 Get channel values for a specific sequence.
void adcifa_start_sequencer (volatile avr32_adcifa_t *adcifa, U8 sequencer)
 Start analog to digital conversion for a specific sequencer.


Function Documentation

Bool adcifa_check_eoc ( volatile avr32_adcifa_t *  adcifa,
U8  sequencer 
)

Definition at line 209 of file adcifa.c.

References ADCIFA_is_eoc_sequencer_0, and ADCIFA_is_eoc_sequencer_1.

00210 {
00211   // Sanity Check
00212   Assert( adcifa!=NULL );
00213 
00214   // get SR register : EOC bit for channel
00215   switch(sequencer)
00216   {
00217     case 0:
00218       return ((ADCIFA_is_eoc_sequencer_0()) ? HIGH : LOW);
00219     case 1:
00220       return ((ADCIFA_is_eoc_sequencer_1()) ? HIGH : LOW);
00221     default:
00222       break;
00223   }
00224   return LOW;
00225 }

Bool adcifa_check_eos ( volatile avr32_adcifa_t *  adcifa,
U8  sequencer 
)

Definition at line 227 of file adcifa.c.

References ADCIFA_is_eos_sequencer_0, and ADCIFA_is_eos_sequencer_1.

Referenced by adcifa_get_values_from_sequencer().

00228 {
00229   // Sanity Check
00230   Assert( adcifa!=NULL );
00231 
00232   // get SR register : EOS bit for channel
00233   switch(sequencer)
00234   {
00235     case 0:
00236       return ((ADCIFA_is_eos_sequencer_0()) ? HIGH : LOW);
00237     case 1:
00238       return ((ADCIFA_is_eos_sequencer_1()) ? HIGH : LOW);
00239     default:
00240       break;
00241   }
00242   return LOW;
00243 }

U8 adcifa_configure ( volatile avr32_adcifa_t *  adcifa,
adcifa_opt_t p_adcifa_opt,
unsigned long  pb_hz 
)

Definition at line 76 of file adcifa.c.

References ADCIFA_CONFIGURATION_ACCEPTED, ADCIFA_enable, ADCIFA_is_startup_time, ADCIFA_set_gain_calibration, ADCIFA_set_offset_calibration, ADCIFA_set_sh_gain_calibration, ADCIFA_START_UP_TIME, adcifa_opt_t::free_running_mode_enable, adcifa_opt_t::frequency, adcifa_opt_t::gain_calibration_value, adcifa_opt_t::offset_calibration_value, adcifa_opt_t::reference_source, adcifa_opt_t::sample_and_hold_disable, adcifa_opt_t::sh_calibration_value, adcifa_opt_t::single_sequencer_mode, and adcifa_opt_t::sleep_mode_enable.

Referenced by main().

00079 {
00080 
00081  
00082   // Sanity Check
00083   Assert( adcifa!=NULL );
00084 
00085   // Set the ADC configuration
00086   AVR32_ADCIFA.cfg  = (p_adcifa_opt->sleep_mode_enable << AVR32_ADCIFA_CFG_SLEEP)
00087                     | (p_adcifa_opt->single_sequencer_mode << AVR32_ADCIFA_CFG_SSMQ)
00088                     | (p_adcifa_opt->free_running_mode_enable << AVR32_ADCIFA_CFG_SSMQ)
00089                     | (p_adcifa_opt->reference_source << AVR32_ADCIFA_CFG_RS)
00090                     | (p_adcifa_opt->sample_and_hold_disable << AVR32_ADCIFA_CFG_SHD)
00091                     | (((ADCIFA_START_UP_TIME * (p_adcifa_opt->frequency/1000))/32000) << AVR32_ADCIFA_CFG_SUT);
00092 
00093   // Configure Clock  (rounded up)
00094   adcifa->ckdiv = ((pb_hz / (2*p_adcifa_opt->frequency)) << AVR32_ADCIFA_CKDIV_CNT_OFFSET) & AVR32_ADCIFA_CKDIV_CNT_MASK; 
00095 
00096   // Set ADC Offset Calibration
00097   ADCIFA_set_offset_calibration(p_adcifa_opt->offset_calibration_value);
00098 
00099   // Set ADC Gain Calibration
00100   ADCIFA_set_gain_calibration(p_adcifa_opt->gain_calibration_value);
00101 
00102   // Set Sample & Hold Gain Calibration
00103   ADCIFA_set_sh_gain_calibration(p_adcifa_opt->sh_calibration_value);
00104   
00105   // Enable ADCIFA
00106   ADCIFA_enable();
00107 
00108   // Wait Startup Time
00109   while(1) {
00110    if (ADCIFA_is_startup_time()) break;
00111   }
00112 
00113   return ADCIFA_CONFIGURATION_ACCEPTED;
00114 }

U8 adcifa_configure_sequencer ( volatile avr32_adcifa_t *  adcifa,
U8  sequencer,
adcifa_sequencer_opt_t p_adcifa_sequencer_opt,
adcifa_sequencer_conversion_opt_t p_adcifa_sequencer_conversion_opt 
)

Configure ADCIFA specific sequencer.

  • Sequence, Gain and Mux.

Parameters:
*adcifa Base address of the ADCIFA
sequencer 0: sequencer 0 - 1: sequencer 1
*p_adcifa_sequencer_opt Structure for the sequencer configuration
*p_adcifa_sequencer_conversion_opt Pointer on a buffer for each conversion on a sequencer
Returns:
U8 ADCIFA_CONFIGURATION_REFUSED or ADCIFA_CONFIGURATION_ACCEPTED

Definition at line 116 of file adcifa.c.

References ADCIFA_CONFIGURATION_ACCEPTED, ADCIFA_configure_muxsel0n, ADCIFA_configure_muxsel0p, ADCIFA_configure_muxsel1n, ADCIFA_configure_muxsel1p, ADCIFA_configure_sequencer_0, ADCIFA_configure_sequencer_1, ADCIFA_configure_sh0gain, ADCIFA_configure_sh1gain, adcifa_sequencer_conversion_opt_t::channel_n, adcifa_sequencer_conversion_opt_t::channel_p, adcifa_sequencer_opt_t::convnb, adcifa_sequencer_opt_t::half_word_adjustment, adcifa_sequencer_opt_t::oversampling, adcifa_sequencer_opt_t::resolution, adcifa_sequencer_opt_t::software_acknowledge, adcifa_sequencer_opt_t::start_of_conversion, and adcifa_sequencer_opt_t::trigger_selection.

Referenced by main().

00120 {
00121   U8 g[8]={0};
00122   U8 mp[8]={0};
00123   U8 mn[8]={0};
00124   U8 i;
00125   // Sanity Check
00126   Assert( adcifa!=NULL );
00127 
00128   // Switch case with sequencer
00129   switch (sequencer)
00130   {
00131     // Sequencer 0
00132     case 0:
00133       // Configure Sequencer 0
00134       ADCIFA_configure_sequencer_0((p_adcifa_sequencer_opt->convnb-1), 
00135                                    p_adcifa_sequencer_opt->resolution, 
00136                                    p_adcifa_sequencer_opt->trigger_selection, 
00137                                    p_adcifa_sequencer_opt->start_of_conversion, 
00138                                    p_adcifa_sequencer_opt->oversampling, 
00139                                    p_adcifa_sequencer_opt->half_word_adjustment, 
00140                                    p_adcifa_sequencer_opt->software_acknowledge);
00141 
00142       // Configure Gain for Sequencer 0
00143       for (i = 0; i < p_adcifa_sequencer_opt->convnb; i++)
00144         g[i] = p_adcifa_sequencer_conversion_opt[i].gain;
00145       ADCIFA_configure_sh0gain(g[7], g[6], g[5], g[4], g[3], g[2], g[1], g[0]);
00146       
00147       // Configure Mux for Sequencer 0
00148       for (i = 0; i < p_adcifa_sequencer_opt->convnb; i++)
00149       {
00150         mp[i] = p_adcifa_sequencer_conversion_opt[i].channel_p;
00151         mn[i] = p_adcifa_sequencer_conversion_opt[i].channel_n;
00152       }
00153       ADCIFA_configure_muxsel0p(mp[7], mp[6], mp[5], mp[4], mp[3], mp[2], mp[1], mp[0]);
00154       ADCIFA_configure_muxsel0n(mn[7], mn[6], mn[5], mn[4], mn[3], mn[2], mn[1], mn[0]);
00155       break;
00156     // Sequencer 1
00157     case 1:
00158       // Configure Sequencer 1
00159       ADCIFA_configure_sequencer_1(p_adcifa_sequencer_opt->convnb-1, 
00160                                    p_adcifa_sequencer_opt->resolution, 
00161                                    p_adcifa_sequencer_opt->trigger_selection, 
00162                                    p_adcifa_sequencer_opt->start_of_conversion, 
00163                                    p_adcifa_sequencer_opt->oversampling, 
00164                                    p_adcifa_sequencer_opt->half_word_adjustment, 
00165                                    p_adcifa_sequencer_opt->software_acknowledge);
00166 
00167       // Configure Gain for Sequencer 1
00168       for (i = 0; i < p_adcifa_sequencer_opt->convnb; i++)
00169         g[i] = p_adcifa_sequencer_conversion_opt[i].gain;
00170       ADCIFA_configure_sh1gain(g[7], g[6], g[5], g[4], g[3], g[2], g[1], g[0]);
00171       
00172       // Configure Mux for Sequencer 1
00173       for (i = 0 ; i < p_adcifa_sequencer_opt->convnb; i++)
00174       {
00175         mp[i] = p_adcifa_sequencer_conversion_opt[i].channel_p;
00176         mn[i] = p_adcifa_sequencer_conversion_opt[i].channel_n;
00177       }
00178       ADCIFA_configure_muxsel1p(mp[7], mp[6], mp[5], mp[4], mp[3], mp[2], mp[1], mp[0]);
00179       ADCIFA_configure_muxsel1n(mn[7], mn[6], mn[5], mn[4], mn[3], mn[2], mn[1], mn[0]);
00180       break;
00181     default:
00182       break;
00183   }
00184   return ADCIFA_CONFIGURATION_ACCEPTED;
00185 }

void adcifa_get_calibration_data ( volatile avr32_adcifa_t *  adcifa,
adcifa_opt_t p_adcifa_opt,
U8  sequencer 
)

Get ADCIFA Calibration Data. Mandatory to call if factory calibration data are wanted to be used. If not called, Calibration Data should be set by the application.

Parameters:
*adcifa Base address of the ADCIFA
*p_adcifa_opt Structure for the ADCIFA core configuration
sequencer 0: sequencer 0 - 1: sequencer 1

Definition at line 52 of file adcifa.c.

References adcifa_opt_t::gain_calibration_value, adcifa_opt_t::offset_calibration_value, and adcifa_opt_t::sh_calibration_value.

Referenced by main().

00055 {
00056   unsigned int* calibration_data_adc = (unsigned int*)AVR32_FLASHC_CALIBRATION_SECOND_WORD_ADDRESS;
00057   unsigned int* calibration_data_seq = (unsigned int*)AVR32_FLASHC_CALIBRATION_THIRD_WORD_ADDRESS;
00058   
00059   // Get ADC Offset Calibration
00060   p_adcifa_opt->offset_calibration_value = (*calibration_data_adc >> 24);
00061   
00062   // Get ADC Gain Calibration
00063   p_adcifa_opt->gain_calibration_value = ((*calibration_data_adc) & AVR32_ADCIFA_ADCCAL_GCAL_MASK) ;
00064    
00065   if (sequencer == 0)
00066   {   
00067     // Get Sample & Hold Gain Calibration
00068     p_adcifa_opt->sh_calibration_value = ((*calibration_data_seq) & AVR32_ADCIFA_SHCAL_GAIN0_MASK);
00069   }
00070   else
00071   {
00072     // Get Sample & Hold Gain Calibration
00073     p_adcifa_opt->sh_calibration_value = ((*calibration_data_seq >> AVR32_ADCIFA_SHCAL_GAIN1_OFFSET)& AVR32_ADCIFA_SHCAL_GAIN1_MASK);
00074   }
00075 }                                

U8 adcifa_get_values_from_sequencer ( volatile avr32_adcifa_t *  adcifa,
U8  sequencer,
adcifa_sequencer_opt_t p_adcifa_sequencer_opt,
S16 *  adcifa_values 
)

Get channel values for a specific sequence.

Parameters:
*adcifa Base address of the ADCIFA
sequencer 0: sequencer 0 - 1: sequencer 1
*p_adcifa_sequencer_opt Structure for the sequencer configuration
adcifa_values Pointer on the converter values
Returns:
U8 ADCIFA_STATUS_COMPLETED or ADCIFA_STATUS_NOT_COMPLETED

Definition at line 246 of file adcifa.c.

References adcifa_check_eos(), ADCIFA_read_resx_sequencer_0, ADCIFA_read_resx_sequencer_1, ADCIFA_STATUS_COMPLETED, ADCIFA_STATUS_NOT_COMPLETED, and adcifa_sequencer_opt_t::convnb.

Referenced by main().

00250 {
00251   U8 i;
00252   // Sanity Check
00253   Assert( adcifa!=NULL );
00254 
00255   // wait for end of sequence
00256   if(adcifa_check_eos(adcifa, sequencer) != HIGH)
00257     return ADCIFA_STATUS_NOT_COMPLETED;
00258   
00259   switch(sequencer)
00260   {
00261     case 0:
00262       // Read values from Sequencer 0
00263       for (i = 0; i < p_adcifa_sequencer_opt->convnb; i++)
00264       {
00265           adcifa_values[i] = ADCIFA_read_resx_sequencer_0(i);
00266       }
00267       break;
00268     case 1:
00269       // Read values from Sequencer 1
00270       for (i = 0; i < p_adcifa_sequencer_opt->convnb; i++)
00271       {
00272           adcifa_values[i] = ADCIFA_read_resx_sequencer_1(i);
00273       }
00274       break;
00275     default:
00276       break;
00277   }
00278 
00279   return ADCIFA_STATUS_COMPLETED;
00280 }

void adcifa_start_sequencer ( volatile avr32_adcifa_t *  adcifa,
U8  sequencer 
)

Start analog to digital conversion for a specific sequencer.

Parameters:
*adcifa Base address of the ADCIFA
sequencer 0: sequencer 0 - 1: sequencer 1

Definition at line 187 of file adcifa.c.

References ADCIFA_SEQ0, ADCIFA_SEQ0_SEQ1, ADCIFA_SEQ1, and ADCIFA_softsoc_sequencer.

Referenced by main().

00188 {
00189   // Sanity Check
00190   Assert( adcifa!=NULL );
00191 
00192   // Switch Sequencer
00193   switch (sequencer)
00194   {  
00195     case ADCIFA_SEQ0:
00196       ADCIFA_softsoc_sequencer(AVR32_ADCIFA_CR_SOC0_MASK);
00197       break;
00198     case ADCIFA_SEQ1:
00199       ADCIFA_softsoc_sequencer(AVR32_ADCIFA_CR_SOC1_MASK);
00200       break;
00201     case ADCIFA_SEQ0_SEQ1:
00202       ADCIFA_softsoc_sequencer(AVR32_ADCIFA_CR_SOC0_MASK | AVR32_ADCIFA_CR_SOC1_MASK);
00203       break;
00204     default:
00205       break;  
00206   }
00207 }


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