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00047 #ifndef _CS2200_H_
00048 #define _CS2200_H_
00049
00050 #include <avr32/io.h>
00051 #include "compiler.h"
00052
00053
00054 #include "conf_cs2200.h"
00055
00056
00059 #define CS2200_INTERFACE_SPI 1
00060 #define CS2200_INTERFACE_TWI 2
00062
00064 #define _32_BITS_RATIO(frequency) ((int)(((float)frequency/FOSC0)*(1<<20)))
00065
00067 #define PPM(value, ppm) ( ((int)( (long long)value*(ppm)/1000000) ) )
00068
00070 #define PPM_ADD(value, ppm) ( ((int)(value + (long long)value*(ppm)/1000000)) )
00071
00073 #define PPM_SUB(value, ppm) ( ((int)(value - (long long)value*(ppm)/1000000)) )
00074
00075
00076 #if CS2200_NB_TRIES < 1
00077 # error The number of times to initialize the CS2200 must be greater than 0. Update the CS2200_NB_TRIES define value.
00078 #endif
00079
00080 #if CS2200_INTERFACE == CS2200_INTERFACE_SPI
00081 # error The SPI interface is not supported.
00082 #elif CS2200_INTERFACE == CS2200_INTERFACE_TWI
00083 # define CS2200_TWI_ADDR (0x9C >> 1)
00084
00085 # if (CS2200_TWI_MASTER_SPEED > 100000)
00086 # error The TWI clock speed is out of the specificated range. It must be <= than 100KHz
00087 # endif
00088 #endif
00089
00090 extern void cs2200_switch_on(void);
00091 extern void cs2200_switch_off(void);
00092
00095 Bool cs2200_setup(U32 out_freq);
00096
00099 void cs2200_freq_clk_out(U32 ratio);
00100
00103 void cs2200_freq_clk_adjust(U16 lsw_ratio);
00104
00107 void cs2200_set_new_freq_clk_out(U32 ratio);
00108
00111 void cs2200_read(U8 address, void *buffer, U8 len);
00112
00115 void cs2200_write(U8 address, const void *buffer, U8 len);
00116
00120 int cs2200_write_ex(U8 address, const void *buffer, U8 len);
00121
00124 void cs2200_enter_test_mode(void);
00125
00128 void cs2200_leave_test_mode(void);
00129
00132 void cs2200_enter_power_down_mode(void);
00133
00136 void cs2200_leave_power_down_mode(void);
00137
00142
00143 #define CS2200_READ(name) \
00144 static inline void CS2200_READ_##name(void *data, size_t len) \
00145 { \
00146 cs2200_read(CS2200_REG_##name##_ADDR, data, len); \
00147 }
00148
00149 #define CS2200_READ1(name) \
00150 static inline U8 CS2200_READ_##name(void) \
00151 { \
00152 U8 data; \
00153 cs2200_read(CS2200_REG_##name##_ADDR, &data, sizeof(data)); \
00154 return data; \
00155 }
00156
00157 #define CS2200_READ2(name) \
00158 static inline U16 CS2200_READ_##name(void) \
00159 { \
00160 U16 data; \
00161 cs2200_read(CS2200_REG_##name##_ADDR, &data, sizeof(data)); \
00162 return data; \
00163 }
00164
00165 #define CS2200_READ4(name) \
00166 static inline U32 CS2200_READ_##name(void) \
00167 { \
00168 U32 data; \
00169 cs2200_read(CS2200_REG_##name##_ADDR, &data, sizeof(data)); \
00170 return data; \
00171 }
00172
00173 #define CS2200_WRITE(name) \
00174 static inline void CS2200_WRITE_##name(const void *data, size_t len) \
00175 { \
00176 cs2200_write(CS2200_REG_##name##_ADDR, data, len); \
00177 }
00178
00179 #define CS2200_WRITE1(name) \
00180 static inline void CS2200_WRITE_##name(U8 data) \
00181 { \
00182 cs2200_write(CS2200_REG_##name##_ADDR, &data, sizeof(data)); \
00183 }
00184
00185 #define CS2200_WRITE2(name) \
00186 static inline void CS2200_WRITE_##name(U16 data) \
00187 { \
00188 cs2200_write(CS2200_REG_##name##_ADDR, &data, sizeof(data)); \
00189 }
00190
00191 #define CS2200_WRITE4(name) \
00192 static inline void CS2200_WRITE_##name(U32 data) \
00193 { \
00194 cs2200_write(CS2200_REG_##name##_ADDR, &data, sizeof(data)); \
00195 }
00197
00198
00200
00201 #define CS2200_REG_TEST_MODE_1_ADDR 0x00
00202 #define CS2200_REG_DEVICE_ID_ADDR 0x01
00203 #define CS2200_REG_DEVICE_CTRL_ADDR 0x02
00204 #define CS2200_REG_DEVICE_CFG_1_ADDR 0x03
00205 #define CS2200_REG_GLOBAL_CFG_ADDR 0x05
00206 #define CS2200_REG_32_BITS_RATIO_ADDR 0x06 // to 0x09
00207 #define CS2200_REG_LSW_RATIO_ADDR 0x08 // to 0x09
00208 #define CS2200_REG_LSB_RATIO_ADDR 0x09
00209 #define CS2200_REG_FUNCT_CFG_1_ADDR 0x16
00210 #define CS2200_REG_FUNCT_CFG_2_ADDR 0x17
00211 #define CS2200_REG_TEST_MODE_2_ADDR 0x77
00213
00214
00215 CS2200_READ1(DEVICE_ID);
00216
00217
00218 CS2200_READ1(DEVICE_CTRL);
00219 CS2200_WRITE1(DEVICE_CTRL);
00220 CS2200_READ1(DEVICE_CFG_1);
00221 CS2200_WRITE1(DEVICE_CFG_1);
00222 CS2200_READ1(GLOBAL_CFG);
00223 CS2200_WRITE1(GLOBAL_CFG);
00224 CS2200_READ4(32_BITS_RATIO);
00225 CS2200_WRITE4(32_BITS_RATIO);
00226 CS2200_WRITE1(LSB_RATIO);
00227 CS2200_READ1(FUNCT_CFG_1);
00228 CS2200_WRITE1(FUNCT_CFG_1);
00229 CS2200_READ1(FUNCT_CFG_2);
00230 CS2200_WRITE1(FUNCT_CFG_2);
00231 CS2200_WRITE1(TEST_MODE_1);
00232 CS2200_WRITE1(TEST_MODE_2);
00233
00234 #endif // _CS2200_H_