toplevel Project Status (05/09/2012 - 11:07:54)
Project File: EMB.xise Parser Errors:
Module Name: cpu Implementation State: Programming File Not Generated
Target Device: xc3s500e-5pq208
  • Errors:
 
Product Version:ISE 13.4
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogOut of Datema 7. mai 23:49:45 2012
WebTalk ReportCurrenton 9. mai 11:07:41 2012
WebTalk Log FileCurrenton 9. mai 11:07:53 2012

Date Generated: 05/09/2012 - 11:07:54