Definition in file pm.c.
#include "compiler.h"
#include "pm.h"
Go to the source code of this file.
Data Structures | |
union | u_avr32_pm_bgcr_t |
union | u_avr32_pm_bod_t |
union | u_avr32_pm_cksel_t |
union | u_avr32_pm_gcctrl_t |
union | u_avr32_pm_icr_t |
union | u_avr32_pm_idr_t |
union | u_avr32_pm_ier_t |
union | u_avr32_pm_mcctrl_t |
union | u_avr32_pm_oscctrl0_t |
union | u_avr32_pm_oscctrl1_t |
union | u_avr32_pm_oscctrl32_t |
union | u_avr32_pm_pll_t |
union | u_avr32_pm_rccr_t |
union | u_avr32_pm_vregcr_t |
Functions | |
void | pm_bod_clear_irq (volatile avr32_pm_t *pm) |
Clears the Brown-Out Detector interrupt flag. | |
void | pm_bod_disable_irq (volatile avr32_pm_t *pm) |
Disables the Brown-Out Detector interrupt. | |
void | pm_bod_enable_irq (volatile avr32_pm_t *pm) |
Enables the Brown-Out Detector interrupt. | |
unsigned long | pm_bod_get_irq_enable_bit (volatile avr32_pm_t *pm) |
Gets the Brown-Out Detector interrupt enable status. | |
unsigned long | pm_bod_get_irq_status (volatile avr32_pm_t *pm) |
Gets the Brown-Out Detector interrupt flag. | |
unsigned long | pm_bod_get_level (volatile avr32_pm_t *pm) |
Gets the triggering threshold of the Brown-Out Detector. | |
void | pm_cksel (volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel) |
This function will select all the power manager clocks. | |
void | pm_disable_clk0 (volatile avr32_pm_t *pm) |
This function will disable the oscillator 0. | |
void | pm_disable_clk1 (volatile avr32_pm_t *pm) |
This function will disable the oscillator 1. | |
void | pm_disable_clk32 (volatile avr32_pm_t *pm) |
This function will disable the oscillator 32. | |
long | pm_disable_module (volatile avr32_pm_t *pm, unsigned long module) |
Disable the clock of a module. | |
void | pm_enable_clk0 (volatile avr32_pm_t *pm, unsigned int startup) |
This function will enable the oscillator 0 to be used with a startup time. | |
void | pm_enable_clk0_no_wait (volatile avr32_pm_t *pm, unsigned int startup) |
This function will enable the oscillator 0 to be used with no startup time. | |
void | pm_enable_clk1 (volatile avr32_pm_t *pm, unsigned int startup) |
This function will enable the oscillator 1 to be used with a startup time. | |
void | pm_enable_clk1_no_wait (volatile avr32_pm_t *pm, unsigned int startup) |
This function will enable the oscillator 1 to be used with no startup time. | |
void | pm_enable_clk32 (volatile avr32_pm_t *pm, unsigned int startup) |
This function will enable the oscillator 32 to be used with a startup time. | |
void | pm_enable_clk32_no_wait (volatile avr32_pm_t *pm, unsigned int startup) |
This function will enable the oscillator 32 to be used with no startup time. | |
long | pm_enable_module (volatile avr32_pm_t *pm, unsigned long module) |
Enable the clock of a module. | |
void | pm_enable_osc0_crystal (volatile avr32_pm_t *pm, unsigned int fosc0) |
This function will enable the crystal mode of the oscillator 0. | |
void | pm_enable_osc0_ext_clock (volatile avr32_pm_t *pm) |
This function will enable the external clock mode of the oscillator 0. | |
void | pm_enable_osc1_crystal (volatile avr32_pm_t *pm, unsigned int fosc1) |
This function will enable the crystal mode of the oscillator 1. | |
void | pm_enable_osc1_ext_clock (volatile avr32_pm_t *pm) |
This function will enable the external clock mode of the oscillator 1. | |
void | pm_enable_osc32_crystal (volatile avr32_pm_t *pm) |
This function will enable the crystal mode of the 32-kHz oscillator. | |
void | pm_enable_osc32_ext_clock (volatile avr32_pm_t *pm) |
This function will enable the external clock mode of the 32-kHz oscillator. | |
void | pm_gc_disable (volatile avr32_pm_t *pm, unsigned int gc) |
This function will disable a generic clock. | |
void | pm_gc_enable (volatile avr32_pm_t *pm, unsigned int gc) |
This function will enable a generic clock. | |
void | pm_gc_setup (volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div) |
This function will setup a generic clock. | |
void | pm_pll_disable (volatile avr32_pm_t *pm, unsigned int pll) |
This function will disable a PLL. | |
void | pm_pll_enable (volatile avr32_pm_t *pm, unsigned int pll) |
This function will enable a PLL. | |
unsigned int | pm_pll_get_option (volatile avr32_pm_t *pm, unsigned int pll) |
This function will get a PLL option. | |
void | pm_pll_set_option (volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable) |
This function will set a PLL option. | |
void | pm_pll_setup (volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount) |
This function will setup a PLL. | |
unsigned long | pm_read_gplp (volatile avr32_pm_t *pm, unsigned long gplp) |
Read the content of the PM GPLP registers. | |
static void | pm_set_osc0_mode (volatile avr32_pm_t *pm, unsigned int mode) |
Sets the mode of the oscillator 0. | |
static void | pm_set_osc1_mode (volatile avr32_pm_t *pm, unsigned int mode) |
Sets the mode of the oscillator 1. | |
static void | pm_set_osc32_mode (volatile avr32_pm_t *pm, unsigned int mode) |
Sets the mode of the 32-kHz oscillator. | |
void | pm_switch_to_clock (volatile avr32_pm_t *pm, unsigned long clock) |
This function will switch the power manager main clock. | |
void | pm_switch_to_osc0 (volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup) |
Switch main clock to clock Osc0 (crystal mode). | |
void | pm_wait_for_clk0_ready (volatile avr32_pm_t *pm) |
This function will wait until the Osc0 clock is ready. | |
void | pm_wait_for_clk1_ready (volatile avr32_pm_t *pm) |
This function will wait until the Osc1 clock is ready. | |
void | pm_wait_for_clk32_ready (volatile avr32_pm_t *pm) |
This function will wait until the osc32 clock is ready. | |
void | pm_wait_for_pll0_locked (volatile avr32_pm_t *pm) |
This function will wait for PLL0 locked. | |
void | pm_wait_for_pll1_locked (volatile avr32_pm_t *pm) |
This function will wait for PLL1 locked. | |
void | pm_write_gplp (volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value) |
Write into the PM GPLP registers. |
void pm_bod_clear_irq | ( | volatile avr32_pm_t * | pm | ) |
void pm_bod_disable_irq | ( | volatile avr32_pm_t * | pm | ) |
Disables the Brown-Out Detector interrupt.
pm | Base address of the Power Manager (i.e. &AVR32_PM). |
Definition at line 473 of file pm.c.
00474 { 00475 Bool global_interrupt_enabled = Is_global_interrupt_enabled(); 00476 00477 if (global_interrupt_enabled) Disable_global_interrupt(); 00478 pm->idr = AVR32_PM_IDR_BODDET_MASK; 00479 pm->isr; 00480 if (global_interrupt_enabled) Enable_global_interrupt(); 00481 }
void pm_bod_enable_irq | ( | volatile avr32_pm_t * | pm | ) |
unsigned long pm_bod_get_irq_enable_bit | ( | volatile avr32_pm_t * | pm | ) |
unsigned long pm_bod_get_irq_status | ( | volatile avr32_pm_t * | pm | ) |
unsigned long pm_bod_get_level | ( | volatile avr32_pm_t * | pm | ) |
void pm_cksel | ( | volatile avr32_pm_t * | pm, | |
unsigned int | pbadiv, | |||
unsigned int | pbasel, | |||
unsigned int | pbbdiv, | |||
unsigned int | pbbsel, | |||
unsigned int | hsbdiv, | |||
unsigned int | hsbsel | |||
) |
This function will select all the power manager clocks.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
pbadiv | Peripheral Bus A clock divisor enable | |
pbasel | Peripheral Bus A select | |
pbbdiv | Peripheral Bus B clock divisor enable | |
pbbsel | Peripheral Bus B select | |
hsbdiv | High Speed Bus clock divisor enable (CPU clock = HSB clock) | |
hsbsel | High Speed Bus select (CPU clock = HSB clock ) |
Definition at line 327 of file pm.c.
References u_avr32_pm_cksel_t::cksel, and u_avr32_pm_cksel_t::CKSEL.
Referenced by pm_configure_clocks().
00334 { 00335 u_avr32_pm_cksel_t u_avr32_pm_cksel = {0}; 00336 00337 u_avr32_pm_cksel.CKSEL.cpusel = hsbsel; 00338 u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv; 00339 u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel; 00340 u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv; 00341 u_avr32_pm_cksel.CKSEL.pbasel = pbasel; 00342 u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv; 00343 u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel; 00344 u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv; 00345 00346 pm->cksel = u_avr32_pm_cksel.cksel; 00347 00348 // Wait for ckrdy bit and then clear it 00349 while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); 00350 }
void pm_disable_clk0 | ( | volatile avr32_pm_t * | pm | ) |
void pm_disable_clk1 | ( | volatile avr32_pm_t * | pm | ) |
void pm_disable_clk32 | ( | volatile avr32_pm_t * | pm | ) |
long pm_disable_module | ( | volatile avr32_pm_t * | pm, | |
unsigned long | module | |||
) |
Disable the clock of a module.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
module | The module to shut down (use one of the defines in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") |
0 | Success. | |
<0 | An error occured. |
Definition at line 533 of file pm.c.
00534 { 00535 unsigned long domain = module>>5; 00536 unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); 00537 00538 // Implementation-specific shortcut: the ckMASK registers are contiguous and 00539 // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. 00540 00541 *regptr &= ~(1<<(module%32)); 00542 00543 return PASS; 00544 }
void pm_enable_clk0 | ( | volatile avr32_pm_t * | pm, | |
unsigned int | startup | |||
) |
This function will enable the oscillator 0 to be used with a startup time.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
startup | Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. |
Definition at line 173 of file pm.c.
References pm_enable_clk0_no_wait(), and pm_wait_for_clk0_ready().
Referenced by pm_switch_to_osc0().
00174 { 00175 pm_enable_clk0_no_wait(pm, startup); 00176 pm_wait_for_clk0_ready(pm); 00177 }
void pm_enable_clk0_no_wait | ( | volatile avr32_pm_t * | pm, | |
unsigned int | startup | |||
) |
This function will enable the oscillator 0 to be used with no startup time.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
startup | Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. |
Definition at line 186 of file pm.c.
References u_avr32_pm_oscctrl0_t::oscctrl0, and u_avr32_pm_oscctrl0_t::OSCCTRL0.
Referenced by pm_enable_clk0().
00187 { 00188 // Read register 00189 u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; 00190 // Modify 00191 u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup; 00192 // Write back 00193 pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; 00194 00195 pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK; 00196 }
void pm_enable_clk1 | ( | volatile avr32_pm_t * | pm, | |
unsigned int | startup | |||
) |
This function will enable the oscillator 1 to be used with a startup time.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
startup | Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. |
Definition at line 236 of file pm.c.
References pm_enable_clk1_no_wait(), and pm_wait_for_clk1_ready().
00237 { 00238 pm_enable_clk1_no_wait(pm, startup); 00239 pm_wait_for_clk1_ready(pm); 00240 }
void pm_enable_clk1_no_wait | ( | volatile avr32_pm_t * | pm, | |
unsigned int | startup | |||
) |
This function will enable the oscillator 1 to be used with no startup time.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
startup | Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. |
Definition at line 249 of file pm.c.
References u_avr32_pm_oscctrl1_t::oscctrl1, and u_avr32_pm_oscctrl1_t::OSCCTRL1.
Referenced by pm_enable_clk1().
00250 { 00251 // Read register 00252 u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; 00253 // Modify 00254 u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup; 00255 // Write back 00256 pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; 00257 00258 pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK; 00259 }
void pm_enable_clk32 | ( | volatile avr32_pm_t * | pm, | |
unsigned int | startup | |||
) |
This function will enable the oscillator 32 to be used with a startup time.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
startup | Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. |
Definition at line 296 of file pm.c.
References pm_enable_clk32_no_wait(), and pm_wait_for_clk32_ready().
00297 { 00298 pm_enable_clk32_no_wait(pm, startup); 00299 pm_wait_for_clk32_ready(pm); 00300 }
void pm_enable_clk32_no_wait | ( | volatile avr32_pm_t * | pm, | |
unsigned int | startup | |||
) |
This function will enable the oscillator 32 to be used with no startup time.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
startup | Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. |
Definition at line 309 of file pm.c.
References u_avr32_pm_oscctrl32_t::oscctrl32, and u_avr32_pm_oscctrl32_t::OSCCTRL32.
Referenced by pm_enable_clk32().
00310 { 00311 // Read register 00312 u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; 00313 // Modify 00314 u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1; 00315 u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup; 00316 // Write back 00317 pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; 00318 }
long pm_enable_module | ( | volatile avr32_pm_t * | pm, | |
unsigned long | module | |||
) |
Enable the clock of a module.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
module | The module to clock (use one of the defines in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") |
0 | Success. | |
<0 | An error occured. |
Definition at line 520 of file pm.c.
00521 { 00522 unsigned long domain = module>>5; 00523 unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); 00524 00525 // Implementation-specific shortcut: the ckMASK registers are contiguous and 00526 // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. 00527 00528 *regptr |= (1<<(module%32)); 00529 00530 return PASS; 00531 }
void pm_enable_osc0_crystal | ( | volatile avr32_pm_t * | pm, | |
unsigned int | fosc0 | |||
) |
This function will enable the crystal mode of the oscillator 0.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
fosc0 | Oscillator 0 crystal frequency (Hz) |
Definition at line 164 of file pm.c.
References pm_set_osc0_mode().
Referenced by pm_switch_to_osc0().
00165 { 00166 pm_set_osc0_mode(pm, (fosc0 < 900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 : 00167 (fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 : 00168 (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 : 00169 AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3); 00170 }
void pm_enable_osc0_ext_clock | ( | volatile avr32_pm_t * | pm | ) |
This function will enable the external clock mode of the oscillator 0.
pm | Base address of the Power Manager (i.e. &AVR32_PM) |
Definition at line 158 of file pm.c.
References pm_set_osc0_mode().
00159 { 00160 pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK); 00161 }
void pm_enable_osc1_crystal | ( | volatile avr32_pm_t * | pm, | |
unsigned int | fosc1 | |||
) |
This function will enable the crystal mode of the oscillator 1.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
fosc1 | Oscillator 1 crystal frequency (Hz) |
Definition at line 227 of file pm.c.
References pm_set_osc1_mode().
00228 { 00229 pm_set_osc1_mode(pm, (fosc1 < 900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 : 00230 (fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 : 00231 (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 : 00232 AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3); 00233 }
void pm_enable_osc1_ext_clock | ( | volatile avr32_pm_t * | pm | ) |
This function will enable the external clock mode of the oscillator 1.
pm | Base address of the Power Manager (i.e. &AVR32_PM) |
Definition at line 221 of file pm.c.
References pm_set_osc1_mode().
00222 { 00223 pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK); 00224 }
void pm_enable_osc32_crystal | ( | volatile avr32_pm_t * | pm | ) |
This function will enable the crystal mode of the 32-kHz oscillator.
pm | Base address of the Power Manager (i.e. &AVR32_PM) |
Definition at line 290 of file pm.c.
References pm_set_osc32_mode().
00291 { 00292 pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL); 00293 }
void pm_enable_osc32_ext_clock | ( | volatile avr32_pm_t * | pm | ) |
This function will enable the external clock mode of the 32-kHz oscillator.
pm | Base address of the Power Manager (i.e. &AVR32_PM) |
Definition at line 284 of file pm.c.
References pm_set_osc32_mode().
00285 { 00286 pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK); 00287 }
void pm_gc_disable | ( | volatile avr32_pm_t * | pm, | |
unsigned int | gc | |||
) |
void pm_gc_enable | ( | volatile avr32_pm_t * | pm, | |
unsigned int | gc | |||
) |
This function will enable a generic clock.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
gc | generic clock number (0 for gc0...) |
Definition at line 371 of file pm.c.
Referenced by pm_configure_usb_clock().
void pm_gc_setup | ( | volatile avr32_pm_t * | pm, | |
unsigned int | gc, | |||
unsigned int | osc_or_pll, | |||
unsigned int | pll_osc, | |||
unsigned int | diven, | |||
unsigned int | div | |||
) |
This function will setup a generic clock.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
gc | generic clock number (0 for gc0...) | |
osc_or_pll | Use OSC (=0) or PLL (=1) | |
pll_osc | Select Osc0/PLL0 or Osc1/PLL1 | |
diven | Generic clock divisor enable | |
div | Generic clock divisor |
Definition at line 353 of file pm.c.
References u_avr32_pm_gcctrl_t::gcctrl, and u_avr32_pm_gcctrl_t::GCCTRL.
Referenced by pm_configure_usb_clock().
00359 { 00360 u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0}; 00361 00362 u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc; 00363 u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll; 00364 u_avr32_pm_gcctrl.GCCTRL.diven = diven; 00365 u_avr32_pm_gcctrl.GCCTRL.div = div; 00366 00367 pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl; 00368 }
void pm_pll_disable | ( | volatile avr32_pm_t * | pm, | |
unsigned int | pll | |||
) |
void pm_pll_enable | ( | volatile avr32_pm_t * | pm, | |
unsigned int | pll | |||
) |
This function will enable a PLL.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
pll | PLL number(0 for PLL0, 1 for PLL1) |
Definition at line 422 of file pm.c.
Referenced by pm_configure_clocks(), and pm_configure_usb_clock().
unsigned int pm_pll_get_option | ( | volatile avr32_pm_t * | pm, | |
unsigned int | pll | |||
) |
void pm_pll_set_option | ( | volatile avr32_pm_t * | pm, | |
unsigned int | pll, | |||
unsigned int | pll_freq, | |||
unsigned int | pll_div2, | |||
unsigned int | pll_wbwdisable | |||
) |
This function will set a PLL option.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
pll | PLL number(0 for PLL0, 1 for PLL1) | |
pll_freq | Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. | |
pll_div2 | Divide the PLL output frequency by 2 (this settings does not change the FVCO value) | |
pll_wbwdisable | 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. |
Definition at line 403 of file pm.c.
References u_avr32_pm_pll_t::pll, and u_avr32_pm_pll_t::PLL.
Referenced by pm_configure_clocks(), and pm_configure_usb_clock().
00408 { 00409 u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]}; 00410 u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2); 00411 pm->pll[pll] = u_avr32_pm_pll.pll; 00412 }
void pm_pll_setup | ( | volatile avr32_pm_t * | pm, | |
unsigned int | pll, | |||
unsigned int | mul, | |||
unsigned int | div, | |||
unsigned int | osc, | |||
unsigned int | lockcount | |||
) |
This function will setup a PLL.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
pll | PLL number(0 for PLL0, 1 for PLL1) | |
mul | PLL MUL in the PLL formula | |
div | PLL DIV in the PLL formula | |
osc | OSC number (0 for osc0, 1 for osc1) | |
lockcount | PLL lockount |
Definition at line 385 of file pm.c.
References u_avr32_pm_pll_t::pll, and u_avr32_pm_pll_t::PLL.
Referenced by pm_configure_clocks(), and pm_configure_usb_clock().
00391 { 00392 u_avr32_pm_pll_t u_avr32_pm_pll = {0}; 00393 00394 u_avr32_pm_pll.PLL.pllosc = osc; 00395 u_avr32_pm_pll.PLL.plldiv = div; 00396 u_avr32_pm_pll.PLL.pllmul = mul; 00397 u_avr32_pm_pll.PLL.pllcount = lockcount; 00398 00399 pm->pll[pll] = u_avr32_pm_pll.pll; 00400 }
unsigned long pm_read_gplp | ( | volatile avr32_pm_t * | pm, | |
unsigned long | gplp | |||
) |
Read the content of the PM GPLP registers.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
gplp | GPLP register index (0,1,... depending on the number of GPLP registers for a given part) |
Definition at line 508 of file pm.c.
Referenced by pcl_read_gplp().
static void pm_set_osc0_mode | ( | volatile avr32_pm_t * | pm, | |
unsigned int | mode | |||
) | [static] |
Sets the mode of the oscillator 0.
pm | Base address of the Power Manager (i.e. &AVR32_PM). | |
mode | Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x). |
Definition at line 147 of file pm.c.
References u_avr32_pm_oscctrl0_t::oscctrl0, and u_avr32_pm_oscctrl0_t::OSCCTRL0.
Referenced by pm_enable_osc0_crystal(), and pm_enable_osc0_ext_clock().
00148 { 00149 // Read 00150 u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; 00151 // Modify 00152 u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode; 00153 // Write 00154 pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; 00155 }
static void pm_set_osc1_mode | ( | volatile avr32_pm_t * | pm, | |
unsigned int | mode | |||
) | [static] |
Sets the mode of the oscillator 1.
pm | Base address of the Power Manager (i.e. &AVR32_PM). | |
mode | Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x). |
Definition at line 210 of file pm.c.
References u_avr32_pm_oscctrl1_t::oscctrl1, and u_avr32_pm_oscctrl1_t::OSCCTRL1.
Referenced by pm_enable_osc1_crystal(), and pm_enable_osc1_ext_clock().
00211 { 00212 // Read 00213 u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; 00214 // Modify 00215 u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode; 00216 // Write 00217 pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; 00218 }
static void pm_set_osc32_mode | ( | volatile avr32_pm_t * | pm, | |
unsigned int | mode | |||
) | [static] |
Sets the mode of the 32-kHz oscillator.
pm | Base address of the Power Manager (i.e. &AVR32_PM). | |
mode | 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x). |
Definition at line 273 of file pm.c.
References u_avr32_pm_oscctrl32_t::oscctrl32, and u_avr32_pm_oscctrl32_t::OSCCTRL32.
Referenced by pm_enable_osc32_crystal(), and pm_enable_osc32_ext_clock().
00274 { 00275 // Read 00276 u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; 00277 // Modify 00278 u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode; 00279 // Write 00280 pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; 00281 }
void pm_switch_to_clock | ( | volatile avr32_pm_t * | pm, | |
unsigned long | clock | |||
) |
This function will switch the power manager main clock.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
clock | Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0. |
Definition at line 448 of file pm.c.
References u_avr32_pm_mcctrl_t::mcctrl, and u_avr32_pm_mcctrl_t::MCCTRL.
Referenced by pm_configure_clocks(), and pm_switch_to_osc0().
00449 { 00450 // Read 00451 u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; 00452 // Modify 00453 u_avr32_pm_mcctrl.MCCTRL.mcsel = clock; 00454 // Write back 00455 pm->mcctrl = u_avr32_pm_mcctrl.mcctrl; 00456 }
void pm_switch_to_osc0 | ( | volatile avr32_pm_t * | pm, | |
unsigned int | fosc0, | |||
unsigned int | startup | |||
) |
Switch main clock to clock Osc0 (crystal mode).
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
fosc0 | Oscillator 0 crystal frequency (Hz) | |
startup | Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. |
Definition at line 459 of file pm.c.
References pm_enable_clk0(), pm_enable_osc0_crystal(), and pm_switch_to_clock().
Referenced by pcl_switch_to_osc(), and pm_configure_clocks().
00460 { 00461 pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode 00462 pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal 00463 pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0 00464 }
void pm_wait_for_clk0_ready | ( | volatile avr32_pm_t * | pm | ) |
This function will wait until the Osc0 clock is ready.
pm | Base address of the Power Manager (i.e. &AVR32_PM) |
Definition at line 199 of file pm.c.
Referenced by pm_enable_clk0().
void pm_wait_for_clk1_ready | ( | volatile avr32_pm_t * | pm | ) |
This function will wait until the Osc1 clock is ready.
pm | Base address of the Power Manager (i.e. &AVR32_PM) |
Definition at line 262 of file pm.c.
Referenced by pm_enable_clk1().
void pm_wait_for_clk32_ready | ( | volatile avr32_pm_t * | pm | ) |
This function will wait until the osc32 clock is ready.
pm | Base address of the Power Manager (i.e. &AVR32_PM) |
Definition at line 321 of file pm.c.
Referenced by pm_enable_clk32().
void pm_wait_for_pll0_locked | ( | volatile avr32_pm_t * | pm | ) |
This function will wait for PLL0 locked.
pm | Base address of the Power Manager (i.e. &AVR32_PM) |
Definition at line 436 of file pm.c.
Referenced by pm_configure_clocks().
void pm_wait_for_pll1_locked | ( | volatile avr32_pm_t * | pm | ) |
This function will wait for PLL1 locked.
pm | Base address of the Power Manager (i.e. &AVR32_PM) |
Definition at line 442 of file pm.c.
Referenced by pm_configure_usb_clock().
void pm_write_gplp | ( | volatile avr32_pm_t * | pm, | |
unsigned long | gplp, | |||
unsigned long | value | |||
) |
Write into the PM GPLP registers.
pm | Base address of the Power Manager (i.e. &AVR32_PM) | |
gplp | GPLP register index (0,1,... depending on the number of GPLP registers for a given part) | |
value | Value to write |
Definition at line 514 of file pm.c.
Referenced by pcl_write_gplp().