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00046 #ifndef _PM_UC3L_H_
00047 #define _PM_UC3L_H_
00048
00049 #ifdef __cplusplus
00050 extern "C" {
00051 #endif
00052
00053 #include <avr32/io.h>
00054 #include "compiler.h"
00055
00057
00059 typedef enum
00060 {
00061 PM_CLK_SRC_SLOW = AVR32_PM_MCSEL_SLOW,
00062 PM_CLK_SRC_OSC0 = AVR32_PM_MCSEL_OSC0,
00063 PM_CLK_SRC_DFLL0 = AVR32_PM_MCSEL_DFLL0,
00064 PM_CLK_SRC_RC120M = AVR32_PM_MCSEL_RC120M,
00065 PM_CLK_SRC_INVALID
00066 } pm_clk_src_t;
00067
00069 typedef enum
00070 {
00071 PM_CLK_DOMAIN_0 = AVR32_PM_CLK_GRP_CPU,
00072 PM_CLK_DOMAIN_1 = AVR32_PM_CLK_GRP_HSB,
00073 PM_CLK_DOMAIN_2 = AVR32_PM_CLK_GRP_PBA,
00074 PM_CLK_DOMAIN_3 = AVR32_PM_CLK_GRP_PBB,
00075 PM_CLK_DOMAIN_INVALID
00076 } pm_clk_domain_t;
00077
00078
00080 typedef enum
00081 {
00082 PM_CKSEL_DIVRATIO_2 = 0,
00083 PM_CKSEL_DIVRATIO_4,
00084 PM_CKSEL_DIVRATIO_8,
00085 PM_CKSEL_DIVRATIO_16,
00086 PM_CKSEL_DIVRATIO_32,
00087 PM_CKSEL_DIVRATIO_64,
00088 PM_CKSEL_DIVRATIO_128,
00089 PM_CKSEL_DIVRATIO_256,
00090 PM_CKSEL_DIVRATIO_ERROR
00091 } pm_divratio_t;
00092
00094 typedef enum
00095 {
00096 PM_CPUSEL_DIVRATIO_MAX = AVR32_PM_CPUSEL_CPUSEL_MASK >> AVR32_PM_CPUSEL_CPUSEL_OFFSET,
00097 PM_HSBSEL_DIVRATIO_MAX = AVR32_PM_HSBSEL_HSBSEL_MASK >> AVR32_PM_HSBSEL_HSBSEL_OFFSET,
00098 PM_PBASEL_DIVRATIO_MAX = AVR32_PM_PBASEL_PBSEL_MASK >> AVR32_PM_PBASEL_PBSEL_OFFSET,
00099 PM_PBBSEL_DIVRATIO_MAX = AVR32_PM_PBBSEL_PBSEL_MASK >> AVR32_PM_PBBSEL_PBSEL_OFFSET
00100 } pm_divratio_max_t;
00101
00103 #define PM_POLL_TIMEOUT 100000
00104
00106 #define PM_NOT_SUPPORTED (-10000)
00107
00108
00110 #define PM_UNLOCK(reg) (AVR32_PM.unlock = (unsigned long)(AVR32_PM_UNLOCK_KEY_VALUE << AVR32_PM_UNLOCK_KEY_OFFSET)|(reg))
00111
00112
00115
00116
00128 extern long pm_set_mclk_source(pm_clk_src_t src);
00129
00145 extern long pm_config_mainclk_safety(bool cfd, bool ocp, bool final);
00146
00159 extern long pm_set_clk_domain_div(pm_clk_domain_t clock_domain, pm_divratio_t divratio);
00160
00172 extern long pm_disable_clk_domain_div(pm_clk_domain_t clock_domain);
00173
00186 extern void pm_set_all_cksel( unsigned long main_clock_f_hz, unsigned long cpu_f_hz,
00187 unsigned long pba_f_hz, unsigned long pbb_f_hz );
00188
00198 extern long pm_wait_for_clk_ready(void);
00199
00201
00202
00205
00206
00217 extern long pm_enable_module(unsigned long module);
00218
00229 extern long pm_disable_module(unsigned long module);
00230
00231
00233
00236
00237
00245 #define pm_sleep(sleep_mode) {__asm__ __volatile__ ("sleep "STRINGZ(sleep_mode));}
00246
00247 #define SLEEP(sleep_mode) pm_sleep(sleep_mode)
00248
00254 #ifdef __GNUC__
00255 __attribute__((__always_inline__))
00256 #endif
00257 extern __inline__ unsigned long pm_get_wake_cause(void)
00258 {
00259 return AVR32_PM.wcause;
00260 }
00261
00268 #ifdef __GNUC__
00269 __attribute__((__always_inline__))
00270 #endif
00271 extern __inline__ void pm_asyn_wake_up_enable(unsigned long awen_mask)
00272 {
00273 AVR32_PM.awen |= awen_mask;
00274 }
00275
00282 #ifdef __GNUC__
00283 __attribute__((__always_inline__))
00284 #endif
00285 extern __inline__ void pm_asyn_wake_up_disable(unsigned long awen_mask)
00286 {
00287 AVR32_PM.awen &= ~awen_mask;
00288 }
00289
00291
00292
00293
00296
00297
00303 #ifdef __GNUC__
00304 __attribute__((__always_inline__))
00305 #endif
00306 extern __inline__ unsigned long pm_get_reset_cause(void)
00307 {
00308 return AVR32_PM.rcause;
00309 }
00310
00312
00313
00314
00317
00318
00324 #ifdef __GNUC__
00325 __attribute__((__always_inline__))
00326 #endif
00327 extern __inline__ void pm_enable_interrupts(unsigned long mask)
00328 {
00329 AVR32_PM.ier |= mask;
00330 }
00331
00337 #ifdef __GNUC__
00338 __attribute__((__always_inline__))
00339 #endif
00340 extern __inline__ void pm_disable_interrupts(unsigned long mask)
00341 {
00342 AVR32_PM.idr |= mask;
00343 }
00344
00349 #ifdef __GNUC__
00350 __attribute__((__always_inline__))
00351 #endif
00352 extern __inline__ unsigned long pm_get_enabled_interrupts(void)
00353 {
00354 return(AVR32_PM.imr);
00355 }
00356
00361 #ifdef __GNUC__
00362 __attribute__((__always_inline__))
00363 #endif
00364 extern __inline__ unsigned long pm_get_interrupts_status(void)
00365 {
00366 return(AVR32_PM.isr);
00367 }
00368
00373 #ifdef __GNUC__
00374 __attribute__((__always_inline__))
00375 #endif
00376 extern __inline__ void pm_clear_interrupt_status(unsigned long mask)
00377 {
00378 AVR32_PM.icr |= mask;
00379 }
00380
00382
00383
00384
00387
00388
00393 #ifdef __GNUC__
00394 __attribute__((__always_inline__))
00395 #endif
00396 extern __inline__ unsigned long pm_get_status(void)
00397 {
00398 return AVR32_PM.sr;
00399 }
00400
00402
00403 #ifdef __cplusplus
00404 }
00405 #endif
00406
00407 #endif // _PM_UC3L_H_