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AVR UC3 Series Software Framework: Power Manager Driver

Copyright © 2007 Atmel Corporation

Introduction

UC3A0/1, UC3B, UC3A3

The Power Manager (PM) controls the oscillators and PLLs, and generates the clocks and resets in the device. The PM controls two fast crystal oscillators, as well as two PLLs, which can multiply the clock from either oscillator to provide higher frequencies. Additionally, a low-power 32 KHz oscillator is used to generate the real-time counter clock for high accuracy real-time measurements. The PM also contains a low-power RC oscillator with fast start-up time, which can be used to clock the digital logic.

UC3L, UC3C

The Power Manager (PM) provides synchronous clocks used to clock the main digital logic in the device, namely the CPU, and the modules and peripherals connected to the HSB and PBx buses. The PM also contains advanced power-saving features and a Reset Controller.

 

Power Manager Driver

UC3A0/1, UC3B, UC3A3

The driver is composed of pm.c and pm.h.

 

This driver provides interfaces for PM main hardware features:

  • oscillator source setup: external or crystal;
  • oscillator startup;
  • PLL setup;
  • main clock source setup.

     

    Two examples are available:

    EXAMPLE1: how to configure the Power Manager to use Oscillator 0 as source of main clock, generic clock configuration and switch to a sleep mode

    EXAMPLE2: how to configure a PLL and switch the main clock to PLL output and do a generic clock configuration.

     

    The file pm_conf_clocks.c provides functions to simplify the usage of this driver. It is used to configure all clocks at once by specifying frequencies needed.

    The file power_clocks_lib.c (and power_clocks_lib.h) provides functions to abstract features such as oscillators/pll/dfll configuration, clock configuration, System-sensible parameters configuration, buses clocks configuration, sleep mode, reset.

    UC3L

    The driver is composed of pm_uc3l.c and pm_uc3l.h.

     

    This driver provides interfaces for PM main hardware features:

  • main clock source setup,
  • clock domains setup,
  • peripheral modules setup,
  • Sleep modes setup,
  • reset,
  • PM interrupts setup.

     

    Three examples are available:

    EXAMPLE1: how to configure the Power Manager to use Oscillator 0 as source of main clock, generic clock configuration and switch to a sleep mode. This example is not applicable to the AT32UC3L-EK board because no external crystal/clock is connected to OSC0 on that board.

    EXAMPLE2: how to configure a DFLL and switch the main clock to the DFLL output and do a generic clock configuration.

    EXAMPLE2: how to use the RC120M internal oscillator as main clock source and do a Generic clock configuration.

     

    UC3C

    The driver is composed of pm_uc3c.c and pm_uc3c.h.

     

    This driver provides interfaces for PM main hardware features:

  • main clock source setup,
  • clock domains setup,
  • peripheral modules setup,
  • Sleep modes setup,
  • reset,
  • PM interrupts setup.

     

    Two examples are available:

    EXAMPLE1: how to configure the Power Manager to use Oscillator 0 as source of main clock, generic clock configuration and switch to a sleep mode

    EXAMPLE2: how to configure a PLL and switch the main clock to PLL output and do a generic clock configuration.

     

    The file power_clocks_lib.c (and power_clocks_lib.h) provides functions to abstract features such as oscillators/pll/dfll configuration, clock configuration, System-sensible parameters configuration, buses clocks configuration, sleep mode, reset.


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