Data Structures

Here are the data structures with brief descriptions:
scif_dfll_closedloop_conf_tDFLL closed-loop mode settings
scif_dfll_openloop_conf_tDFLL open-loop mode settings
scif_dfll_ssg_conf_tDFLL SSG settings
scif_gclk_opt_tGeneric clock generation settings
scif_osc32_opt_tOSC32 startup options
scif_osc_opt_tOSC0/OSC1 startup options
scif_pll_opt_tPLL0/PLL1 startup options
u_avr32_scif_dfll0conf_t
u_avr32_scif_dfll0ssg_t
u_avr32_scif_oscctrl0_t
u_avr32_scif_oscctrl32_t
u_avr32_scif_oscctrl_t
u_avr32_scif_pll_t

Generated on Fri Feb 19 02:26:21 2010 for AVR32 UC3 - SCIF Driver Example 1 by  doxygen 1.5.5