This file defines a useful set of functions for the MACB interface on AVR32 devices.
Definition in file macb.c.
#include <stdio.h>
#include <string.h>
#include <avr32/io.h>
#include "compiler.h"
#include "gpio.h"
#include "macb.h"
#include "conf_eth.h"
#include "intc.h"
Go to the source code of this file.
Defines | |
#define | ADDRESS_MASK ( ( unsigned long ) 0xFFFFFFFC ) |
#define | BUFFER_WAIT_DELAY ( 2 ) |
#define | portENTER_CRITICAL Disable_global_interrupt |
#define | portENTER_SWITCHING_ISR() |
#define | portEXIT_CRITICAL Enable_global_interrupt |
#define | portEXIT_SWITCHING_ISR() |
#define | RX_BUFFER_SIZE 128 |
#define | RX_WRAP_BIT ( ( unsigned long ) 0x02 ) |
Functions | |
long | lMACBSend (volatile avr32_macb_t *macb, const void *pvFrom, unsigned long ulLength, long lEndOfFrame) |
Send ulLength bytes from pcFrom. | |
static long | prvMACB_ISR_NonNakedBehaviour (void) |
static long | prvPHY_ISR_NonNakedBehaviour (void) |
static Bool | prvProbePHY (volatile avr32_macb_t *macb) |
static void | prvSetupDescriptors (volatile avr32_macb_t *macb) |
static void | prvSetupMACAddress (volatile avr32_macb_t *macb) |
static void | prvSetupMACBInterrupt (volatile avr32_macb_t *macb) |
unsigned long | ulMACBInputLength (void) |
Function to get length of the next frame in the receive buffers. | |
static unsigned long | ulReadMDIO (volatile avr32_macb_t *macb, unsigned short usAddress) |
void | vClearMACBTxBuffer (void) |
Called by the Tx interrupt, this function traverses the buffers used to hold the frame that has just completed transmission and marks each as free again. | |
void | vDisableMACBOperations (volatile avr32_macb_t *macb) |
Disable MACB operations (Tx and Rx). | |
void | vMACB_ISR (void) |
void | vMACBFlushCurrentPacket (unsigned long ulTotalFrameLength) |
Flush the current received packet. | |
void | vMACBRead (void *pvTo, unsigned long ulSectionLength, unsigned long ulTotalFrameLength) |
Frames can be read from the MACB in multiple sections. | |
void | vMACBSetMACAddress (const unsigned char *MACAddress) |
Set the MACB Physical address (SA1B & SA1T registers). | |
void | vMACBWaitForInput (unsigned long ulTimeOut) |
Suspend on a semaphore waiting either for the semaphore to be obtained or a timeout. | |
void | vPHY_ISR (void) |
static void | vResetMacbRxFrames (void) |
Restore ownership of all Rx buffers to the MACB. | |
static void | vWriteMDIO (volatile avr32_macb_t *macb, unsigned short usAddress, unsigned short usValue) |
Bool | xMACBInit (volatile avr32_macb_t *macb) |
Initialise the MACB driver. | |
Variables | |
unsigned char | cMACAddress [6] = { ETHERNET_CONF_ETHADDR0,ETHERNET_CONF_ETHADDR1,ETHERNET_CONF_ETHADDR2,ETHERNET_CONF_ETHADDR3,ETHERNET_CONF_ETHADDR4,ETHERNET_CONF_ETHADDR5 } |
static volatile Bool | DataToRead = FALSE |
static volatile char | pcRxBuffer [ETHERNET_CONF_NB_RX_BUFFERS *RX_BUFFER_SIZE] |
static volatile char | pcTxBuffer [ETHERNET_CONF_NB_TX_BUFFERS *ETHERNET_CONF_TX_BUFFER_SIZE] |
volatile unsigned long | ulNextRxBuffer = 0 |
static volatile AVR32_RxTdDescriptor | xRxDescriptors [ETHERNET_CONF_NB_RX_BUFFERS] |
static volatile AVR32_TxTdDescriptor | xTxDescriptors [ETHERNET_CONF_NB_TX_BUFFERS] |
#define ADDRESS_MASK ( ( unsigned long ) 0xFFFFFFFC ) |
#define BUFFER_WAIT_DELAY ( 2 ) |
#define portENTER_CRITICAL Disable_global_interrupt |
Definition at line 86 of file macb.c.
Referenced by lMACBSend(), prvMACB_ISR_NonNakedBehaviour(), vMACBWaitForInput(), and xMACBInit().
#define portENTER_SWITCHING_ISR | ( | ) |
#define portEXIT_CRITICAL Enable_global_interrupt |
Definition at line 87 of file macb.c.
Referenced by lMACBSend(), prvMACB_ISR_NonNakedBehaviour(), vMACBWaitForInput(), and xMACBInit().
#define portEXIT_SWITCHING_ISR | ( | ) |
#define RX_BUFFER_SIZE 128 |
Definition at line 69 of file macb.c.
Referenced by prvSetupDescriptors(), vMACBFlushCurrentPacket(), and vMACBRead().
#define RX_WRAP_BIT ( ( unsigned long ) 0x02 ) |
long lMACBSend | ( | volatile avr32_macb_t * | macb, | |
const void * | pvFrom, | |||
unsigned long | ulLength, | |||
long | lEndOfFrame | |||
) |
Send ulLength bytes from pcFrom.
This copies the buffer to one of the MACB Tx buffers, then indicates to the MACB that the buffer is ready. If lEndOfFrame is true then the data being copied is the end of the frame and the frame can be transmitted.
*macb | Base address of the MACB | |
*pvFrom | Address of the data buffer | |
ulLength | Length of the frame | |
lEndOfFrame | Flag for End Of Frame |
Definition at line 210 of file macb.c.
References AVR32_LAST_BUFFER, AVR32_LENGTH_FRAME, AVR32_TRANSMIT_OK, AVR32_TRANSMIT_WRAP, BUFFER_WAIT_DELAY, ETHERNET_CONF_NB_TX_BUFFERS, ETHERNET_CONF_TX_BUFFER_SIZE, portENTER_CRITICAL, portEXIT_CRITICAL, _AVR32_TxTdDescriptor::status, and _AVR32_TxTdDescriptor::U_Status.
Referenced by macb_example_receive_packet(), macb_example_send_ARP_request(), and macb_example_send_ping_response().
00211 { 00212 const unsigned char *pcFrom = pvFrom; 00213 static unsigned long uxTxBufferIndex = 0; 00214 void *pcBuffer; 00215 unsigned long ulLastBuffer, ulDataBuffered = 0, ulDataRemainingToSend, ulLengthToSend; 00216 00217 /* If the length of data to be transmitted is greater than each individual 00218 transmit buffer then the data will be split into more than one buffer. 00219 Loop until the entire length has been buffered. */ 00220 while( ulDataBuffered < ulLength ) 00221 { 00222 // Is a buffer available ? 00223 while( !( xTxDescriptors[ uxTxBufferIndex ].U_Status.status & AVR32_TRANSMIT_OK ) ) 00224 { 00225 // There is no room to write the Tx data to the Tx buffer. 00226 // Wait a short while, then try again. 00227 #ifdef FREERTOS_USED 00228 vTaskDelay( BUFFER_WAIT_DELAY ); 00229 #else 00230 __asm__ __volatile__ ("nop"); 00231 #endif 00232 } 00233 00234 portENTER_CRITICAL(); 00235 { 00236 // Get the address of the buffer from the descriptor, 00237 // then copy the data into the buffer. 00238 pcBuffer = ( void * ) xTxDescriptors[ uxTxBufferIndex ].addr; 00239 00240 // How much can we write to the buffer ? 00241 ulDataRemainingToSend = ulLength - ulDataBuffered; 00242 if( ulDataRemainingToSend <= ETHERNET_CONF_TX_BUFFER_SIZE ) 00243 { 00244 // We can write all the remaining bytes. 00245 ulLengthToSend = ulDataRemainingToSend; 00246 } 00247 else 00248 { 00249 // We can't write more than ETH_TX_BUFFER_SIZE in one go. 00250 ulLengthToSend = ETHERNET_CONF_TX_BUFFER_SIZE; 00251 } 00252 // Copy the data into the buffer. 00253 memcpy( pcBuffer, &( pcFrom[ ulDataBuffered ] ), ulLengthToSend ); 00254 ulDataBuffered += ulLengthToSend; 00255 // Is this the last data for the frame ? 00256 if( lEndOfFrame && ( ulDataBuffered >= ulLength ) ) 00257 { 00258 // No more data remains for this frame so we can start the transmission. 00259 ulLastBuffer = AVR32_LAST_BUFFER; 00260 } 00261 else 00262 { 00263 // More data to come for this frame. 00264 ulLastBuffer = 0; 00265 } 00266 // Fill out the necessary in the descriptor to get the data sent, 00267 // then move to the next descriptor, wrapping if necessary. 00268 if( uxTxBufferIndex >= ( ETHERNET_CONF_NB_TX_BUFFERS - 1 ) ) 00269 { 00270 xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME ) 00271 | ulLastBuffer 00272 | AVR32_TRANSMIT_WRAP; 00273 uxTxBufferIndex = 0; 00274 } 00275 else 00276 { 00277 xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME ) 00278 | ulLastBuffer; 00279 uxTxBufferIndex++; 00280 } 00281 /* If this is the last buffer to be sent for this frame we can 00282 start the transmission. */ 00283 if( ulLastBuffer ) 00284 { 00285 macb->ncr |= AVR32_MACB_TSTART_MASK; 00286 } 00287 } 00288 portEXIT_CRITICAL(); 00289 } 00290 00291 return PASS; 00292 }
static long prvMACB_ISR_NonNakedBehaviour | ( | void | ) | [static] |
Definition at line 1026 of file macb.c.
References portENTER_CRITICAL, portEXIT_CRITICAL, and vClearMACBTxBuffer().
Referenced by vMACB_ISR().
01027 { 01028 // Variable definitions can be made now. 01029 volatile unsigned long ulIntStatus, ulEventStatus; 01030 long xSwitchRequired = FALSE; 01031 01032 // Find the cause of the interrupt. 01033 ulIntStatus = AVR32_MACB.isr; 01034 ulEventStatus = AVR32_MACB.rsr; 01035 01036 if( ( ulIntStatus & AVR32_MACB_IDR_RCOMP_MASK ) || ( ulEventStatus & AVR32_MACB_REC_MASK ) ) 01037 { 01038 // A frame has been received, signal the IP task so it can process 01039 // the Rx descriptors. 01040 portENTER_CRITICAL(); 01041 #ifdef FREERTOS_USED 01042 xSemaphoreGiveFromISR( xSemaphore, &xSwitchRequired ); 01043 #else 01044 DataToRead = TRUE; 01045 #endif 01046 portEXIT_CRITICAL(); 01047 AVR32_MACB.rsr = AVR32_MACB_REC_MASK; // Clear 01048 AVR32_MACB.rsr; // Read to force the previous write 01049 } 01050 01051 if( ulIntStatus & AVR32_MACB_TCOMP_MASK ) 01052 { 01053 // A frame has been transmitted. Mark all the buffers used by the 01054 // frame just transmitted as free again. 01055 vClearMACBTxBuffer(); 01056 AVR32_MACB.tsr = AVR32_MACB_TSR_COMP_MASK; // Clear 01057 AVR32_MACB.tsr; // Read to force the previous write 01058 } 01059 01060 return ( xSwitchRequired ); 01061 }
static long prvPHY_ISR_NonNakedBehaviour | ( | void | ) | [static] |
Definition at line 1103 of file macb.c.
References PHY_BMSR, PHY_MISR, and ulReadMDIO().
Referenced by vPHY_ISR().
01104 { 01105 // Variable definitions can be made now. 01106 volatile unsigned long ulIntStatus, ulEventStatus; 01107 long xSwitchRequired = FALSE; 01108 volatile avr32_gpio_t *gpio = &AVR32_GPIO; 01109 volatile avr32_gpio_port_t *gpio_port = &gpio->port[MACB_INTERRUPT_PIN/32]; 01110 01111 // read Phy Interrupt register Status 01112 ulIntStatus = ulReadMDIO(&AVR32_MACB, PHY_MISR); 01113 01114 // read Phy status register 01115 ulEventStatus = ulReadMDIO(&AVR32_MACB, PHY_BMSR); 01116 // dummy read 01117 ulEventStatus = ulReadMDIO(&AVR32_MACB, PHY_BMSR); 01118 01119 // clear interrupt flag on GPIO 01120 gpio_port->ifrc = 1 << (MACB_INTERRUPT_PIN%32); 01121 01122 return ( xSwitchRequired ); 01123 }
static Bool prvProbePHY | ( | volatile avr32_macb_t * | macb | ) | [static] |
Definition at line 823 of file macb.c.
References ADVERTISE_100FULL, ADVERTISE_100HALF, ADVERTISE_10FULL, ADVERTISE_10HALF, ADVERTISE_ALL, ADVERTISE_CSMA, BMCR_ANENABLE, BMCR_ANRESTART, BMCR_FULLDPLX, BMCR_SPEED100, BMSR_LSTATUS, ETHERNET_CONF_PHY_ID, LPA_100FULL, LPA_100HALF, LPA_10FULL, PHY_ADVERTISE, PHY_BMCR, PHY_BMSR, PHY_LPA, PHY_PHYCR, PHY_PHYSID1, PHY_PHYSID2, PHY_RBR, PHYCR_MDIX_EN, PHYCR_MDIX_FORCE, RBR_RMII, ulReadMDIO(), and vWriteMDIO().
Referenced by xMACBInit().
00824 { 00825 volatile unsigned long mii_status, phy_ctrl; 00826 volatile unsigned long config; 00827 unsigned long upper, lower, mode, advertise, lpa; 00828 volatile unsigned long physID; 00829 00830 // Read Phy Identifier register 1 & 2 00831 lower = ulReadMDIO(macb, PHY_PHYSID2); 00832 upper = ulReadMDIO(macb, PHY_PHYSID1); 00833 // get Phy ID, ignore Revision 00834 physID = ((upper << 16) & 0xFFFF0000) | (lower & 0xFFF0); 00835 // check if it match config 00836 if (physID == ETHERNET_CONF_PHY_ID) 00837 { 00838 // read RBR 00839 mode = ulReadMDIO(macb, PHY_RBR); 00840 // set RMII mode if not done 00841 if ((mode & RBR_RMII) != RBR_RMII) 00842 { 00843 // force RMII flag if strap options are wrong 00844 mode |= RBR_RMII; 00845 vWriteMDIO(macb, PHY_RBR, mode); 00846 } 00847 00848 // set advertise register 00849 #if ETHERNET_CONF_AN_ENABLE == 1 00850 advertise = ADVERTISE_CSMA | ADVERTISE_ALL; 00851 #else 00852 advertise = ADVERTISE_CSMA; 00853 #if ETHERNET_CONF_USE_100MB 00854 #if ETHERNET_CONF_USE_FULL_DUPLEX 00855 advertise |= ADVERTISE_100FULL; 00856 #else 00857 advertise |= ADVERTISE_100HALF; 00858 #endif 00859 #else 00860 #if ETHERNET_CONF_USE_FULL_DUPLEX 00861 advertise |= ADVERTISE_10FULL; 00862 #else 00863 advertise |= ADVERTISE_10HALF; 00864 #endif 00865 #endif 00866 #endif 00867 // write advertise register 00868 vWriteMDIO(macb, PHY_ADVERTISE, advertise); 00869 // read Control register 00870 config = ulReadMDIO(macb, PHY_BMCR); 00871 // read Phy Control register 00872 phy_ctrl = ulReadMDIO(macb, PHY_PHYCR); 00873 #if ETHERNET_CONF_AN_ENABLE 00874 #if ETHERNET_CONF_AUTO_CROSS_ENABLE 00875 // enable Auto MDIX 00876 phy_ctrl |= PHYCR_MDIX_EN; 00877 #else 00878 // disable Auto MDIX 00879 phy_ctrl &= ~PHYCR_MDIX_EN; 00880 #if ETHERNET_CONF_CROSSED_LINK 00881 // force direct link = Use crossed RJ45 cable 00882 phy_ctrl &= ~PHYCR_MDIX_FORCE; 00883 #else 00884 // force crossed link = Use direct RJ45 cable 00885 phy_ctrl |= PHYCR_MDIX_FORCE; 00886 #endif 00887 #endif 00888 // reset auto-negociation capability 00889 config |= (BMCR_ANRESTART | BMCR_ANENABLE); 00890 #else 00891 // disable Auto MDIX 00892 phy_ctrl &= ~PHYCR_MDIX_EN; 00893 #if ETHERNET_CONF_CROSSED_LINK 00894 // force direct link = Use crossed RJ45 cable 00895 phy_ctrl &= ~PHYCR_MDIX_FORCE; 00896 #else 00897 // force crossed link = Use direct RJ45 cable 00898 phy_ctrl |= PHYCR_MDIX_FORCE; 00899 #endif 00900 // clear AN bit 00901 config &= ~BMCR_ANENABLE; 00902 00903 #if ETHERNET_CONF_USE_100MB 00904 config |= BMCR_SPEED100; 00905 #else 00906 config &= ~BMCR_SPEED100; 00907 #endif 00908 #if ETHERNET_CONF_USE_FULL_DUPLEX 00909 config |= BMCR_FULLDPLX; 00910 #else 00911 config &= ~BMCR_FULLDPLX; 00912 #endif 00913 #endif 00914 // update Phy ctrl register 00915 vWriteMDIO(macb, PHY_PHYCR, phy_ctrl); 00916 00917 // update ctrl register 00918 vWriteMDIO(macb, PHY_BMCR, config); 00919 00920 // loop while link status isn't OK 00921 do { 00922 mii_status = ulReadMDIO(macb, PHY_BMSR); 00923 } while (!(mii_status & BMSR_LSTATUS)); 00924 00925 // read the LPA configuration of the PHY 00926 lpa = ulReadMDIO(macb, PHY_LPA); 00927 00928 // read the MACB config register 00929 config = AVR32_MACB.ncfgr; 00930 00931 // if 100MB needed 00932 if ((lpa & advertise) & (LPA_100HALF | LPA_100FULL)) 00933 { 00934 config |= AVR32_MACB_SPD_MASK; 00935 } 00936 else 00937 { 00938 config &= ~(AVR32_MACB_SPD_MASK); 00939 } 00940 00941 // if FULL DUPLEX needed 00942 if ((lpa & advertise) & (LPA_10FULL | LPA_100FULL)) 00943 { 00944 config |= AVR32_MACB_FD_MASK; 00945 } 00946 else 00947 { 00948 config &= ~(AVR32_MACB_FD_MASK); 00949 } 00950 00951 // write the MACB config register 00952 macb->ncfgr = config; 00953 00954 return TRUE; 00955 } 00956 return FALSE; 00957 }
static void prvSetupDescriptors | ( | volatile avr32_macb_t * | macb | ) | [static] |
Definition at line 623 of file macb.c.
References _AVR32_TxTdDescriptor::addr, _AVR32_RxTdDescriptor::addr, AVR32_TRANSMIT_OK, AVR32_TRANSMIT_WRAP, ETHERNET_CONF_NB_RX_BUFFERS, ETHERNET_CONF_NB_TX_BUFFERS, ETHERNET_CONF_TX_BUFFER_SIZE, RX_BUFFER_SIZE, RX_WRAP_BIT, _AVR32_TxTdDescriptor::status, and _AVR32_TxTdDescriptor::U_Status.
Referenced by xMACBInit().
00624 { 00625 unsigned long xIndex; 00626 unsigned long ulAddress; 00627 00628 // Initialise xRxDescriptors descriptor. 00629 for( xIndex = 0; xIndex < ETHERNET_CONF_NB_RX_BUFFERS; ++xIndex ) 00630 { 00631 // Calculate the address of the nth buffer within the array. 00632 ulAddress = ( unsigned long )( pcRxBuffer + ( xIndex * RX_BUFFER_SIZE ) ); 00633 00634 // Write the buffer address into the descriptor. 00635 // The DMA will place the data at this address when this descriptor is being used. 00636 // No need to mask off the bottom bits of the address (these have special meaning 00637 // for the MACB) because pcRxBuffer is 4Bytes-aligned. 00638 xRxDescriptors[ xIndex ].addr = ulAddress; 00639 } 00640 00641 // The last buffer has the wrap bit set so the MACB knows to wrap back 00642 // to the first buffer. 00643 xRxDescriptors[ ETHERNET_CONF_NB_RX_BUFFERS - 1 ].addr |= RX_WRAP_BIT; 00644 00645 // Initialise xTxDescriptors. 00646 for( xIndex = 0; xIndex < ETHERNET_CONF_NB_TX_BUFFERS; ++xIndex ) 00647 { 00648 // Calculate the address of the nth buffer within the array. 00649 ulAddress = ( unsigned long )( pcTxBuffer + ( xIndex * ETHERNET_CONF_TX_BUFFER_SIZE ) ); 00650 00651 // Write the buffer address into the descriptor. 00652 // The DMA will read data from here when the descriptor is being used. 00653 xTxDescriptors[ xIndex ].addr = ulAddress; 00654 xTxDescriptors[ xIndex ].U_Status.status = AVR32_TRANSMIT_OK; 00655 } 00656 00657 // The last buffer has the wrap bit set so the MACB knows to wrap back 00658 // to the first buffer. 00659 xTxDescriptors[ ETHERNET_CONF_NB_TX_BUFFERS - 1 ].U_Status.status = AVR32_TRANSMIT_WRAP | AVR32_TRANSMIT_OK; 00660 00661 // Tell the MACB where to find the descriptors. 00662 macb->rbqp = ( unsigned long )xRxDescriptors; 00663 macb->tbqp = ( unsigned long )xTxDescriptors; 00664 00665 // Do not copy the FCS field of received frames to memory. 00666 macb->ncfgr |= ( AVR32_MACB_NCFGR_DRFCS_MASK ); 00667 00668 }
static void prvSetupMACAddress | ( | volatile avr32_macb_t * | macb | ) | [static] |
Definition at line 706 of file macb.c.
Referenced by xMACBInit().
00707 { 00708 // Must be written SA1L then SA1H. 00709 macb->sa1b = ( ( unsigned long ) cMACAddress[ 3 ] << 24 ) | 00710 ( ( unsigned long ) cMACAddress[ 2 ] << 16 ) | 00711 ( ( unsigned long ) cMACAddress[ 1 ] << 8 ) | 00712 cMACAddress[ 0 ]; 00713 00714 macb->sa1t = ( ( unsigned long ) cMACAddress[ 5 ] << 8 ) | 00715 cMACAddress[ 4 ]; 00716 }
static void prvSetupMACBInterrupt | ( | volatile avr32_macb_t * | macb | ) | [static] |
Definition at line 718 of file macb.c.
References MICR_INTEN, MICR_INTOE, MISR_LINK_INT_EN, PHY_MICR, PHY_MISR, vMACB_ISR(), vPHY_ISR(), and vWriteMDIO().
Referenced by xMACBInit().
00719 { 00720 #ifdef FREERTOS_USED 00721 // Create the semaphore used to trigger the MACB task. 00722 if (xSemaphore == NULL) 00723 { 00724 vSemaphoreCreateBinary( xSemaphore ); 00725 } 00726 #else 00727 // Create the flag used to trigger the MACB polling task. 00728 DataToRead = FALSE; 00729 #endif 00730 00731 00732 #ifdef FREERTOS_USED 00733 if( xSemaphore != NULL) 00734 { 00735 // We start by 'taking' the semaphore so the ISR can 'give' it when the 00736 // first interrupt occurs. 00737 xSemaphoreTake( xSemaphore, 0 ); 00738 #endif 00739 // Setup the interrupt for MACB. 00740 // Register the interrupt handler to the interrupt controller at interrupt level 2 00741 INTC_register_interrupt((__int_handler)&vMACB_ISR, AVR32_MACB_IRQ, AVR32_INTC_INT2); 00742 00743 #if ETHERNET_CONF_USE_PHY_IT == 1 00744 /* GPIO enable interrupt upon rising edge */ 00745 gpio_enable_pin_interrupt(MACB_INTERRUPT_PIN, GPIO_FALLING_EDGE); 00746 // Setup the interrupt for PHY. 00747 // Register the interrupt handler to the interrupt controller at interrupt level 2 00748 INTC_register_interrupt((__int_handler)&vPHY_ISR, (AVR32_GPIO_IRQ_0 + (MACB_INTERRUPT_PIN/8)), AVR32_INTC_INT2); 00749 /* enable interrupts on INT pin */ 00750 vWriteMDIO( macb, PHY_MICR , ( MICR_INTEN | MICR_INTOE )); 00751 /* enable "link change" interrupt for Phy */ 00752 vWriteMDIO( macb, PHY_MISR , MISR_LINK_INT_EN ); 00753 #endif 00754 00755 // We want to interrupt on Rx and Tx events 00756 macb->ier = AVR32_MACB_IER_RCOMP_MASK | AVR32_MACB_IER_TCOMP_MASK; 00757 #ifdef FREERTOS_USED 00758 } 00759 #endif 00760 }
unsigned long ulMACBInputLength | ( | void | ) |
Function to get length of the next frame in the receive buffers.
Definition at line 295 of file macb.c.
References _AVR32_RxTdDescriptor::addr, AVR32_LENGTH_FRAME, AVR32_OWNERSHIP_BIT, AVR32_SOF, ETHERNET_CONF_NB_RX_BUFFERS, _AVR32_RxTdDescriptor::status, _AVR32_RxTdDescriptor::U_Status, and vResetMacbRxFrames().
Referenced by main().
00296 { 00297 register unsigned long ulIndex , ulLength = 0; 00298 unsigned int uiTemp; 00299 volatile unsigned long ulEventStatus; 00300 00301 // Check if the MACB encountered a problem. 00302 ulEventStatus = AVR32_MACB.rsr; 00303 if( ulEventStatus & AVR32_MACB_RSR_BNA_MASK ) 00304 { // MACB couldn't get ownership of a buffer. This could typically 00305 // happen if the total numbers of Rx buffers is tailored too small 00306 // for a noisy network with big frames. 00307 // We might as well restore ownership of all buffers to the MACB to 00308 // restart from a clean state. 00309 vResetMacbRxFrames(); 00310 return( ulLength ); 00311 } 00312 00313 // Skip any fragments. We are looking for the first buffer that contains 00314 // data and has the SOF (start of frame) bit set. 00315 while( ( xRxDescriptors[ ulNextRxBuffer ].addr & AVR32_OWNERSHIP_BIT ) 00316 && !( xRxDescriptors[ ulNextRxBuffer ].U_Status.status & AVR32_SOF ) ) 00317 { 00318 // Ignoring this buffer. Mark it as free again. 00319 uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr; 00320 xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT ); 00321 ulNextRxBuffer++; 00322 if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS ) 00323 { 00324 ulNextRxBuffer = 0; 00325 } 00326 } 00327 00328 // We are going to walk through the descriptors that make up this frame, 00329 // but don't want to alter ulNextRxBuffer as this would prevent vMACBRead() 00330 // from finding the data. Therefore use a copy of ulNextRxBuffer instead. 00331 ulIndex = ulNextRxBuffer; 00332 00333 // Walk through the descriptors until we find the last buffer for this frame. 00334 // The last buffer will give us the length of the entire frame. 00335 while ( xRxDescriptors[ ulIndex ].addr & AVR32_OWNERSHIP_BIT ) 00336 { 00337 ulLength = xRxDescriptors[ ulIndex ].U_Status.status & AVR32_LENGTH_FRAME; 00338 if (ulLength) break; //return ulLength 00339 00340 // Increment to the next buffer, wrapping if necessary. 00341 if( ++ulIndex >= ETHERNET_CONF_NB_RX_BUFFERS ) ulIndex = 0; 00342 00343 // Is the descriptor valid? 00344 if (!(xRxDescriptors[ ulIndex ].addr & AVR32_OWNERSHIP_BIT)) break; //return 0 00345 00346 // Is it a SOF? If so, the head packet is bad and should be discarded 00347 if (xRxDescriptors[ ulIndex ].U_Status.status & AVR32_SOF) 00348 { 00349 // Mark the buffers of the CURRENT, FAULTY packet available. 00350 unsigned int i = ulNextRxBuffer; 00351 do{ 00352 // Ignore the faulty frame. Mark its buffers as owned by the MACB. 00353 uiTemp = xRxDescriptors[ i ].addr; 00354 xRxDescriptors[ i ].addr = uiTemp & ~(AVR32_OWNERSHIP_BIT); 00355 if (++i>=ETHERNET_CONF_NB_RX_BUFFERS) i=0; 00356 }while (i!=ulIndex); 00357 ulNextRxBuffer=ulIndex; 00358 // We have the start of a new packet, look at that one instead. 00359 } 00360 } 00361 return ulLength; 00362 }
static unsigned long ulReadMDIO | ( | volatile avr32_macb_t * | macb, | |
unsigned short | usAddress | |||
) | [static] |
Read a register on MDIO bus (access to the PHY) This function is looping until PHY gets ready
macb | Input. instance of the MACB to use | |
usAddress | Input. register to set. |
Definition at line 770 of file macb.c.
References ETHERNET_CONF_PHY_ADDR.
Referenced by prvPHY_ISR_NonNakedBehaviour(), and prvProbePHY().
00771 { 00772 unsigned long value, status; 00773 00774 // initiate transaction : enable management port 00775 macb->ncr |= AVR32_MACB_NCR_MPE_MASK; 00776 // Write the PHY configuration frame to the MAN register 00777 macb->man = (AVR32_MACB_SOF_MASK & (0x01<<AVR32_MACB_SOF_OFFSET)) // SOF 00778 | (2 << AVR32_MACB_CODE_OFFSET) // Code 00779 | (2 << AVR32_MACB_RW_OFFSET) // Read operation 00780 | ((ETHERNET_CONF_PHY_ADDR & 0x1f) << AVR32_MACB_PHYA_OFFSET) // Phy Add 00781 | (usAddress << AVR32_MACB_REGA_OFFSET); // Reg Add 00782 // wait for PHY to be ready 00783 do { 00784 status = macb->nsr; 00785 } while (!(status & AVR32_MACB_NSR_IDLE_MASK)); 00786 // read the register value in maintenance register 00787 value = macb->man & 0x0000ffff; 00788 // disable management port 00789 macb->ncr &= ~AVR32_MACB_NCR_MPE_MASK; 00790 // return the read value 00791 return (value); 00792 }
void vClearMACBTxBuffer | ( | void | ) |
Called by the Tx interrupt, this function traverses the buffers used to hold the frame that has just completed transmission and marks each as free again.
Definition at line 588 of file macb.c.
References AVR32_LAST_BUFFER, AVR32_TRANSMIT_OK, ETHERNET_CONF_NB_TX_BUFFERS, _AVR32_TxTdDescriptor::status, and _AVR32_TxTdDescriptor::U_Status.
Referenced by prvMACB_ISR_NonNakedBehaviour().
00589 { 00590 static unsigned long uxNextBufferToClear = 0; 00591 00592 // Called on Tx interrupt events to set the AVR32_TRANSMIT_OK bit in each 00593 // Tx buffer within the frame just transmitted. This marks all the buffers 00594 // as available again. 00595 00596 // The first buffer in the frame should have the bit set automatically. */ 00597 if( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_TRANSMIT_OK ) 00598 { 00599 // Loop through the other buffers in the frame. 00600 while( !( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_LAST_BUFFER ) ) 00601 { 00602 uxNextBufferToClear++; 00603 00604 if( uxNextBufferToClear >= ETHERNET_CONF_NB_TX_BUFFERS ) 00605 { 00606 uxNextBufferToClear = 0; 00607 } 00608 00609 xTxDescriptors[ uxNextBufferToClear ].U_Status.status |= AVR32_TRANSMIT_OK; 00610 } 00611 00612 // Start with the next buffer the next time a Tx interrupt is called. 00613 uxNextBufferToClear++; 00614 00615 // Do we need to wrap back to the first buffer? 00616 if( uxNextBufferToClear >= ETHERNET_CONF_NB_TX_BUFFERS ) 00617 { 00618 uxNextBufferToClear = 0; 00619 } 00620 } 00621 }
void vDisableMACBOperations | ( | volatile avr32_macb_t * | macb | ) |
Disable MACB operations (Tx and Rx).
*macb | Base address of the MACB |
Definition at line 567 of file macb.c.
00568 { 00569 Bool global_interrupt_enabled = Is_global_interrupt_enabled(); 00570 #if ETHERNET_CONF_USE_PHY_IT == 1 00571 volatile avr32_gpio_t *gpio = &AVR32_GPIO; 00572 volatile avr32_gpio_port_t *gpio_port = &gpio->port[MACB_INTERRUPT_PIN/32]; 00573 00574 gpio_port->ierc = 1 << (MACB_INTERRUPT_PIN%32); 00575 #endif 00576 00577 // write the MACB control register : disable Tx & Rx 00578 macb->ncr &= ~((1 << AVR32_MACB_RE_OFFSET) | (1 << AVR32_MACB_TE_OFFSET)); 00579 00580 // We no more want to interrupt on Rx and Tx events. 00581 if (global_interrupt_enabled) Disable_global_interrupt(); 00582 macb->idr = AVR32_MACB_IER_RCOMP_MASK | AVR32_MACB_IER_TCOMP_MASK; 00583 macb->isr; 00584 if (global_interrupt_enabled) Enable_global_interrupt(); 00585 }
void vMACB_ISR | ( | void | ) |
Definition at line 1004 of file macb.c.
References portENTER_SWITCHING_ISR, portEXIT_SWITCHING_ISR, and prvMACB_ISR_NonNakedBehaviour().
Referenced by prvSetupMACBInterrupt().
01005 { 01006 // This ISR can cause a context switch, so the first statement must be a 01007 // call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any 01008 // variable declarations. 01009 portENTER_SWITCHING_ISR(); 01010 01011 // the return value is used by FreeRTOS to change the context if needed after rete instruction 01012 // in standalone use, this value should be ignored 01013 prvMACB_ISR_NonNakedBehaviour(); 01014 01015 // Exit the ISR. If a task was woken by either a character being received 01016 // or transmitted then a context switch will occur. 01017 portEXIT_SWITCHING_ISR(); 01018 }
void vMACBFlushCurrentPacket | ( | unsigned long | ulTotalFrameLength | ) |
Flush the current received packet.
ulTotalFrameLength | Length of the packet to flush |
Definition at line 471 of file macb.c.
References _AVR32_RxTdDescriptor::addr, AVR32_OWNERSHIP_BIT, ETHERNET_CONF_NB_RX_BUFFERS, and RX_BUFFER_SIZE.
00472 { 00473 unsigned int uiTemp; 00474 long int lTotalFrameLen = (long int)ulTotalFrameLength; 00475 00476 00477 // Loop until the whole current packet is flushed. 00478 /* do 00479 { 00480 // Ignoring this buffer. Mark it as free again. 00481 uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr; 00482 xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT ); 00483 00484 // Move on to the next buffer. 00485 ulNextRxBuffer++; 00486 ulNextRxBuffer = ulNextRxBuffer%ETHERNET_CONF_NB_RX_BUFFERS; 00487 }while( ( xRxDescriptors[ ulNextRxBuffer ].addr & AVR32_OWNERSHIP_BIT ) 00488 && !( xRxDescriptors[ ulNextRxBuffer ].U_Status.status & AVR32_SOF ) );*/ 00489 while( lTotalFrameLen > 0 ) 00490 { 00491 // Ignoring this buffer. Mark it as free again. 00492 uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr; 00493 xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT ); 00494 00495 // Move on to the next buffer. 00496 ulNextRxBuffer++; 00497 ulNextRxBuffer = ulNextRxBuffer%ETHERNET_CONF_NB_RX_BUFFERS; 00498 00499 lTotalFrameLen -= RX_BUFFER_SIZE; 00500 } 00501 }
void vMACBRead | ( | void * | pvTo, | |
unsigned long | ulSectionLength, | |||
unsigned long | ulTotalFrameLength | |||
) |
Frames can be read from the MACB in multiple sections.
Read ulSectionLength bytes from the MACB receive buffers to pcTo. ulTotalFrameLength is the size of the entire frame. Generally vMACBRead will be repetedly called until the sum of all the ulSectionLenths totals the value of ulTotalFrameLength.
*pvTo | Address of the buffer | |
ulSectionLength | Length of the buffer | |
ulTotalFrameLength | Length of the frame |
Definition at line 365 of file macb.c.
References _AVR32_RxTdDescriptor::addr, ADDRESS_MASK, AVR32_OWNERSHIP_BIT, ETHERNET_CONF_NB_RX_BUFFERS, and RX_BUFFER_SIZE.
Referenced by main().
00366 { 00367 unsigned char *pcTo = pvTo; 00368 static unsigned long ulSectionBytesReadSoFar = 0, ulBufferPosition = 0, ulFrameBytesReadSoFar = 0; 00369 static const unsigned char *pcSource; 00370 register unsigned long ulBytesRemainingInBuffer, ulRemainingSectionBytes; 00371 unsigned int uiTemp; 00372 00373 // Read ulSectionLength bytes from the Rx buffers. 00374 // This is not necessarily any correspondence between the length of our Rx buffers, 00375 // and the length of the data we are returning or the length of the data being requested. 00376 // Therefore, between calls we have to remember not only which buffer we are currently 00377 // processing, but our position within that buffer. 00378 // This would be greatly simplified if PBUF_POOL_BUFSIZE could be guaranteed to be greater 00379 // than the size of each Rx buffer, and that memory fragmentation did not occur. 00380 00381 // This function should only be called after a call to ulMACBInputLength(). 00382 // This will ensure ulNextRxBuffer is set to the correct buffer. */ 00383 00384 // vMACBRead is called with pcTo set to NULL to indicate that we are about 00385 // to read a new frame. Any fragments remaining in the frame we were 00386 // processing during the last call should be dropped. 00387 if( pcTo == NULL ) 00388 { 00389 // How many bytes are indicated as being in this buffer? 00390 // If none then the buffer is completely full and the frame is contained within more 00391 // than one buffer. 00392 // Reset our state variables ready for the next read from this buffer. 00393 pcSource = ( unsigned char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK ); 00394 ulFrameBytesReadSoFar = ( unsigned long ) 0; 00395 ulBufferPosition = ( unsigned long ) 0; 00396 } 00397 else 00398 { 00399 // Loop until we have obtained the required amount of data. 00400 ulSectionBytesReadSoFar = 0; 00401 while( ulSectionBytesReadSoFar < ulSectionLength ) 00402 { 00403 // We may have already read some data from this buffer. 00404 // How much data remains in the buffer? 00405 ulBytesRemainingInBuffer = ( RX_BUFFER_SIZE - ulBufferPosition ); 00406 00407 // How many more bytes do we need to read before we have the 00408 // required amount of data? 00409 ulRemainingSectionBytes = ulSectionLength - ulSectionBytesReadSoFar; 00410 00411 // Do we want more data than remains in the buffer? 00412 if( ulRemainingSectionBytes > ulBytesRemainingInBuffer ) 00413 { 00414 // We want more data than remains in the buffer so we can 00415 // write the remains of the buffer to the destination, then move 00416 // onto the next buffer to get the rest. 00417 memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulBytesRemainingInBuffer ); 00418 ulSectionBytesReadSoFar += ulBytesRemainingInBuffer; 00419 ulFrameBytesReadSoFar += ulBytesRemainingInBuffer; 00420 00421 // Mark the buffer as free again. 00422 uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr; 00423 xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT ); 00424 // Move onto the next buffer. 00425 ulNextRxBuffer++; 00426 00427 if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS ) 00428 { 00429 ulNextRxBuffer = ( unsigned long ) 0; 00430 } 00431 00432 // Reset the variables for the new buffer. 00433 pcSource = ( unsigned char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK ); 00434 ulBufferPosition = ( unsigned long ) 0; 00435 } 00436 else 00437 { 00438 // We have enough data in this buffer to send back. 00439 // Read out enough data and remember how far we read up to. 00440 memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulRemainingSectionBytes ); 00441 00442 // There may be more data in this buffer yet. 00443 // Increment our position in this buffer past the data we have just read. 00444 ulBufferPosition += ulRemainingSectionBytes; 00445 ulSectionBytesReadSoFar += ulRemainingSectionBytes; 00446 ulFrameBytesReadSoFar += ulRemainingSectionBytes; 00447 00448 // Have we now finished with this buffer? 00449 if( ( ulBufferPosition >= RX_BUFFER_SIZE ) || ( ulFrameBytesReadSoFar >= ulTotalFrameLength ) ) 00450 { 00451 // Mark the buffer as free again. 00452 uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr; 00453 xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT ); 00454 // Move onto the next buffer. 00455 ulNextRxBuffer++; 00456 00457 if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS ) 00458 { 00459 ulNextRxBuffer = 0; 00460 } 00461 00462 pcSource = ( unsigned char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK ); 00463 ulBufferPosition = 0; 00464 } 00465 } 00466 } 00467 } 00468 }
void vMACBSetMACAddress | ( | const unsigned char * | MACAddress | ) |
Set the MACB Physical address (SA1B & SA1T registers).
*MACAddress | the MAC address to set. |
Definition at line 505 of file macb.c.
00506 { 00507 memcpy(cMACAddress, MACAddress, sizeof(cMACAddress)); 00508 }
void vMACBWaitForInput | ( | unsigned long | ulTimeOut | ) |
Suspend on a semaphore waiting either for the semaphore to be obtained or a timeout.
The semaphore is used by the MACB ISR to indicate that data has been received and is ready for processing.
ulTimeOut | time to wait for an input |
Definition at line 960 of file macb.c.
References portENTER_CRITICAL, and portEXIT_CRITICAL.
Referenced by main().
00961 { 00962 #ifdef FREERTOS_USED 00963 // Just wait until we are signled from an ISR that data is available, or 00964 // we simply time out. 00965 xSemaphoreTake( xSemaphore, ulTimeOut ); 00966 #else 00967 unsigned long i; 00968 00969 i = ulTimeOut * 1000; 00970 // wait for an interrupt to occurs 00971 do 00972 { 00973 if ( DataToRead == TRUE ) 00974 { 00975 // IT occurs, reset interrupt flag 00976 portENTER_CRITICAL(); 00977 DataToRead = FALSE; 00978 portEXIT_CRITICAL(); 00979 break; 00980 } 00981 i--; 00982 } 00983 while(i != 0); 00984 #endif 00985 }
void vPHY_ISR | ( | void | ) |
Definition at line 1081 of file macb.c.
References portENTER_SWITCHING_ISR, portEXIT_SWITCHING_ISR, and prvPHY_ISR_NonNakedBehaviour().
Referenced by prvSetupMACBInterrupt().
01082 { 01083 // This ISR can cause a context switch, so the first statement must be a 01084 // call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any 01085 // variable declarations. 01086 portENTER_SWITCHING_ISR(); 01087 01088 // the return value is used by FreeRTOS to change the context if needed after rete instruction 01089 // in standalone use, this value should be ignored 01090 prvPHY_ISR_NonNakedBehaviour(); 01091 01092 // Exit the ISR. If a task was woken by either a character being received 01093 // or transmitted then a context switch will occur. 01094 portEXIT_SWITCHING_ISR(); 01095 }
static void vResetMacbRxFrames | ( | void | ) | [static] |
Restore ownership of all Rx buffers to the MACB.
Definition at line 674 of file macb.c.
References _AVR32_RxTdDescriptor::addr, AVR32_OWNERSHIP_BIT, and ETHERNET_CONF_NB_RX_BUFFERS.
Referenced by ulMACBInputLength().
00675 { 00676 register unsigned long ulIndex; 00677 unsigned int uiTemp; 00678 00679 00680 // Disable MACB frame reception. 00681 AVR32_MACB.ncr &= ~(AVR32_MACB_NCR_RE_MASK); 00682 00683 // Restore ownership of all Rx buffers to the MACB. 00684 for( ulIndex = 0; ulIndex < ETHERNET_CONF_NB_RX_BUFFERS; ++ulIndex ) 00685 { 00686 // Mark the buffer as owned by the MACB. 00687 uiTemp = xRxDescriptors[ ulIndex ].addr; 00688 xRxDescriptors[ ulIndex ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT ); 00689 } 00690 00691 // Reset the Buffer-not-available bit and the overrun bit. 00692 AVR32_MACB.rsr = AVR32_MACB_RSR_BNA_MASK | AVR32_MACB_RSR_OVR_MASK; // Clear 00693 AVR32_MACB.rsr; // We read to force the previous operation. 00694 00695 // Reset the MACB starting point. 00696 AVR32_MACB.rbqp = ( unsigned long )xRxDescriptors; 00697 00698 // Reset the index to the next buffer from which data will be read. 00699 ulNextRxBuffer = 0; 00700 00701 // Enable MACB frame reception. 00702 AVR32_MACB.ncr |= AVR32_MACB_NCR_RE_MASK; 00703 }
static void vWriteMDIO | ( | volatile avr32_macb_t * | macb, | |
unsigned short | usAddress, | |||
unsigned short | usValue | |||
) | [static] |
Write a given value to a register on MDIO bus (access to the PHY) This function is looping until PHY gets ready
*macb | Input. instance of the MACB to use | |
usAddress | Input. register to set. | |
usValue | Input. value to write. |
Definition at line 802 of file macb.c.
References ETHERNET_CONF_PHY_ADDR.
Referenced by prvProbePHY(), and prvSetupMACBInterrupt().
00803 { 00804 unsigned long status; 00805 00806 // initiate transaction : enable management port 00807 macb->ncr |= AVR32_MACB_NCR_MPE_MASK; 00808 // Write the PHY configuration frame to the MAN register 00809 macb->man = (( AVR32_MACB_SOF_MASK & (0x01<<AVR32_MACB_SOF_OFFSET)) // SOF 00810 | (2 << AVR32_MACB_CODE_OFFSET) // Code 00811 | (1 << AVR32_MACB_RW_OFFSET) // Write operation 00812 | ((ETHERNET_CONF_PHY_ADDR & 0x1f) << AVR32_MACB_PHYA_OFFSET) // Phy Add 00813 | (usAddress << AVR32_MACB_REGA_OFFSET)) // Reg Add 00814 | (usValue & 0xffff); // Data 00815 // wait for PHY to be ready 00816 do { 00817 status = macb->nsr; 00818 } while (!(status & AVR32_MACB_NSR_IDLE_MASK)); 00819 // disable management port 00820 macb->ncr &= ~AVR32_MACB_NCR_MPE_MASK; 00821 }
Bool xMACBInit | ( | volatile avr32_macb_t * | macb | ) |
Initialise the MACB driver.
*macb | Base address of the MACB |
Definition at line 510 of file macb.c.
References portENTER_CRITICAL, portEXIT_CRITICAL, prvProbePHY(), prvSetupDescriptors(), prvSetupMACAddress(), and prvSetupMACBInterrupt().
Referenced by main().
00511 { 00512 Bool global_interrupt_enabled = Is_global_interrupt_enabled(); 00513 volatile unsigned long status; 00514 00515 // set up registers 00516 macb->ncr = 0; 00517 macb->tsr = ~0UL; 00518 macb->rsr = ~0UL; 00519 00520 if (global_interrupt_enabled) Disable_global_interrupt(); 00521 macb->idr = ~0UL; 00522 status = macb->isr; 00523 if (global_interrupt_enabled) Enable_global_interrupt(); 00524 00525 #if ETHERNET_CONF_USE_RMII_INTERFACE 00526 // RMII used, set 0 to the USRIO Register 00527 macb->usrio &= ~AVR32_MACB_RMII_MASK; 00528 #else 00529 // RMII not used, set 1 to the USRIO Register 00530 macb->usrio |= AVR32_MACB_RMII_MASK; 00531 #endif 00532 00533 // Load our MAC address into the MACB. 00534 prvSetupMACAddress(macb); 00535 00536 // Setup the buffers and descriptors. 00537 prvSetupDescriptors(macb); 00538 00539 #if ETHERNET_CONF_SYSTEM_CLOCK <= 20000000 00540 macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV8 << AVR32_MACB_NCFGR_CLK_OFFSET); 00541 #elif ETHERNET_CONF_SYSTEM_CLOCK <= 40000000 00542 macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV16 << AVR32_MACB_NCFGR_CLK_OFFSET); 00543 #elif ETHERNET_CONF_SYSTEM_CLOCK <= 80000000 00544 macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV32 << AVR32_MACB_NCFGR_CLK_OFFSET; 00545 #elif ETHERNET_CONF_SYSTEM_CLOCK <= 160000000 00546 macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV64 << AVR32_MACB_NCFGR_CLK_OFFSET; 00547 #else 00548 # error System clock too fast 00549 #endif 00550 00551 // Are we connected? 00552 if( prvProbePHY(macb) == TRUE ) 00553 { 00554 // Enable the interrupt! 00555 portENTER_CRITICAL(); 00556 { 00557 prvSetupMACBInterrupt(macb); 00558 } 00559 portEXIT_CRITICAL(); 00560 // Enable Rx and Tx, plus the stats register. 00561 macb->ncr = AVR32_MACB_NCR_TE_MASK | AVR32_MACB_NCR_RE_MASK; 00562 return (TRUE); 00563 } 00564 return (FALSE); 00565 }
unsigned char cMACAddress[6] = { ETHERNET_CONF_ETHADDR0,ETHERNET_CONF_ETHADDR1,ETHERNET_CONF_ETHADDR2,ETHERNET_CONF_ETHADDR3,ETHERNET_CONF_ETHADDR4,ETHERNET_CONF_ETHADDR5 } |
volatile Bool DataToRead = FALSE [static] |
volatile char pcRxBuffer[ETHERNET_CONF_NB_RX_BUFFERS *RX_BUFFER_SIZE] [static] |
volatile char pcTxBuffer[ETHERNET_CONF_NB_TX_BUFFERS *ETHERNET_CONF_TX_BUFFER_SIZE] [static] |
volatile unsigned long ulNextRxBuffer = 0 |
volatile AVR32_RxTdDescriptor xRxDescriptors[ETHERNET_CONF_NB_RX_BUFFERS] [static] |
volatile AVR32_TxTdDescriptor xTxDescriptors[ETHERNET_CONF_NB_TX_BUFFERS] [static] |