Definition in file sd_mmc_mci.c.
#include "conf_access.h"
#include <stdio.h>
#include "gpio.h"
#include "mci.h"
#include "conf_sd_mmc_mci.h"
#include "sd_mmc_mci.h"
#include "cycle_counter.h"
#include "usb_drv.h"
#include "scsi_decoder.h"
Go to the source code of this file.
Defines | |
#define | SDMMC_SWITCH_FUNC_G1_KEEP (0xf << 0) |
#define | SDMMC_SWITCH_FUNC_G2_KEEP (0xf << 4) |
#define | SDMMC_SWITCH_FUNC_G3_KEEP (0xf << 8) |
#define | SDMMC_SWITCH_FUNC_G4_KEEP (0xf << 12) |
#define | SDMMC_SWITCH_FUNC_G5_KEEP (0xf << 16) |
#define | SDMMC_SWITCH_FUNC_G6_KEEP (0xf << 20) |
#define | SDMMC_SWITCH_FUNC_HIGH_SPEED (1 << 0) |
#define | SDMMC_SWITCH_FUNC_MODE_CHECK (0 << 31) |
#define | SDMMC_SWITCH_FUNC_MODE_SWITCH (1 << 31) |
Functions | |
static void | dma_mci_2_ram (void *ram, size_t size) |
static void | dma_ram_2_mci (const void *ram, size_t size) |
static void | dma_ram_2_usb (const void *ram, size_t size) |
static void | dma_usb_2_ram (void *ram, size_t size) |
static Bool | is_dma_mci_2_ram_complete (void) |
static Bool | is_dma_ram_2_mci_complete (void) |
static Bool | is_dma_ram_2_usb_complete (void) |
static Bool | is_dma_usb_2_ram_complete (void) |
Bool | is_sd_mmc_mci_card_present (U8 slot) |
Performs a card check presence. | |
Bool | is_sd_mmc_mci_card_protected (U8 slot) |
Performs a card check protection. | |
Bool | sd_mmc_get_ext_csd (U8 slot) |
Bool | sd_mmc_mci_card_init (U8 slot) |
Initializes the SD/MMC card. | |
Bool | sd_mmc_mci_cmd_send_status (U8 slot) |
ask mmc status register. | |
Bool | sd_mmc_mci_dma_read_multiple_sector_2_ram (U8 slot, void *ram, U32 nb_sector) |
Reads nb_sector SD/MMC sector to a RAM buffer, using the DMA. | |
Bool | sd_mmc_mci_dma_read_open (U8 slot, U32 pos, void *ram, U16 nb_sector) |
Opens a DF memory in read mode at a given sector. DMA will be used. | |
Bool | sd_mmc_mci_dma_read_sector_2_ram (U8 slot, void *ram) |
Reads 1 SD/MMC sector to a RAM buffer, using the DMA. | |
Bool | sd_mmc_mci_dma_write_multiple_sector_from_ram (U8 slot, const void *ram, U32 nb_sector) |
Writes nb_sector SD/MMC sector from a RAM buffer, using the DMA. | |
Bool | sd_mmc_mci_dma_write_open (U8 slot, U32 pos, const void *ram, U16 nb_sector) |
This function opens a DF memory in write mode at a given sector. DMA will be used. | |
Bool | sd_mmc_mci_dma_write_sector_from_ram (U8 slot, const void *ram) |
Writes 1 SD/MMC sector from a RAM buffer, using the DMA. | |
Bool | sd_mmc_mci_get_csd (U8 slot) |
Bool | sd_mmc_mci_init (const mci_options_t *mci_opt, long pbb_hz, long cpu_hz) |
Initializes the MCI driver. | |
Bool | sd_mmc_mci_mem_check (U8 slot) |
Performs a memory check. | |
Bool | sd_mmc_mci_read_close (U8 slot) |
Unselects the current DF memory. | |
Bool | sd_mmc_mci_read_multiple_sector (U8 slot, U16 nb_sector) |
Reads nb_sector sectors from DF memory. | |
Bool | sd_mmc_mci_read_multiple_sector_2_ram (U8 slot, void *ram, U32 nb_sector) |
Reads nb_sector SD/MMC sector to a RAM buffer. | |
Bool | sd_mmc_mci_read_open (U8 slot, U32 pos, U16 nb_sector) |
Opens a DF memory in read mode at a given sector. | |
Bool | sd_mmc_mci_read_sector_2_ram (U8 slot, void *ram) |
Reads 1 SD/MMC sector to a RAM buffer. | |
Bool | sd_mmc_mci_write_close (U8 slot) |
Fills the end of the current logical sector and launches page programming. | |
Bool | sd_mmc_mci_write_multiple_sector (U8 slot, U16 nb_sector) |
Writes nb_sector sectors to SD/MMC memory. | |
Bool | sd_mmc_mci_write_multiple_sector_from_ram (U8 slot, const void *ram, U32 nb_sector) |
Writes nb_sector SD/MMC sector from a RAM buffer. | |
Bool | sd_mmc_mci_write_open (U8 slot, U32 pos, U16 nb_sector) |
This function opens a DF memory in write mode at a given sector. | |
Bool | sd_mmc_mci_write_sector_from_ram (U8 slot, const void *ram) |
Writes 1 SD/MMC sector from a RAM buffer. | |
Bool | sd_mmc_set_block_len (U8 slot, U16 length) |
Variables | |
U32 | g_cpu_hz = 0 |
U32 | g_pbb_hz = 0 |
U16 | g_u16_card_freq [MCI_NR_SLOTS] |
U32 | g_u32_card_rca [MCI_NR_SLOTS] |
U32 | g_u32_card_size [MCI_NR_SLOTS] |
SD/MMC Card Size per Slot. | |
U8 | g_u8_card_bus_width [MCI_NR_SLOTS] |
U8 | g_u8_card_type [MCI_NR_SLOTS] |
volatile U32 | gl_ptr_mem [MCI_NR_SLOTS] = {0, 0} |
volatile avr32_mci_t * | mci = &AVR32_MCI |
Bool | sd_mmc_mci_init_done [MCI_NR_SLOTS] = {FALSE, FALSE} |
Initialization sequence status per Slot. | |
U8 | sector_buf_0 [SD_MMC_SECTOR_SIZE] |
U8 | sector_buf_1 [SD_MMC_SECTOR_SIZE] |
#define SDMMC_SWITCH_FUNC_G1_KEEP (0xf << 0) |
#define SDMMC_SWITCH_FUNC_G2_KEEP (0xf << 4) |
Referenced by sd_mmc_mci_card_init().
#define SDMMC_SWITCH_FUNC_G3_KEEP (0xf << 8) |
Referenced by sd_mmc_mci_card_init().
#define SDMMC_SWITCH_FUNC_G4_KEEP (0xf << 12) |
Referenced by sd_mmc_mci_card_init().
#define SDMMC_SWITCH_FUNC_G5_KEEP (0xf << 16) |
Referenced by sd_mmc_mci_card_init().
#define SDMMC_SWITCH_FUNC_G6_KEEP (0xf << 20) |
Referenced by sd_mmc_mci_card_init().
#define SDMMC_SWITCH_FUNC_HIGH_SPEED (1 << 0) |
Referenced by sd_mmc_mci_card_init().
#define SDMMC_SWITCH_FUNC_MODE_CHECK (0 << 31) |
Referenced by sd_mmc_mci_card_init().
#define SDMMC_SWITCH_FUNC_MODE_SWITCH (1 << 31) |
Referenced by sd_mmc_mci_card_init().
static void dma_mci_2_ram | ( | void * | ram, | |
size_t | size | |||
) | [static] |
Definition at line 805 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_read_multiple_sector().
00806 { 00807 int *pRam = ram; 00808 00809 // Src Address: the MCI registers. 00810 AVR32_DMACA.sar1 = (U32)&AVR32_MCI.fifo; 00811 00812 // Dst Address: the OutputData[] array. 00813 AVR32_DMACA.dar1 = (unsigned long)pRam; 00814 00815 // Channel 1 Ctrl register high 00816 AVR32_DMACA.ctl1h = 00817 ( (size/4) << AVR32_DMACA_CTL1H_BLOCK_TS_OFFSET) // Block transfer size 00818 ; 00819 00820 // Enable Channel 1 : start the process. 00821 AVR32_DMACA.chenreg = ((2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET) | (2<<AVR32_DMACA_CHENREG_CH_EN_WE_OFFSET)); 00822 }
static void dma_ram_2_mci | ( | const void * | ram, | |
size_t | size | |||
) | [static] |
Definition at line 975 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_write_multiple_sector().
00976 { 00977 const unsigned int *pRam = ram; 00978 00979 // Dst Address: the OutputData[] array. 00980 AVR32_DMACA.sar1 = (unsigned long)pRam; 00981 00982 // Src Address: the MCI registers. 00983 AVR32_DMACA.dar1 = (U32)&AVR32_MCI.fifo; 00984 00985 // Channel 1 Ctrl register high 00986 AVR32_DMACA.ctl1h = 00987 ( (size/4) << AVR32_DMACA_CTL1H_BLOCK_TS_OFFSET) // Block transfer size 00988 ; 00989 00990 // Enable Channel 1 : start the process. 00991 AVR32_DMACA.chenreg = ((2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET) | (2<<AVR32_DMACA_CHENREG_CH_EN_WE_OFFSET)); 00992 }
static void dma_ram_2_usb | ( | const void * | ram, | |
size_t | size | |||
) | [static] |
Definition at line 782 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_read_multiple_sector().
00783 { 00784 AVR32_USBB_UDDMAX_nextdesc(g_scsi_ep_ms_in) = (U32)NULL; 00785 AVR32_USBB_UDDMAX_addr(g_scsi_ep_ms_in) = (U32)ram; 00786 AVR32_USBB_UDDMAX_control(g_scsi_ep_ms_in) = ((size << AVR32_USBB_UXDMAX_CONTROL_CH_BYTE_LENGTH_OFFSET) 00787 & AVR32_USBB_UXDMAX_CONTROL_CH_BYTE_LENGTH_MASK) 00788 //| AVR32_USBB_UXDMAX_CONTROL_BURST_LOCK_EN_MASK 00789 //| AVR32_USBB_UXDMAX_CONTROL_DMAEND_EN_MASK 00790 //| AVR32_USBB_UXDMAX_CONTROL_BUFF_CLOSE_IN_EN_MASK 00791 | AVR32_USBB_UXDMAX_CONTROL_CH_EN_MASK; 00792 00793 // Workaround for bug 3501. 00794 (void)AVR32_USBB_UDDMAX_control(g_scsi_ep_ms_in); 00795 }
static void dma_usb_2_ram | ( | void * | ram, | |
size_t | size | |||
) | [static] |
Definition at line 952 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_write_multiple_sector().
00953 { 00954 AVR32_USBB_UDDMAX_nextdesc(g_scsi_ep_ms_out) = (U32)NULL; 00955 AVR32_USBB_UDDMAX_addr(g_scsi_ep_ms_out) = (U32)ram; 00956 AVR32_USBB_UDDMAX_control(g_scsi_ep_ms_out) = ((size << AVR32_USBB_UXDMAX_CONTROL_CH_BYTE_LENGTH_OFFSET) 00957 & AVR32_USBB_UXDMAX_CONTROL_CH_BYTE_LENGTH_MASK) 00958 //| AVR32_USBB_UXDMAX_CONTROL_BURST_LOCK_EN_MASK 00959 //| AVR32_USBB_UXDMAX_CONTROL_DMAEND_EN_MASK 00960 //| AVR32_USBB_UXDMAX_CONTROL_BUFF_CLOSE_IN_EN_MASK 00961 | AVR32_USBB_UXDMAX_CONTROL_CH_EN_MASK; 00962 00963 // Workaround for bug 3501. 00964 (void)AVR32_USBB_UDDMAX_control(g_scsi_ep_ms_out); 00965 }
static Bool is_dma_mci_2_ram_complete | ( | void | ) | [static] |
Definition at line 824 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_read_multiple_sector().
00825 { 00826 // Wait for the end of the AES->RAM transfer (channel 1). 00827 if (AVR32_DMACA.chenreg & (2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET)) 00828 return FALSE; 00829 00830 return TRUE; 00831 }
static Bool is_dma_ram_2_mci_complete | ( | void | ) | [static] |
Definition at line 994 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_write_multiple_sector().
00995 { 00996 // Wait for the end of the AES->RAM transfer (channel 1). 00997 if (AVR32_DMACA.chenreg & (2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET)) 00998 return FALSE; 00999 01000 return TRUE; 01001 }
static Bool is_dma_ram_2_usb_complete | ( | void | ) | [static] |
Definition at line 797 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_read_multiple_sector().
00798 { 00799 if(AVR32_USBB_UDDMAX_status(g_scsi_ep_ms_in) & AVR32_USBB_UXDMAX_STATUS_CH_EN_MASK) 00800 return FALSE; 00801 else 00802 return TRUE; 00803 }
static Bool is_dma_usb_2_ram_complete | ( | void | ) | [static] |
Definition at line 967 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_write_multiple_sector().
00968 { 00969 if(AVR32_USBB_UDDMAX_status(g_scsi_ep_ms_out) & AVR32_USBB_UXDMAX_STATUS_CH_EN_MASK) 00970 return FALSE; 00971 else 00972 return TRUE; 00973 }
Bool is_sd_mmc_mci_card_present | ( | U8 | slot | ) |
Performs a card check presence.
slot | SD/MMC Slot Card Selected. |
TRUE | Card Present | |
FALSE | Card Unpresent. |
Definition at line 126 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_mem_check().
00127 { 00128 if (slot > MCI_LAST_SLOTS) 00129 return FALSE; 00130 00131 switch(slot) 00132 { 00133 case MCI_SLOT_B: 00134 return (gpio_get_pin_value(SD_SLOT_4BITS_CARD_DETECT)==SD_SLOT_4BITS_CARD_DETECT_VALUE); 00135 case MCI_SLOT_A: 00136 return (gpio_get_pin_value(SD_SLOT_8BITS_CARD_DETECT)==SD_SLOT_8BITS_CARD_DETECT_VALUE); 00137 } 00138 00139 return FALSE; 00140 }
Bool is_sd_mmc_mci_card_protected | ( | U8 | slot | ) |
Performs a card check protection.
slot | SD/MMC Slot Card Selected. |
TRUE | Card Protected | |
FALSE | Card Unprotected. |
Definition at line 142 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_wr_protect().
00143 { 00144 if (slot > MCI_LAST_SLOTS) 00145 return FALSE; 00146 00147 switch(slot) 00148 { 00149 case MCI_SLOT_B: 00150 return (gpio_get_pin_value(SD_SLOT_4BITS_WRITE_PROTECT)==SD_SLOT_4BITS_WRITE_PROTECT_VALUE); 00151 case MCI_SLOT_A: 00152 return (gpio_get_pin_value(SD_SLOT_8BITS_WRITE_PROTECT)==SD_SLOT_8BITS_WRITE_PROTECT_VALUE); 00153 } 00154 00155 return FALSE; 00156 }
Bool sd_mmc_get_ext_csd | ( | U8 | slot | ) |
Definition at line 245 of file sd_mmc_mci.c.
References g_u16_card_freq, g_u32_card_size, g_u8_card_bus_width, g_u8_card_type, MMC_CARD_HC, SD_MMC_SECTOR_SIZE, and SD_MMC_SEND_EXT_CSD_CMD.
Referenced by sd_mmc_mci_card_init().
00246 { 00247 U8 i; 00248 U32 val; 00249 00250 if (slot > MCI_LAST_SLOTS) 00251 return FALSE; 00252 // Select Slot card before any other command. 00253 mci_select_card(mci, slot, g_u8_card_bus_width[slot]); 00254 00255 mci_set_block_size(mci, SD_MMC_SECTOR_SIZE); // Ext CSD = 512B size 00256 mci_set_block_count(mci, 1); 00257 00258 //** (CMD8) 00259 // read the extended CSD 00260 if(mci_send_cmd(mci, SD_MMC_SEND_EXT_CSD_CMD, 0 )!=MCI_SUCCESS) 00261 return FALSE; 00262 00263 // READ_EXT_CSD // discard bytes not used 00264 for (i = (512L/8); i!=0; i--) 00265 { 00266 while(!(mci_rx_ready(mci))); 00267 mci_rd_data(mci); 00268 while(!(mci_rx_ready(mci))); 00269 if( ((64-26) == i) && (g_u8_card_type[slot]&MMC_CARD_HC) ) 00270 { 00271 // If MMC HC then read Sector Count 00272 g_u32_card_size[slot] = mci_rd_data(mci); 00273 } 00274 else 00275 { 00276 val = mci_rd_data(mci); 00277 if( (64-24) == i ) 00278 { // Read byte at offset 196 00279 if( MSB0(val) & 0x02 ) 00280 g_u16_card_freq[slot] = 52*1000; 00281 else 00282 g_u16_card_freq[slot] = 26*1000; 00283 } 00284 } 00285 } 00286 00287 return TRUE; 00288 }
Bool sd_mmc_mci_card_init | ( | U8 | slot | ) |
Initializes the SD/MMC card.
slot | Slot number. |
OK | Success. | |
KO | Failure. |
Switch func argument definitions
Definition at line 347 of file sd_mmc_mci.c.
References g_u16_card_freq, g_u32_card_rca, g_u8_card_bus_width, g_u8_card_type, MMC_CARD, MMC_CARD_HC, MMC_CARD_V4, MMC_SWITCH_BUS_WIDTH, MMC_SWITCH_CMD, MMC_SWITCH_CMD_SET, MMC_SWITCH_HIGH_SPEED, MMC_SWITCH_VAL_8BIT, MMC_SWITCH_VAL_HS, MMC_SWITCH_WRITE, MMC_TRAN_STATE, MMC_TRAN_STATE_MSK, OCR_MSK_BUSY, OCR_MSK_HC, OCR_MSK_VOLTAGE_3_2V_3_3V, OCR_MSK_VOLTAGE_ALL, RCA_DEFAULT_ADR, RCA_MSK_ADR, RCA_RESERVE_ADR, SD_BUS_4_BIT, SD_CARD, SD_CARD_HC, SD_CARD_V2, SD_MMC_ALL_SEND_CID_CMD, SD_MMC_APP_CMD, sd_mmc_get_ext_csd(), SD_MMC_GO_IDLE_STATE_CMD, SD_MMC_INIT_STATE_CMD, sd_mmc_mci_cmd_send_status(), sd_mmc_mci_get_csd(), sd_mmc_mci_init_done, SD_MMC_MMC_SEND_OP_COND_CMD, SD_MMC_SD_SEND_IF_COND_CMD, SD_MMC_SDCARD_APP_OP_COND_CMD, SD_MMC_SDCARD_SET_BUS_WIDTH_CMD, SD_MMC_SECTOR_SIZE, SD_MMC_SEL_DESEL_CARD_CMD, sd_mmc_set_block_len(), SD_MMC_SET_RELATIVE_ADDR_CMD, SD_SWITCH_FUNC, SDMMC_SWITCH_FUNC_G2_KEEP, SDMMC_SWITCH_FUNC_G3_KEEP, SDMMC_SWITCH_FUNC_G4_KEEP, SDMMC_SWITCH_FUNC_G5_KEEP, SDMMC_SWITCH_FUNC_G6_KEEP, SDMMC_SWITCH_FUNC_HIGH_SPEED, SDMMC_SWITCH_FUNC_MODE_CHECK, SDMMC_SWITCH_FUNC_MODE_SWITCH, and UNKNOWN_CARD.
Referenced by sd_mmc_mci_init(), and sd_mmc_mci_mem_check().
00348 { 00349 mci_options_t mci_opt; 00350 U32 u32_response; 00351 00352 if (TRUE == sd_mmc_mci_init_done[slot]) 00353 return TRUE; 00354 00355 // Default card is not known. 00356 g_u8_card_type[slot] = UNKNOWN_CARD; 00357 00358 // Default bus size is 1 bit. 00359 g_u8_card_bus_width[slot] = MCI_BUS_SIZE_1_BIT; 00360 00361 // Default card speed and disable High Speed mode. 00362 mci_opt.card_speed = 400000; 00363 mci_opt.card_slot = slot; 00364 mci_init(mci, &mci_opt, g_pbb_hz); 00365 00366 // Wait for 1ms, then wait for 74 more clock cycles (see MMC norms) 00367 if (mci_send_cmd(mci, SD_MMC_INIT_STATE_CMD, 0xFFFFFFFF)!=MCI_SUCCESS) 00368 return FALSE; 00369 00370 //-- (CMD0) 00371 // Set card in idle state 00372 if (mci_send_cmd(mci, SD_MMC_GO_IDLE_STATE_CMD, 0xFFFFFFFF)!=MCI_SUCCESS) 00373 return FALSE; 00374 00375 sd_mmc_init_step1: 00376 // (CMD1) 00377 // To send its Operating Conditions Register contents command only supported by MMC card 00378 if(mci_send_cmd(mci, SD_MMC_MMC_SEND_OP_COND_CMD, OCR_MSK_BUSY|OCR_MSK_VOLTAGE_ALL|OCR_MSK_HC)==MCI_SUCCESS) 00379 { 00380 // MMC cards always respond to MMC_SEND_OP_COND 00381 g_u8_card_type[slot] = MMC_CARD; 00382 u32_response = mci_read_response(mci); 00383 if( !(u32_response & OCR_MSK_BUSY) ) 00384 { 00385 // here card busy, it did not completed its initialization process 00386 // resend command MMC_SEND_OP_COND 00387 goto sd_mmc_init_step1; // loop until it is ready 00388 } 00389 if( 0!=(u32_response & OCR_MSK_HC) ) 00390 { 00391 g_u8_card_type[slot] |= MMC_CARD_HC; 00392 } 00393 } 00394 else 00395 { 00396 // SD cards do not respond to MMC_SEND_OP_COND 00397 g_u8_card_type[slot] = SD_CARD; 00398 00399 //-- (CMD8) 00400 // enables to expand new functionality to some existing commands supported only by SD HC card 00401 if (mci_send_cmd(mci, SD_MMC_SD_SEND_IF_COND_CMD, 0x000001AA)==MCI_SUCCESS) 00402 { 00403 // It is a SD HC 00404 if( 0x000001AA == mci_read_response(mci)) 00405 { 00406 g_u8_card_type[slot] |= SD_CARD_V2; 00407 } 00408 } 00409 00410 sd_mmc_init_step2: 00411 //-- (CMD55) 00412 // Indicates to the card that the next command is an application specific command rather than a standard command 00413 // CMD55 shall always precede ACMD41 00414 if (mci_send_cmd(mci, SD_MMC_APP_CMD, 0)!=MCI_SUCCESS) 00415 return FALSE; 00416 00417 //-- (ACMD41) 00418 // Sends host OCR register 00419 if( SD_CARD_V2 & g_u8_card_type[slot] ) 00420 { 00421 // Sends host capacity support information (HCS) 00422 if (mci_send_cmd(mci, SD_MMC_SDCARD_APP_OP_COND_CMD, OCR_MSK_BUSY|OCR_MSK_VOLTAGE_3_2V_3_3V|OCR_MSK_HC)!=MCI_SUCCESS) 00423 return FALSE; 00424 } 00425 else 00426 { 00427 if (mci_send_cmd(mci, SD_MMC_SDCARD_APP_OP_COND_CMD, OCR_MSK_BUSY|OCR_MSK_VOLTAGE_3_2V_3_3V)!=MCI_SUCCESS) 00428 return FALSE; 00429 } 00430 u32_response = mci_read_response(mci); 00431 00432 if( !(u32_response & OCR_MSK_BUSY) ) 00433 { 00434 // Card Busy, resend ACMD41 precede of CMD55 00435 goto sd_mmc_init_step2; 00436 } 00437 // Card read then check HC type 00438 if (u32_response & OCR_MSK_HC) 00439 { 00440 g_u8_card_type[slot] |= SD_CARD_HC; // Card SD High Capacity 00441 } 00442 } 00443 00444 00445 // Here card ready and type (MMC <V4, MMC V4, MMC HC, SD V1, SD V2 HC) detected 00446 00447 //-- (CMD2) 00448 // Send CID 00449 if (mci_send_cmd(mci, SD_MMC_ALL_SEND_CID_CMD, 0)!=MCI_SUCCESS) 00450 return FALSE; 00451 00452 //-- (CMD3) 00453 // Set relative address 00454 if(MMC_CARD & g_u8_card_type[slot]) 00455 { 00456 // For MMC card, you send an address to card 00457 g_u32_card_rca[slot] = RCA_DEFAULT_ADR; 00458 if(mci_send_cmd(mci, SD_MMC_SET_RELATIVE_ADDR_CMD, RCA_DEFAULT_ADR)!=MCI_SUCCESS) 00459 return FALSE; 00460 } 00461 else 00462 { 00463 // For SD card, you ask an address to card 00464 if(mci_send_cmd(mci, SD_MMC_SET_RELATIVE_ADDR_CMD, RCA_RESERVE_ADR)!=MCI_SUCCESS) 00465 return FALSE; 00466 } 00467 if (SD_CARD & g_u8_card_type[slot]) 00468 { 00469 // For SD card, you receiv address of card 00470 g_u32_card_rca[slot] = mci_read_response(mci) & RCA_MSK_ADR ; 00471 } 00472 00473 00474 //-- (CMD9) 00475 // Read & analyse CSD register 00476 if (sd_mmc_mci_get_csd(slot)!=TRUE) 00477 return FALSE; 00478 00479 00480 //-- (CMD7)-R1b 00481 // select card 00482 if (mci_send_cmd(mci, SD_MMC_SEL_DESEL_CARD_CMD, g_u32_card_rca[slot])!=MCI_SUCCESS) 00483 return FALSE; 00484 00485 // Wait end of busy 00486 mci_wait_busy_signal(mci);// read busy state on DAT0 00487 00488 // Get clock by checking the extended CSD register 00489 if (MMC_CARD_V4 & g_u8_card_type[slot]) 00490 { 00491 // Get clock (MMC V4) and size (MMC V4 HC) by checking the extended CSD register 00492 //-- (CMD8) 00493 if (sd_mmc_get_ext_csd(slot)!=TRUE) 00494 return FALSE; 00495 } 00496 00497 00498 #if (SD_4_BIT == ENABLE) 00499 // set bus size 00500 if (SD_CARD & g_u8_card_type[slot]) 00501 { 00502 // set 4-bit bus for SD Card 00503 //-- (CMD55) 00504 if(mci_send_cmd(mci, SD_MMC_APP_CMD, g_u32_card_rca[slot])!=MCI_SUCCESS) 00505 return FALSE; 00506 00507 //-- (CMD6) 00508 if(mci_send_cmd(mci, SD_MMC_SDCARD_SET_BUS_WIDTH_CMD, SD_BUS_4_BIT )!=MCI_SUCCESS) 00509 return FALSE; 00510 00511 g_u8_card_bus_width[slot] = MCI_BUS_SIZE_4_BIT; 00512 if (mci_set_bus_size(mci, MCI_BUS_SIZE_4_BIT)!=MCI_SUCCESS) 00513 return FALSE; 00514 } 00515 else // MMC bus width management 00516 { 00517 // set 8-bit bus for MMC Card 00518 if (MMC_CARD_V4 & g_u8_card_type[slot]) 00519 { 00520 //-- (CMD6)-R1b 00521 // set 8-bit bus width (appeared from V4.0 specification) 00522 if (mci_send_cmd( mci, 00523 MMC_SWITCH_CMD, 00524 ( (U32)MMC_SWITCH_WRITE <<24)| 00525 ((U32)MMC_SWITCH_BUS_WIDTH<<16)| 00526 ((U32)MMC_SWITCH_VAL_8BIT << 8)| 00527 ((U32)MMC_SWITCH_CMD_SET))!=MCI_SUCCESS) 00528 { 00529 return FALSE; 00530 } 00531 // Wait end of busy 00532 mci_wait_busy_signal(mci);// read busy state on DAT0 00533 g_u8_card_bus_width[slot] = MCI_BUS_SIZE_8_BIT; 00534 if (mci_set_bus_size(mci, MCI_BUS_SIZE_8_BIT)!=MCI_SUCCESS) 00535 return FALSE; 00536 } 00537 } 00538 #endif 00539 00540 if (MMC_CARD_V4 & g_u8_card_type[slot]) 00541 { 00542 //-- (CMD6)-R1b 00543 // set high speed interface timing 00544 if (mci_send_cmd( mci, 00545 MMC_SWITCH_CMD, 00546 ((U32)MMC_SWITCH_WRITE <<24)| 00547 ((U32)MMC_SWITCH_HIGH_SPEED<<16)| 00548 ((U32)MMC_SWITCH_VAL_HS << 8)| 00549 ((U32)MMC_SWITCH_CMD_SET))!=MCI_SUCCESS) 00550 { 00551 return FALSE; 00552 } 00553 // Wait end of busy 00554 mci_wait_busy_signal(mci); 00555 } 00556 00557 00558 if( SD_CARD_V2 & g_u8_card_type[slot] ) 00559 { 00561 #define SDMMC_SWITCH_FUNC_MODE_CHECK (0 << 31) 00562 #define SDMMC_SWITCH_FUNC_MODE_SWITCH (1 << 31) 00563 #define SDMMC_SWITCH_FUNC_HIGH_SPEED (1 << 0) 00564 #define SDMMC_SWITCH_FUNC_G1_KEEP (0xf << 0) 00565 #define SDMMC_SWITCH_FUNC_G2_KEEP (0xf << 4) 00566 #define SDMMC_SWITCH_FUNC_G3_KEEP (0xf << 8) 00567 #define SDMMC_SWITCH_FUNC_G4_KEEP (0xf << 12) 00568 #define SDMMC_SWITCH_FUNC_G5_KEEP (0xf << 16) 00569 #define SDMMC_SWITCH_FUNC_G6_KEEP (0xf << 20) 00570 00571 mci_set_block_size(mci, 512/8); // CMD6 512 bits status 00572 mci_set_block_count(mci, 1); 00573 00574 //-- (CMD6) 00575 // Check if we can enter into the High Speed mode. 00576 if (mci_send_cmd( mci 00577 , SD_SWITCH_FUNC 00578 , SDMMC_SWITCH_FUNC_MODE_CHECK | SDMMC_SWITCH_FUNC_HIGH_SPEED 00579 )!=MCI_SUCCESS) 00580 { 00581 return FALSE; 00582 } 00583 // Wait end of busy 00584 mci_wait_busy_signal(mci);// read busy state on DAT0 00585 00586 Bool b_hs_supported=FALSE; 00587 { 00588 U8 i; 00589 for ( i = 0; i<(512L/8); i+=4) 00590 { 00591 volatile U32 data; 00592 while(!(mci_rx_ready(mci))); 00593 data = mci_rd_data(mci); 00594 if(i==16) 00595 { 00596 if(((data>>24)&0xf)==1) 00597 b_hs_supported=TRUE; 00598 break; 00599 } 00600 } 00601 } 00602 00603 if (b_hs_supported==FALSE ) 00604 goto sd_mmc_init_step3; 00605 00606 if (mci_send_cmd( mci 00607 , SD_SWITCH_FUNC 00608 , SDMMC_SWITCH_FUNC_MODE_SWITCH 00609 | SDMMC_SWITCH_FUNC_G6_KEEP 00610 | SDMMC_SWITCH_FUNC_G5_KEEP 00611 | SDMMC_SWITCH_FUNC_G4_KEEP 00612 | SDMMC_SWITCH_FUNC_G3_KEEP 00613 | SDMMC_SWITCH_FUNC_G2_KEEP 00614 | SDMMC_SWITCH_FUNC_HIGH_SPEED 00615 )!=MCI_SUCCESS) 00616 { 00617 return FALSE; 00618 } 00619 { 00620 U8 i; 00621 for ( i = 0; i<(512L/8); i+=4) 00622 { 00623 volatile U32 data; 00624 while(!(mci_rx_ready(mci))); 00625 data = mci_rd_data(mci); 00626 } 00627 } 00628 00629 /* A 8 cycle delay is required after switch command 00630 * @ 200KHz clock this should be 40 uS, but we use 00631 * 80 to handle unprecise clock setting. 00632 */ 00633 cpu_delay_us(80, g_cpu_hz); 00634 00635 union u_cfg{ 00636 unsigned long cfg; 00637 avr32_mci_cfg_t CFG; 00638 }; 00639 union u_cfg val; 00640 val.cfg = mci->cfg; 00641 val.CFG.hsmode = 1; 00642 mci->cfg = val.cfg; 00643 00644 // deselect card 00645 if (mci_send_cmd(mci, SD_MMC_SEL_DESEL_CARD_CMD, 0)!=MCI_SUCCESS) 00646 return FALSE; 00647 00648 // Wait end of busy 00649 mci_wait_busy_signal(mci);// read busy state on DAT0 00650 00651 //-- (CMD9) 00652 // Read & analyse CSD register 00653 if (sd_mmc_mci_get_csd(slot)!=TRUE) 00654 return FALSE; 00655 00656 // select card 00657 if (mci_send_cmd(mci, SD_MMC_SEL_DESEL_CARD_CMD, g_u32_card_rca[slot])!=MCI_SUCCESS) 00658 return FALSE; 00659 00660 // Wait end of busy 00661 mci_wait_busy_signal(mci);// read busy state on DAT0 00662 } 00663 00664 sd_mmc_init_step3: 00665 // Set clock 00666 mci_set_speed(mci, g_pbb_hz, g_u16_card_freq[slot]*1000); 00667 00668 //-- (CMD13) 00669 // Check if card is ready, the card must be in TRAN state 00670 if(sd_mmc_mci_cmd_send_status(slot)!=TRUE) 00671 return FALSE; 00672 00673 if ((mci_read_response(mci) & MMC_TRAN_STATE_MSK) != MMC_TRAN_STATE) 00674 return FALSE; 00675 00676 //-- (CMD16) 00677 // Set the card block length to 512B 00678 if (sd_mmc_set_block_len (slot, SD_MMC_SECTOR_SIZE)!=TRUE) 00679 return FALSE; 00680 00681 // USB Test Unit Attention requires a state "busy" between "not present" and "ready" state 00682 // otherwise never report card change 00683 sd_mmc_mci_init_done[slot] = TRUE; 00684 00685 return TRUE; 00686 }
Bool sd_mmc_mci_cmd_send_status | ( | U8 | slot | ) |
ask mmc status register.
slot | SD/MMC Slot Card Selected. |
TRUE | Success. | |
FALSE | Failure. |
Definition at line 1628 of file sd_mmc_mci.c.
References g_u32_card_rca, g_u8_card_bus_width, and SD_MMC_SEND_STATUS_CMD.
Referenced by sd_mmc_mci_card_init().
01629 { 01630 if (slot > MCI_LAST_SLOTS) 01631 return FALSE; 01632 // Select Slot card before any other command. 01633 mci_select_card(mci, slot, g_u8_card_bus_width[slot]); 01634 01635 if (mci_send_cmd(mci, SD_MMC_SEND_STATUS_CMD, g_u32_card_rca[slot])!=MCI_SUCCESS) 01636 return FALSE; 01637 01638 return TRUE; 01639 }
Bool sd_mmc_mci_dma_read_multiple_sector_2_ram | ( | U8 | slot, | |
void * | ram, | |||
U32 | nb_sector | |||
) |
Reads nb_sector SD/MMC sector to a RAM buffer, using the DMA.
Data flow is: SD/MMC -> RAM.
slot | SD/MMC Slot Card Selected. | |
ram | Pointer to RAM buffer. | |
nb_sector | Number of sector to read. |
OK | Success. | |
KO | Failure. |
Definition at line 834 of file sd_mmc_mci.c.
References SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_dma_multiple_mem_2_ram().
00835 { 00836 int *pRam = ram; 00837 00838 // Src Address: the MCI registers. 00839 AVR32_DMACA.sar1 = (U32)&AVR32_MCI.fifo; 00840 00841 // Dst Address: the OutputData[] array. 00842 AVR32_DMACA.dar1 = (unsigned long)pRam; 00843 00844 // Channel 1 Ctrl register high 00845 AVR32_DMACA.ctl1h = 00846 ( (nb_sector*(SD_MMC_SECTOR_SIZE/4)) << AVR32_DMACA_CTL1H_BLOCK_TS_OFFSET) // Block transfer size 00847 ; 00848 00849 // Enable Channel 1 : start the process. 00850 AVR32_DMACA.chenreg = ((2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET) | (2<<AVR32_DMACA_CHENREG_CH_EN_WE_OFFSET)); 00851 00852 // Wait for the end of the AES->RAM transfer (channel 1). 00853 while(AVR32_DMACA.chenreg & (2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET)); 00854 00855 return TRUE; 00856 }
Bool sd_mmc_mci_dma_read_open | ( | U8 | slot, | |
U32 | sector, | |||
void * | ram, | |||
U16 | nb_sector | |||
) |
Opens a DF memory in read mode at a given sector. DMA will be used.
slot | SD/MMC Slot Card Selected. | |
sector | Start sector. | |
ram | pointer on ram buffer. | |
nb_sector | Number of sector. |
OK | Success. | |
KO | Failure. |
Definition at line 1111 of file sd_mmc_mci.c.
References CS_FLAGERROR_RD_WR, g_u32_card_rca, g_u8_card_bus_width, g_u8_card_type, MMC_CARD_HC, SD_CARD_HC, SD_MMC_READ_MULTIPLE_BLOCK_CMD, SD_MMC_SECTOR_SIZE, and SD_MMC_SEND_STATUS_CMD.
Referenced by sd_mmc_mci_dma_mem_2_ram(), sd_mmc_mci_dma_multiple_mem_2_ram(), and sd_mmc_mci_usb_read_10().
01112 { 01113 U32 addr; 01114 01115 if (slot > MCI_LAST_SLOTS) 01116 return FALSE; 01117 01118 // Select Slot card before any other command. 01119 mci_select_card(mci, slot, g_u8_card_bus_width[slot]); 01120 01121 // Set the global memory ptr at a Byte address. 01122 gl_ptr_mem[slot] = pos ; 01123 01124 // wait for MMC not busy 01125 mci_wait_busy_signal(mci); 01126 01127 addr = gl_ptr_mem[slot]; 01128 // send command 01129 if((!(SD_CARD_HC & g_u8_card_type[slot])) 01130 && (!(MMC_CARD_HC & g_u8_card_type[slot])) ) 01131 { 01132 addr <<= 9; // For NO HC card the address must be translate in byte address 01133 } 01134 01135 //** (CMD13) 01136 // Necessary to clear flag error "ADDRESS_OUT_OF_RANGE" (ID LABO = MMC15) 01137 if(mci_send_cmd(mci, SD_MMC_SEND_STATUS_CMD, g_u32_card_rca[slot])!=MCI_SUCCESS) 01138 { 01139 return FALSE; 01140 } 01141 01142 // Request Block Length 01143 mci_set_block_size(mci, SD_MMC_SECTOR_SIZE); 01144 01145 // Set Block Count 01146 mci_set_block_count(mci, nb_sector); 01147 01148 // Enable the DMACA 01149 AVR32_DMACA.dmacfgreg = 1 << AVR32_DMACA_DMACFGREG_DMA_EN_OFFSET; 01150 01151 AVR32_MCI.dma = 0; 01152 01153 // Linked list ptrs: not used. 01154 AVR32_DMACA.llp1 = 0x00000000; 01155 01156 // Channel 1 Ctrl register low 01157 AVR32_DMACA.ctl1l = 01158 (0 << AVR32_DMACA_CTL1L_INT_EN_OFFSET) | // Do not enable interrupts 01159 (2 << AVR32_DMACA_CTL1L_DST_TR_WIDTH_OFFSET) | // Dst transfer width: 32 bits 01160 (2 << AVR32_DMACA_CTL1L_SRC_TR_WIDTH_OFFSET) | // Src transfer width: 32 bits 01161 (0 << AVR32_DMACA_CTL1L_DINC_OFFSET) | // Dst address increment: increment 01162 (0 << AVR32_DMACA_CTL1L_SINC_OFFSET) | // Src address increment: increment 01163 (3 << AVR32_DMACA_CTL1L_DST_MSIZE_OFFSET) | // Dst burst transaction len: 16 data items 01164 (3 << AVR32_DMACA_CTL1L_SRC_MSIZE_OFFSET) | // Src burst transaction len: 16 data items 01165 (0 << AVR32_DMACA_CTL1L_S_GATH_EN_OFFSET) | // Source gather: disabled 01166 (0 << AVR32_DMACA_CTL1L_D_SCAT_EN_OFFSET) | // Destination scatter: disabled 01167 (2 << AVR32_DMACA_CTL1L_TT_FC_OFFSET) | // transfer type:P2M, flow controller: DMACA 01168 (1 << AVR32_DMACA_CTL1L_DMS_OFFSET) | // Dest master: HSB master 2 01169 (0 << AVR32_DMACA_CTL1L_SMS_OFFSET) | // Source master: HSB master 1 01170 (0 << AVR32_DMACA_CTL1L_LLP_D_EN_OFFSET) | // Not used 01171 (0 << AVR32_DMACA_CTL1L_LLP_S_EN_OFFSET) // Not used 01172 ; 01173 01174 // Channel 1 Config register low 01175 AVR32_DMACA.cfg1l = 01176 (0 << AVR32_DMACA_CFG1L_HS_SEL_DST_OFFSET) | // Destination handshaking: ignored because the dst is memory. 01177 (0 << AVR32_DMACA_CFG1L_HS_SEL_SRC_OFFSET) // Source handshaking: hw handshaking 01178 ; // All other bits set to 0. 01179 01180 // Channel 1 Config register high 01181 AVR32_DMACA.cfg1h = 01182 (0 << AVR32_DMACA_CFG1H_DEST_PER_OFFSET) | // Dest hw handshaking itf: ignored because the dst is memory. 01183 (AVR32_DMACA_CH_MMCI_RX << AVR32_DMACA_CFG1H_SRC_PER_OFFSET) // Source hw handshaking itf: 01184 ; // All other bits set to 0. 01185 01186 // Setup MCI DMA register 01187 AVR32_MCI.dma = AVR32_MCI_DMA_DMAEN_MASK | (AVR32_MCI_DMA_CHKSIZE_16_BYTES << AVR32_MCI_DMA_CHKSIZE_OFFSET); 01188 01189 //** (CMD17) 01190 if(mci_send_cmd(mci, SD_MMC_READ_MULTIPLE_BLOCK_CMD, addr)!=MCI_SUCCESS) 01191 { 01192 return FALSE; 01193 } 01194 01195 // check response 01196 if ((mci_read_response(mci) & CS_FLAGERROR_RD_WR) != 0) 01197 { 01198 return FALSE; 01199 } 01200 01201 return TRUE; 01202 }
Bool sd_mmc_mci_dma_read_sector_2_ram | ( | U8 | slot, | |
void * | ram | |||
) |
Reads 1 SD/MMC sector to a RAM buffer, using the DMA.
Data flow is: SD/MMC -> RAM.
slot | SD/MMC Slot Card Selected. | |
ram | Pointer to RAM buffer. |
OK | Success. | |
KO | Failure. |
Definition at line 719 of file sd_mmc_mci.c.
References SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_dma_mem_2_ram().
00720 { 00721 int *pRam = ram; 00722 00723 // Src Address: the MCI registers. 00724 AVR32_DMACA.sar1 = (U32)&AVR32_MCI.fifo; 00725 00726 // Dst Address: the OutputData[] array. 00727 AVR32_DMACA.dar1 = (unsigned long)pRam; 00728 00729 // Channel 1 Ctrl register high 00730 AVR32_DMACA.ctl1h = 00731 ( (SD_MMC_SECTOR_SIZE/4) << AVR32_DMACA_CTL1H_BLOCK_TS_OFFSET) // Block transfer size 00732 ; 00733 00734 // Enable Channel 1 : start the process. 00735 AVR32_DMACA.chenreg = ((2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET) | (2<<AVR32_DMACA_CHENREG_CH_EN_WE_OFFSET)); 00736 00737 // Wait for the end of the AES->RAM transfer (channel 1). 00738 while(AVR32_DMACA.chenreg & (2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET)); 00739 00740 return TRUE; 00741 }
Bool sd_mmc_mci_dma_write_multiple_sector_from_ram | ( | U8 | slot, | |
const void * | ram, | |||
U32 | nb_sector | |||
) |
Writes nb_sector SD/MMC sector from a RAM buffer, using the DMA.
Data flow is: RAM -> SD/MMC.
slot | SD/MMC Slot Card Selected. | |
ram | Pointer to RAM buffer. | |
nb_sector | Number of sector to write. |
OK | Success. | |
KO | Failure. |
Definition at line 1004 of file sd_mmc_mci.c.
References SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_dma_multiple_ram_2_mem().
01005 { 01006 const unsigned int *pRam = ram; 01007 01008 // Dst Address: the OutputData[] array. 01009 AVR32_DMACA.sar1 = (unsigned long)pRam; 01010 01011 // Src Address: the MCI registers. 01012 AVR32_DMACA.dar1 = (U32)&AVR32_MCI.fifo; 01013 01014 // Channel 1 Ctrl register high 01015 AVR32_DMACA.ctl1h = 01016 ( (nb_sector*(SD_MMC_SECTOR_SIZE/4)) << AVR32_DMACA_CTL1H_BLOCK_TS_OFFSET) // Block transfer size 01017 ; 01018 01019 // Enable Channel 1 : start the process. 01020 AVR32_DMACA.chenreg = ((2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET) | (2<<AVR32_DMACA_CHENREG_CH_EN_WE_OFFSET)); 01021 01022 // Wait for the end of the AES->RAM transfer (channel 1). 01023 while(AVR32_DMACA.chenreg & (2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET)); 01024 01025 return TRUE; 01026 }
Bool sd_mmc_mci_dma_write_open | ( | U8 | slot, | |
U32 | sector, | |||
const void * | ram, | |||
U16 | nb_sector | |||
) |
This function opens a DF memory in write mode at a given sector. DMA will be used.
slot | SD/MMC Slot Card Selected. | |
sector | Start sector. | |
nb_sector | Number of sector. | |
ram | pointer on ram buffer. |
OK | Success. | |
KO | Failure. |
Definition at line 1285 of file sd_mmc_mci.c.
References CS_FLAGERROR_RD_WR, g_u8_card_bus_width, g_u8_card_type, MMC_CARD_HC, SD_CARD_HC, SD_MMC_SECTOR_SIZE, and SD_MMC_WRITE_MULTIPLE_BLOCK_CMD.
Referenced by sd_mmc_mci_dma_multiple_ram_2_mem(), sd_mmc_mci_dma_ram_2_mem(), and sd_mmc_mci_usb_write_10().
01286 { 01287 U32 addr; 01288 01289 if (slot > MCI_LAST_SLOTS) 01290 return FALSE; 01291 01292 // Select Slot card before any other command. 01293 mci_select_card(mci, slot, g_u8_card_bus_width[slot]); 01294 01295 // Set the global memory ptr at a Byte address. 01296 gl_ptr_mem[slot] = pos ; 01297 01298 // wait for MMC not busy 01299 mci_wait_busy_signal(mci); 01300 01301 /* 01302 // (CMD13) 01303 // Necessary to clear flag error "ADDRESS_OUT_OF_RANGE" (ID LABO = MMC15) 01304 if( !mmc_drv_send_cmd( MMC_SEND_STATUS, g_u32_card_rca, MMC_RESP_R1 ) ) 01305 { 01306 return FALSE; 01307 } 01308 mmc_drv_read_response(); 01309 */ 01310 01311 addr = gl_ptr_mem[slot]; 01312 // send command 01313 if((!(SD_CARD_HC & g_u8_card_type[slot])) 01314 && (!(MMC_CARD_HC & g_u8_card_type[slot])) ) 01315 { 01316 addr <<= 9; // For NO HC card the address must be translate in byte address 01317 } 01318 01319 // Set Block Length 01320 mci_set_block_size(mci, SD_MMC_SECTOR_SIZE); 01321 01322 // Set Block Count 01323 mci_set_block_count(mci, nb_sector); 01324 01325 // Enable the DMACA 01326 AVR32_DMACA.dmacfgreg = 1 << AVR32_DMACA_DMACFGREG_DMA_EN_OFFSET; 01327 01328 AVR32_MCI.dma = 0; 01329 01330 // Linked list ptrs: not used. 01331 AVR32_DMACA.llp1 = 0x00000000; 01332 01333 // Channel 1 Ctrl register low 01334 AVR32_DMACA.ctl1l = 01335 (0 << AVR32_DMACA_CTL1L_INT_EN_OFFSET) | // Do not enable interrupts 01336 (2 << AVR32_DMACA_CTL1L_DST_TR_WIDTH_OFFSET) | // Dst transfer width: 32 bits 01337 (2 << AVR32_DMACA_CTL1L_SRC_TR_WIDTH_OFFSET) | // Src transfer width: 32 bits 01338 (0 << AVR32_DMACA_CTL1L_DINC_OFFSET) | // Dst address increment: increment 01339 (0 << AVR32_DMACA_CTL1L_SINC_OFFSET) | // Src address increment: increment 01340 (3 << AVR32_DMACA_CTL1L_DST_MSIZE_OFFSET) | // Dst burst transaction len: 16 data items 01341 (3 << AVR32_DMACA_CTL1L_SRC_MSIZE_OFFSET) | // Src burst transaction len: 16 data items 01342 (0 << AVR32_DMACA_CTL1L_S_GATH_EN_OFFSET) | // Source gather: disabled 01343 (0 << AVR32_DMACA_CTL1L_D_SCAT_EN_OFFSET) | // Destination scatter: disabled 01344 (1 << AVR32_DMACA_CTL1L_TT_FC_OFFSET) | // transfer type:M2P, flow controller: DMACA 01345 (0 << AVR32_DMACA_CTL1L_DMS_OFFSET) | // Dest master: HSB master 1 01346 (1 << AVR32_DMACA_CTL1L_SMS_OFFSET) | // Source master: HSB master 2 01347 (0 << AVR32_DMACA_CTL1L_LLP_D_EN_OFFSET) | // Not used 01348 (0 << AVR32_DMACA_CTL1L_LLP_S_EN_OFFSET) // Not used 01349 ; 01350 01351 // Channel 1 Config register low 01352 AVR32_DMACA.cfg1l = 01353 (0 << AVR32_DMACA_CFG1L_HS_SEL_DST_OFFSET) | // Destination handshaking: hw handshaking 01354 (0 << AVR32_DMACA_CFG1L_HS_SEL_SRC_OFFSET) // Source handshaking: ignored because the dst is memory. 01355 ; // All other bits set to 0. 01356 01357 // Channel 1 Config register high 01358 AVR32_DMACA.cfg1h = 01359 (AVR32_DMACA_CH_MMCI_TX << AVR32_DMACA_CFG1H_DEST_PER_OFFSET) | // Dest hw handshaking itf: 01360 (0 << AVR32_DMACA_CFG1H_SRC_PER_OFFSET) // Source hw handshaking itf: ignored because the dst is memory. 01361 ; // All other bits set to 0. 01362 01363 // Setup MCI DMA register 01364 AVR32_MCI.dma = AVR32_MCI_DMA_DMAEN_MASK | (AVR32_MCI_DMA_CHKSIZE_16_BYTES << AVR32_MCI_DMA_CHKSIZE_OFFSET); 01365 01366 //** (CMD24) 01367 if(mci_send_cmd(mci, SD_MMC_WRITE_MULTIPLE_BLOCK_CMD, addr )!=MCI_SUCCESS) 01368 { 01369 return FALSE; 01370 } 01371 01372 // check response 01373 if ((mci_read_response(mci) & CS_FLAGERROR_RD_WR) != 0) 01374 { 01375 return FALSE; 01376 } 01377 01378 return TRUE; 01379 }
Bool sd_mmc_mci_dma_write_sector_from_ram | ( | U8 | slot, | |
const void * | ram | |||
) |
Writes 1 SD/MMC sector from a RAM buffer, using the DMA.
Data flow is: RAM -> SD/MMC.
slot | SD/MMC Slot Card Selected. | |
ram | Pointer to RAM buffer. |
OK | Success. | |
KO | Failure. |
Definition at line 889 of file sd_mmc_mci.c.
References SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_dma_ram_2_mem().
00890 { 00891 const unsigned int *pRam = ram; 00892 00893 // Dst Address: the OutputData[] array. 00894 AVR32_DMACA.sar1 = (unsigned long)pRam; 00895 00896 // Src Address: the MCI registers. 00897 AVR32_DMACA.dar1 = (U32)&AVR32_MCI.fifo; 00898 00899 // Channel 1 Ctrl register high 00900 AVR32_DMACA.ctl1h = 00901 ( (SD_MMC_SECTOR_SIZE/4) << AVR32_DMACA_CTL1H_BLOCK_TS_OFFSET) // Block transfer size 00902 ; 00903 00904 // Enable Channel 1 : start the process. 00905 AVR32_DMACA.chenreg = ((2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET) | (2<<AVR32_DMACA_CHENREG_CH_EN_WE_OFFSET)); 00906 00907 // Wait for the end of the AES->RAM transfer (channel 1). 00908 while(AVR32_DMACA.chenreg & (2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET)); 00909 00910 return TRUE; 00911 }
Bool sd_mmc_mci_get_csd | ( | U8 | slot | ) |
Definition at line 158 of file sd_mmc_mci.c.
References csd_t::csd, CSD_BLEN_512, CSD_MSK_SPEC_VER, CSD_SPEC_VER_4_0, csd_t::csd_v1, csd_t::csd_v2, csd_v1_t::cSizeMult, csd_v1_t::deviceSizeH, csd_v2_t::deviceSizeH, csd_v1_t::deviceSizeL, csd_v2_t::deviceSizeL, g_u16_card_freq, g_u32_card_rca, g_u32_card_size, g_u8_card_bus_width, g_u8_card_type, MMC_CARD, MMC_CARD_V4, csd_v1_t::readBlLen, SD_CARD, SD_CARD_HC, SD_MMC_SEND_CSD_CMD, csd_v1_t::tranSpeed, and csd_v1_t::writeBlLen.
Referenced by sd_mmc_mci_card_init().
00159 { 00160 csd_t csd; 00161 00162 U32 max_Read_DataBlock_Length; 00163 U32 mult; 00164 U32 blocknr; 00165 U8 tmp; 00166 const U16 freq_unit[4] = {10, 100, 1000, 10000}; 00167 const U8 mult_fact[16] = {0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80}; // MMC tabs... 00168 00169 if (slot > MCI_LAST_SLOTS) 00170 return FALSE; 00171 // Select Slot card before any other command. 00172 mci_select_card(mci, slot, g_u8_card_bus_width[slot]); 00173 00174 //-- (CMD9) 00175 if (mci_send_cmd(mci, SD_MMC_SEND_CSD_CMD, g_u32_card_rca[slot])!=MCI_SUCCESS) 00176 return FALSE; 00177 00178 00179 csd.csd[0] = mci_read_response(mci); 00180 csd.csd[1] = mci_read_response(mci); 00181 csd.csd[2] = mci_read_response(mci); 00182 csd.csd[3] = mci_read_response(mci); 00183 00184 //-- Read "System specification version", only available on MMC card 00185 // field: SPEC_VERS (only on MMC) 00186 if (MMC_CARD & g_u8_card_type[slot]) // TO BE ADDED 00187 { 00188 if (CSD_SPEC_VER_4_0 == (MSB0(csd.csd[0]) & CSD_MSK_SPEC_VER)) 00189 { 00190 g_u8_card_type[slot] |= MMC_CARD_V4; 00191 } 00192 } 00193 00194 //-- Compute MMC/SD speed 00195 // field: TRAN_SPEED (CSD V1 & V2 are the same) 00196 g_u16_card_freq[slot] = mult_fact[csd.csd_v1.tranSpeed >> 3]; // Get Multiplier factor 00197 if (SD_CARD & g_u8_card_type[slot]) 00198 { 00199 // SD card don't have same frequency that MMC card 00200 if( 26 == g_u16_card_freq[slot] ) 00201 { 00202 g_u16_card_freq[slot] = 25; 00203 } 00204 else if( 52 == g_u16_card_freq[slot] ) 00205 { 00206 g_u16_card_freq[slot] = 50; 00207 } 00208 } 00209 g_u16_card_freq[slot] *= freq_unit[ csd.csd_v1.tranSpeed&0x07 ]; // Get transfer rate unit 00210 00211 //-- Compute card size in number of block 00212 // field: WRITE_BL_LEN, READ_BL_LEN, C_SIZE (CSD V1 & V2 are not the same) 00213 if (SD_CARD_HC & g_u8_card_type[slot]) 00214 { 00215 g_u32_card_size[slot] = (csd.csd_v2.deviceSizeH<<16)+(csd.csd_v2.deviceSizeL&0xFFff); 00216 00217 // memory capacity = (C_SIZE+1) * 1K sector 00218 g_u32_card_size[slot] = (g_u32_card_size[slot] + 1) << 10; // unit 512B 00219 } 00220 else 00221 { 00222 // Check block size 00223 tmp = csd.csd_v1.writeBlLen; // WRITE_BL_LEN 00224 if (tmp < CSD_BLEN_512) 00225 return FALSE; // block size < 512B not supported by firmware 00226 00227 tmp = csd.csd_v1.readBlLen; // READ_BL_LEN 00228 if (tmp < CSD_BLEN_512) 00229 return FALSE; // block size < 512B not supported by firmware 00230 00232 // compute MULT 00233 mult = 1 << (csd.csd_v1.cSizeMult + 2); 00234 max_Read_DataBlock_Length = 1<<csd.csd_v1.readBlLen; 00235 // compute MSB of C_SIZE 00236 blocknr = csd.csd_v1.deviceSizeH << 2; 00237 // compute MULT * (LSB of C-SIZE + MSB already computed + 1) = BLOCKNR 00238 blocknr = mult * ( blocknr + csd.csd_v1.deviceSizeL + 1 ); 00239 g_u32_card_size[slot] = ((max_Read_DataBlock_Length * blocknr)/512); 00240 } 00241 00242 return TRUE; 00243 }
Bool sd_mmc_mci_init | ( | const mci_options_t * | mci_opt, | |
long | pbb_hz, | |||
long | cpu_hz | |||
) |
Initializes the MCI driver.
mci_opt | Initialization options of the MCI. | |
pbb_hz | MCI module input clock frequency (PBA clock, Hz). | |
cpu_hz | CPU clock, Hz. |
OK | Success. | |
KO | Failure. |
Definition at line 309 of file sd_mmc_mci.c.
References sd_mmc_mci_card_init().
Referenced by sd_mmc_mci_resources_init().
00310 { 00311 union 00312 { 00313 unsigned long mcfg; 00314 avr32_hmatrix_mcfg_t MCFG; 00315 } u_avr32_hmatrix_mcfg; 00316 00317 union 00318 { 00319 unsigned long scfg; 00320 avr32_hmatrix_scfg_t SCFG; 00321 } u_avr32_hmatrix_scfg; 00322 00323 // For the USBB DMA HMATRIX master, use infinite length burst. 00324 u_avr32_hmatrix_mcfg.mcfg = AVR32_HMATRIX.mcfg[AVR32_HMATRIX_MASTER_USBB_DMA]; 00325 u_avr32_hmatrix_mcfg.MCFG.ulbt = AVR32_HMATRIX_ULBT_INFINITE; 00326 AVR32_HMATRIX.mcfg[AVR32_HMATRIX_MASTER_USBB_DMA] = u_avr32_hmatrix_mcfg.mcfg; 00327 00328 // For the USBB DPRAM HMATRIX slave, use the USBB DMA as fixed default master. 00329 u_avr32_hmatrix_scfg.scfg = AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_USBB_DPRAM]; 00330 u_avr32_hmatrix_scfg.SCFG.fixed_defmstr = AVR32_HMATRIX_MASTER_USBB_DMA; 00331 u_avr32_hmatrix_scfg.SCFG.defmstr_type = AVR32_HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT; 00332 AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_USBB_DPRAM] = u_avr32_hmatrix_scfg.scfg; 00333 00334 g_pbb_hz = pbb_hz; 00335 g_cpu_hz = cpu_hz; 00336 00337 // Init MCI controler 00338 if (mci_init(mci, mci_opt, pbb_hz)!=MCI_SUCCESS) 00339 return FALSE; 00340 00341 // Default card initialization. This can be removed since the card init will 00342 // automatically be done when needed. 00343 sd_mmc_mci_card_init(mci_opt->card_slot); 00344 return TRUE; 00345 }
Bool sd_mmc_mci_mem_check | ( | U8 | slot | ) |
Performs a memory check.
slot | SD/MMC Slot Card Selected. |
OK | Success. | |
KO | Failure. |
Definition at line 1028 of file sd_mmc_mci.c.
References g_u8_card_bus_width, is_sd_mmc_mci_card_present(), sd_mmc_mci_card_init(), and sd_mmc_mci_init_done.
Referenced by main(), sd_mmc_mci_dma_mem_2_ram(), sd_mmc_mci_dma_multiple_mem_2_ram(), sd_mmc_mci_dma_multiple_ram_2_mem(), sd_mmc_mci_dma_ram_2_mem(), sd_mmc_mci_mem_2_ram(), sd_mmc_mci_multiple_mem_2_ram(), sd_mmc_mci_multiple_ram_2_mem(), sd_mmc_mci_ram_2_mem(), sd_mmc_mci_read_capacity(), sd_mmc_mci_test_unit_ready(), sd_mmc_mci_usb_read_10(), and sd_mmc_mci_usb_write_10().
01029 { 01030 U8 timeout_init = 0; 01031 01032 if (slot > MCI_LAST_SLOTS) 01033 return FALSE; 01034 01035 // Select Slot card before any other command. 01036 mci_select_card(mci, slot, g_u8_card_bus_width[slot]); 01037 01038 // Check card presence 01039 if (is_sd_mmc_mci_card_present(slot) == FALSE) 01040 { 01041 sd_mmc_mci_init_done[slot] = FALSE; 01042 return FALSE; 01043 } 01044 01045 if (sd_mmc_mci_init_done[slot] == FALSE) 01046 { 01047 while (sd_mmc_mci_card_init(slot)!=TRUE) 01048 { 01049 timeout_init++; 01050 if (timeout_init>10) return FALSE; 01051 } 01052 } 01053 if (sd_mmc_mci_init_done[slot] == TRUE) 01054 return TRUE; 01055 else 01056 return FALSE; 01057 }
Bool sd_mmc_mci_read_close | ( | U8 | slot | ) |
Unselects the current DF memory.
slot | SD/MMC Slot Card Selected. |
OK | Success. | |
KO | Failure. |
Definition at line 1204 of file sd_mmc_mci.c.
References SD_MMC_STOP_READ_TRANSMISSION_CMD.
Referenced by sd_mmc_mci_dma_mem_2_ram(), sd_mmc_mci_dma_multiple_mem_2_ram(), sd_mmc_mci_mem_2_ram(), sd_mmc_mci_multiple_mem_2_ram(), and sd_mmc_mci_usb_read_10().
01205 { 01206 if( (mci_crc_error(mci)) ) 01207 { 01208 return FALSE; // An CRC error has been seen 01209 } 01210 01211 mci_wait_busy_signal(mci); 01212 01213 if( mci_send_cmd( mci, SD_MMC_STOP_READ_TRANSMISSION_CMD, 0xffffffff ) != MCI_SUCCESS) 01214 return FALSE; 01215 01216 /* 01217 if( (mci_overrun_error(mci)) ) 01218 { 01219 return FALSE; 01220 } 01221 01222 if( (mci_underrun_error(mci)) ) 01223 { 01224 return FALSE; 01225 }*/ 01226 01227 return TRUE; 01228 }
Bool sd_mmc_mci_read_multiple_sector | ( | U8 | slot, | |
U16 | nb_sector | |||
) |
Reads nb_sector sectors from DF memory.
Data flow is: SD/MMC -> callback.
slot | SD/MMC Slot Card Selected. | |
nb_sector | Number of contiguous sectors to read. |
OK | Success. | |
KO | Failure. |
Definition at line 1426 of file sd_mmc_mci.c.
References dma_mci_2_ram(), dma_ram_2_usb(), is_dma_mci_2_ram_complete(), is_dma_ram_2_usb_complete(), and SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_usb_read_10().
01427 { 01428 Bool b_last_state_full=FALSE; 01429 U8 buffer_id=0; 01430 01431 // Turn on features used by the DMA-USB. 01432 Usb_enable_endpoint_bank_autoswitch(g_scsi_ep_ms_in); 01433 01434 // Pipeline the 2 DMA transfer in order to speed-up the performances: 01435 // DMA MCI -> RAM 01436 // DMA RAM -> USB 01437 // 01438 while (nb_sector--) { 01439 // (re)load first stage. 01440 if( buffer_id==0 ) { 01441 dma_mci_2_ram(§or_buf_0, SD_MMC_SECTOR_SIZE); 01442 buffer_id=1; 01443 01444 } else { 01445 dma_mci_2_ram(§or_buf_1, SD_MMC_SECTOR_SIZE); 01446 buffer_id=0; 01447 } 01448 01449 // (re)load second stage. 01450 if( b_last_state_full ) { 01451 if( buffer_id==0 ) { 01452 dma_ram_2_usb(§or_buf_0, SD_MMC_SECTOR_SIZE); 01453 } else { 01454 dma_ram_2_usb(§or_buf_1, SD_MMC_SECTOR_SIZE); 01455 } 01456 // Wait completion of both stages. 01457 while( !is_dma_mci_2_ram_complete() ); 01458 while( !is_dma_ram_2_usb_complete() ); 01459 01460 } else { 01461 b_last_state_full=TRUE; 01462 // Wait completion of first stage only. 01463 while( !is_dma_mci_2_ram_complete() ); 01464 } 01465 } 01466 01467 // Complete execution of the last transfer (which is in the pipe). 01468 if( buffer_id==0 ) { 01469 dma_ram_2_usb(§or_buf_1, SD_MMC_SECTOR_SIZE); 01470 } else { 01471 dma_ram_2_usb(§or_buf_0, SD_MMC_SECTOR_SIZE); 01472 } 01473 while( !is_dma_ram_2_usb_complete() ); 01474 01475 // Wait until the USB RAM is empty before disabling the autoswitch feature. 01476 while( Usb_nb_busy_bank(g_scsi_ep_ms_in)!=0 ); 01477 01478 // Turn off exotic USB features that may not work for other devices (at45dbx...) 01479 Usb_disable_endpoint_bank_autoswitch(g_scsi_ep_ms_in); 01480 return TRUE; 01481 }
Bool sd_mmc_mci_read_multiple_sector_2_ram | ( | U8 | slot, | |
void * | ram, | |||
U32 | nb_sector | |||
) |
Reads nb_sector SD/MMC sector to a RAM buffer.
Data flow is: SD/MMC -> RAM.
slot | SD/MMC Slot Card Selected. | |
ram | Pointer to RAM buffer. | |
nb_sector | Number of sector to read. |
OK | Success. | |
KO | Failure. |
Definition at line 743 of file sd_mmc_mci.c.
References SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_multiple_mem_2_ram().
00744 { 00745 U32 wordsToRead; 00746 int *pRam = ram; 00747 00748 // Read data 00749 while( nb_sector>0 ) 00750 { 00751 wordsToRead = (SD_MMC_SECTOR_SIZE/sizeof(*pRam)); 00752 while(wordsToRead>0) 00753 { 00754 while(!(mci_rx_ready(mci))); 00755 *pRam++ = mci_rd_data(mci); 00756 while(!(mci_rx_ready(mci))); 00757 *pRam++ = mci_rd_data(mci); 00758 while(!(mci_rx_ready(mci))); 00759 *pRam++ = mci_rd_data(mci); 00760 while(!(mci_rx_ready(mci))); 00761 *pRam++ = mci_rd_data(mci); 00762 while(!(mci_rx_ready(mci))); 00763 *pRam++ = mci_rd_data(mci); 00764 while(!(mci_rx_ready(mci))); 00765 *pRam++ = mci_rd_data(mci); 00766 while(!(mci_rx_ready(mci))); 00767 *pRam++ = mci_rd_data(mci); 00768 while(!(mci_rx_ready(mci))); 00769 *pRam++ = mci_rd_data(mci); 00770 wordsToRead-=8; 00771 } 00772 nb_sector--; 00773 } 00774 00775 return TRUE; 00776 }
Bool sd_mmc_mci_read_open | ( | U8 | slot, | |
U32 | sector, | |||
U16 | nb_sector | |||
) |
Opens a DF memory in read mode at a given sector.
slot | SD/MMC Slot Card Selected. | |
sector | Start sector. | |
nb_sector | Number of sector. |
OK | Success. | |
KO | Failure. |
Definition at line 1059 of file sd_mmc_mci.c.
References CS_FLAGERROR_RD_WR, g_u32_card_rca, g_u8_card_bus_width, g_u8_card_type, MMC_CARD_HC, SD_CARD_HC, SD_MMC_READ_MULTIPLE_BLOCK_CMD, SD_MMC_SECTOR_SIZE, and SD_MMC_SEND_STATUS_CMD.
Referenced by sd_mmc_mci_mem_2_ram(), and sd_mmc_mci_multiple_mem_2_ram().
01060 { 01061 U32 addr; 01062 01063 if (slot > MCI_LAST_SLOTS) 01064 return FALSE; 01065 01066 // Select Slot card before any other command. 01067 mci_select_card(mci, slot, g_u8_card_bus_width[slot]); 01068 01069 // Set the global memory ptr at a Byte address. 01070 gl_ptr_mem[slot] = pos ; 01071 01072 // wait for MMC not busy 01073 mci_wait_busy_signal(mci); 01074 01075 addr = gl_ptr_mem[slot]; 01076 // send command 01077 if((!(SD_CARD_HC & g_u8_card_type[slot])) 01078 && (!(MMC_CARD_HC & g_u8_card_type[slot])) ) 01079 { 01080 addr <<= 9; // For NO HC card the address must be translate in byte address 01081 } 01082 01083 //** (CMD13) 01084 // Necessary to clear flag error "ADDRESS_OUT_OF_RANGE" (ID LABO = MMC15) 01085 if(mci_send_cmd(mci, SD_MMC_SEND_STATUS_CMD, g_u32_card_rca[slot])!=MCI_SUCCESS) 01086 { 01087 return FALSE; 01088 } 01089 01090 // Request Block Length 01091 mci_set_block_size(mci, SD_MMC_SECTOR_SIZE); 01092 01093 // Set Block Count 01094 mci_set_block_count(mci, nb_sector); 01095 01096 //** (CMD17) 01097 if(mci_send_cmd(mci, SD_MMC_READ_MULTIPLE_BLOCK_CMD, addr)!=MCI_SUCCESS) 01098 { 01099 return FALSE; 01100 } 01101 01102 // check response 01103 if ((mci_read_response(mci) & CS_FLAGERROR_RD_WR) != 0) 01104 { 01105 return FALSE; 01106 } 01107 01108 return TRUE; 01109 }
Bool sd_mmc_mci_read_sector_2_ram | ( | U8 | slot, | |
void * | ram | |||
) |
Reads 1 SD/MMC sector to a RAM buffer.
Data flow is: SD/MMC -> RAM.
slot | SD/MMC Slot Card Selected. | |
ram | Pointer to RAM buffer. |
OK | Success. | |
KO | Failure. |
Definition at line 688 of file sd_mmc_mci.c.
References SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_mem_2_ram().
00689 { 00690 U32 wordsToRead; 00691 int *pRam = ram; 00692 00693 // Read data 00694 wordsToRead = (SD_MMC_SECTOR_SIZE/sizeof(*pRam)); 00695 while(wordsToRead>0) 00696 { 00697 while(!(mci_rx_ready(mci))); 00698 *pRam++ = mci_rd_data(mci); 00699 while(!(mci_rx_ready(mci))); 00700 *pRam++ = mci_rd_data(mci); 00701 while(!(mci_rx_ready(mci))); 00702 *pRam++ = mci_rd_data(mci); 00703 while(!(mci_rx_ready(mci))); 00704 *pRam++ = mci_rd_data(mci); 00705 while(!(mci_rx_ready(mci))); 00706 *pRam++ = mci_rd_data(mci); 00707 while(!(mci_rx_ready(mci))); 00708 *pRam++ = mci_rd_data(mci); 00709 while(!(mci_rx_ready(mci))); 00710 *pRam++ = mci_rd_data(mci); 00711 while(!(mci_rx_ready(mci))); 00712 *pRam++ = mci_rd_data(mci); 00713 wordsToRead-=8; 00714 } 00715 00716 return TRUE; 00717 }
Bool sd_mmc_mci_write_close | ( | U8 | slot | ) |
Fills the end of the current logical sector and launches page programming.
slot | SD/MMC Slot Card Selected. |
OK | Success. | |
KO | Failure. |
Definition at line 1381 of file sd_mmc_mci.c.
References SD_MMC_STOP_WRITE_TRANSMISSION_CMD.
Referenced by sd_mmc_mci_dma_multiple_ram_2_mem(), sd_mmc_mci_dma_ram_2_mem(), sd_mmc_mci_multiple_ram_2_mem(), sd_mmc_mci_ram_2_mem(), and sd_mmc_mci_usb_write_10().
01382 { 01383 if( (mci_crc_error(mci)) ) 01384 { 01385 return FALSE; // An CRC error has been seen 01386 } 01387 01388 while(!(mci_data_block_ended(mci))); 01389 01390 if( mci_send_cmd( mci, SD_MMC_STOP_WRITE_TRANSMISSION_CMD, 0xffffffff ) != MCI_SUCCESS) 01391 { 01392 return FALSE; 01393 } 01394 01395 /* 01396 if( (mci_overrun_error(mci)) ) 01397 { 01398 return FALSE; 01399 } 01400 01401 if( (mci_underrun_error(mci)) ) 01402 { 01403 return FALSE; 01404 }*/ 01405 01406 if( slot==SD_SLOT_4BITS ) 01407 { 01408 gpio_enable_gpio_pin( SD_SLOT_4BITS_DATA0_PIN); // Set D0 line as input. 01409 while(!(gpio_get_pin_value(SD_SLOT_4BITS_DATA0_PIN))); // Wait until the card is ready. 01410 gpio_enable_module_pin( SD_SLOT_4BITS_DATA0_PIN, SD_SLOT_4BITS_DATA0_FUNCTION); // Restore initial D0 pin. 01411 } 01412 else 01413 { 01414 gpio_enable_gpio_pin( SD_SLOT_8BITS_DATA0_PIN); // Set D0 line as input. 01415 while(!(gpio_get_pin_value(SD_SLOT_8BITS_DATA0_PIN))); // Wait until the card is ready. 01416 gpio_enable_module_pin( SD_SLOT_8BITS_DATA0_PIN, SD_SLOT_8BITS_DATA0_FUNCTION); // Restore initial D0 pin. 01417 } 01418 return TRUE; 01419 }
Bool sd_mmc_mci_write_multiple_sector | ( | U8 | slot, | |
U16 | nb_sector | |||
) |
Writes nb_sector sectors to SD/MMC memory.
Data flow is: callback -> SD/MMC.
slot | SD/MMC Slot Card Selected. | |
nb_sector | Number of contiguous sectors to write. |
OK | Success. | |
KO | Failure. |
Definition at line 1483 of file sd_mmc_mci.c.
References dma_ram_2_mci(), dma_usb_2_ram(), is_dma_ram_2_mci_complete(), is_dma_usb_2_ram_complete(), and SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_usb_write_10().
01484 { 01485 Bool b_last_state_full=FALSE; 01486 U8 buffer_id=0; 01487 01488 // Turn on features used by the DMA-USB. 01489 Usb_enable_endpoint_bank_autoswitch(g_scsi_ep_ms_out); 01490 01491 // Pipeline the 2 DMA transfer in order to speed-up the performances: 01492 // DMA USB -> RAM 01493 // DMA RAM -> MCI 01494 // 01495 while (nb_sector--) { 01496 // (re)load first stage. 01497 if( buffer_id==0 ) { 01498 dma_usb_2_ram(§or_buf_0, SD_MMC_SECTOR_SIZE); 01499 buffer_id=1; 01500 01501 } else { 01502 dma_usb_2_ram(§or_buf_1, SD_MMC_SECTOR_SIZE); 01503 buffer_id=0; 01504 } 01505 01506 // (re)load second stage. 01507 if( b_last_state_full ) { 01508 if( buffer_id==0 ) { 01509 dma_ram_2_mci(§or_buf_0, SD_MMC_SECTOR_SIZE); 01510 } else { 01511 dma_ram_2_mci(§or_buf_1, SD_MMC_SECTOR_SIZE); 01512 } 01513 // Wait completion of both stages. 01514 while( !is_dma_usb_2_ram_complete() ); 01515 while( !is_dma_ram_2_mci_complete() ); 01516 01517 } else { 01518 b_last_state_full=TRUE; 01519 // Wait completion of the first stage only. 01520 while( !is_dma_usb_2_ram_complete() ); 01521 } 01522 } 01523 01524 // Complete execution of the last transfer (which is in the pipe). 01525 if( buffer_id==0 ) { 01526 dma_ram_2_mci(§or_buf_1, SD_MMC_SECTOR_SIZE); 01527 } else { 01528 dma_ram_2_mci(§or_buf_0, SD_MMC_SECTOR_SIZE); 01529 } 01530 while( !is_dma_ram_2_mci_complete() ); 01531 01532 // Wait until the USB RAM is empty before disabling the autoswitch feature. 01533 while( Usb_nb_busy_bank(g_scsi_ep_ms_out)!=0 ); 01534 01535 // Turn off exotic USB features that may not work for other devices (at45dbx...) 01536 Usb_disable_endpoint_bank_autoswitch(g_scsi_ep_ms_out); 01537 return TRUE; 01538 }
Bool sd_mmc_mci_write_multiple_sector_from_ram | ( | U8 | slot, | |
const void * | ram, | |||
U32 | nb_sector | |||
) |
Writes nb_sector SD/MMC sector from a RAM buffer.
Data flow is: RAM -> SD/MMC.
slot | SD/MMC Slot Card Selected. | |
ram | Pointer to RAM buffer. | |
nb_sector | Number of sector to write. |
OK | Success. | |
KO | Failure. |
Definition at line 913 of file sd_mmc_mci.c.
References SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_multiple_ram_2_mem().
00914 { 00915 U32 wordsToWrite; 00916 const unsigned int *pRam = ram; 00917 00918 // Write Data 00919 while( nb_sector>0 ) 00920 { 00921 wordsToWrite = (SD_MMC_SECTOR_SIZE/sizeof(*pRam)); 00922 while(wordsToWrite>0) 00923 { 00924 while(!mci_tx_ready(mci)); 00925 mci_wr_data(mci,*pRam++); 00926 while(!mci_tx_ready(mci)); 00927 mci_wr_data(mci,*pRam++); 00928 while(!mci_tx_ready(mci)); 00929 mci_wr_data(mci,*pRam++); 00930 while(!mci_tx_ready(mci)); 00931 mci_wr_data(mci,*pRam++); 00932 while(!mci_tx_ready(mci)); 00933 mci_wr_data(mci,*pRam++); 00934 while(!mci_tx_ready(mci)); 00935 mci_wr_data(mci,*pRam++); 00936 while(!mci_tx_ready(mci)); 00937 mci_wr_data(mci,*pRam++); 00938 while(!mci_tx_ready(mci)); 00939 mci_wr_data(mci,*pRam++); 00940 wordsToWrite-=8; 00941 } 00942 nb_sector--; 00943 } 00944 00945 return TRUE; 00946 }
Bool sd_mmc_mci_write_open | ( | U8 | slot, | |
U32 | sector, | |||
U16 | nb_sector | |||
) |
This function opens a DF memory in write mode at a given sector.
slot | SD/MMC Slot Card Selected. | |
sector | Start sector. | |
nb_sector | Number of sector. |
OK | Success. | |
KO | Failure. |
Definition at line 1230 of file sd_mmc_mci.c.
References CS_FLAGERROR_RD_WR, g_u8_card_bus_width, g_u8_card_type, MMC_CARD_HC, SD_CARD_HC, SD_MMC_SECTOR_SIZE, and SD_MMC_WRITE_MULTIPLE_BLOCK_CMD.
Referenced by sd_mmc_mci_multiple_ram_2_mem(), and sd_mmc_mci_ram_2_mem().
01231 { 01232 U32 addr; 01233 01234 if (slot > MCI_LAST_SLOTS) 01235 return FALSE; 01236 01237 // Select Slot card before any other command. 01238 mci_select_card(mci,slot,g_u8_card_bus_width[slot]); 01239 01240 // Set the global memory ptr at a Byte address. 01241 gl_ptr_mem[slot] = pos ; 01242 01243 // wait for MMC not busy 01244 mci_wait_busy_signal(mci); 01245 01246 /* 01247 // (CMD13) 01248 // Necessary to clear flag error "ADDRESS_OUT_OF_RANGE" (ID LABO = MMC15) 01249 if( !mmc_drv_send_cmd( MMC_SEND_STATUS, g_u32_card_rca, MMC_RESP_R1 ) ) 01250 { 01251 return FALSE; 01252 } 01253 mmc_drv_read_response(); 01254 */ 01255 01256 addr = gl_ptr_mem[slot]; 01257 // send command 01258 if((!(SD_CARD_HC & g_u8_card_type[slot])) 01259 && (!(MMC_CARD_HC & g_u8_card_type[slot])) ) 01260 { 01261 addr <<= 9; // For NO HC card the address must be translate in byte address 01262 } 01263 01264 // Set Block Length 01265 mci_set_block_size(mci, SD_MMC_SECTOR_SIZE); 01266 01267 // Set Block Count 01268 mci_set_block_count(mci, nb_sector); 01269 01270 //** (CMD24) 01271 if(mci_send_cmd(mci, SD_MMC_WRITE_MULTIPLE_BLOCK_CMD, addr )!=MCI_SUCCESS) 01272 { 01273 return FALSE; 01274 } 01275 01276 // check response 01277 if ((mci_read_response(mci) & CS_FLAGERROR_RD_WR) != 0) 01278 { 01279 return FALSE; 01280 } 01281 01282 return TRUE; 01283 }
Bool sd_mmc_mci_write_sector_from_ram | ( | U8 | slot, | |
const void * | ram | |||
) |
Writes 1 SD/MMC sector from a RAM buffer.
Data flow is: RAM -> SD/MMC.
slot | SD/MMC Slot Card Selected. | |
ram | Pointer to RAM buffer. |
OK | Success. | |
KO | Failure. |
Definition at line 858 of file sd_mmc_mci.c.
References SD_MMC_SECTOR_SIZE.
Referenced by sd_mmc_mci_ram_2_mem().
00859 { 00860 U32 wordsToWrite; 00861 const unsigned int *pRam = ram; 00862 00863 // Write Data 00864 wordsToWrite = (SD_MMC_SECTOR_SIZE/sizeof(*pRam)); 00865 while(wordsToWrite>0) 00866 { 00867 while(!mci_tx_ready(mci)); 00868 mci_wr_data(mci,*pRam++); 00869 while(!mci_tx_ready(mci)); 00870 mci_wr_data(mci,*pRam++); 00871 while(!mci_tx_ready(mci)); 00872 mci_wr_data(mci,*pRam++); 00873 while(!mci_tx_ready(mci)); 00874 mci_wr_data(mci,*pRam++); 00875 while(!mci_tx_ready(mci)); 00876 mci_wr_data(mci,*pRam++); 00877 while(!mci_tx_ready(mci)); 00878 mci_wr_data(mci,*pRam++); 00879 while(!mci_tx_ready(mci)); 00880 mci_wr_data(mci,*pRam++); 00881 while(!mci_tx_ready(mci)); 00882 mci_wr_data(mci,*pRam++); 00883 wordsToWrite-=8; 00884 } 00885 00886 return TRUE; 00887 }
Bool sd_mmc_set_block_len | ( | U8 | slot, | |
U16 | length | |||
) |
Definition at line 290 of file sd_mmc_mci.c.
References g_u8_card_bus_width, MMC_TRAN_STATE, MMC_TRAN_STATE_MSK, and SD_MMC_SET_BLOCKLEN_CMD.
Referenced by sd_mmc_mci_card_init().
00291 { 00292 if (slot > MCI_LAST_SLOTS) 00293 return FALSE; 00294 // Select Slot card before any other command. 00295 mci_select_card(mci, slot, g_u8_card_bus_width[slot]); 00296 00297 if(mci_send_cmd(mci, SD_MMC_SET_BLOCKLEN_CMD, length)!=MCI_SUCCESS) 00298 return FALSE; 00299 00300 // check response, card must be in TRAN state 00301 if ((mci_read_response(mci) & MMC_TRAN_STATE_MSK) != MMC_TRAN_STATE) 00302 return FALSE; 00303 00304 mci_set_block_size(mci, length); 00305 mci_set_block_count(mci, 1); 00306 return TRUE; 00307 }
U32 g_cpu_hz = 0 |
Definition at line 101 of file sd_mmc_mci.c.
U32 g_pbb_hz = 0 |
Definition at line 98 of file sd_mmc_mci.c.
U16 g_u16_card_freq[MCI_NR_SLOTS] |
Definition at line 69 of file sd_mmc_mci.c.
Referenced by sd_mmc_get_ext_csd(), sd_mmc_mci_card_init(), and sd_mmc_mci_get_csd().
U32 g_u32_card_rca[MCI_NR_SLOTS] |
Definition at line 67 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_card_init(), sd_mmc_mci_cmd_send_status(), sd_mmc_mci_dma_read_open(), sd_mmc_mci_get_csd(), and sd_mmc_mci_read_open().
U32 g_u32_card_size[MCI_NR_SLOTS] |
SD/MMC Card Size per Slot.
Definition at line 68 of file sd_mmc_mci.c.
Referenced by sd_mmc_get_ext_csd(), sd_mmc_mci_get_csd(), and sd_mmc_mci_read_capacity().
U8 g_u8_card_bus_width[MCI_NR_SLOTS] |
Definition at line 70 of file sd_mmc_mci.c.
Referenced by sd_mmc_get_ext_csd(), sd_mmc_mci_card_init(), sd_mmc_mci_cmd_send_status(), sd_mmc_mci_dma_read_open(), sd_mmc_mci_dma_write_open(), sd_mmc_mci_get_csd(), sd_mmc_mci_mem_check(), sd_mmc_mci_read_open(), sd_mmc_mci_write_open(), and sd_mmc_set_block_len().
U8 g_u8_card_type[MCI_NR_SLOTS] |
Definition at line 66 of file sd_mmc_mci.c.
Referenced by sd_mmc_get_ext_csd(), sd_mmc_mci_card_init(), sd_mmc_mci_dma_read_open(), sd_mmc_mci_dma_write_open(), sd_mmc_mci_get_csd(), sd_mmc_mci_read_open(), and sd_mmc_mci_write_open().
volatile U32 gl_ptr_mem[MCI_NR_SLOTS] = {0, 0} |
Definition at line 104 of file sd_mmc_mci.c.
volatile avr32_mci_t* mci = &AVR32_MCI |
Definition at line 107 of file sd_mmc_mci.c.
Bool sd_mmc_mci_init_done[MCI_NR_SLOTS] = {FALSE, FALSE} |
Initialization sequence status per Slot.
Definition at line 64 of file sd_mmc_mci.c.
Referenced by sd_mmc_mci_card_init(), sd_mmc_mci_mem_check(), and sd_mmc_mci_test_unit_ready().
U8 sector_buf_0[SD_MMC_SECTOR_SIZE] |
Definition at line 79 of file sd_mmc_mci.c.
U8 sector_buf_1[SD_MMC_SECTOR_SIZE] |
Definition at line 86 of file sd_mmc_mci.c.