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00048 #include <avr32/io.h>
00049 #include "compiler.h"
00050 #include "mdma.h"
00051
00052 unsigned long mdma_get_interrupt_settings(volatile avr32_mdma_t *mdma)
00053 {
00054 return mdma->imr;
00055 }
00056
00057 void mdma_configure_interrupts(volatile avr32_mdma_t *mdma, const mdma_interrupt_t *bitfield)
00058 {
00059 Bool global_interrupt_enabled = Is_global_interrupt_enabled();
00060
00061
00062 mdma->ier = bitfield->ch0c << AVR32_MDMA_IER_CH0C_OFFSET |
00063 bitfield->ch1c << AVR32_MDMA_IER_CH1C_OFFSET |
00064 bitfield->ch2c << AVR32_MDMA_IER_CH2C_OFFSET |
00065 bitfield->ch3c << AVR32_MDMA_IER_CH3C_OFFSET |
00066 bitfield->berr0 << AVR32_MDMA_IER_BERR0_OFFSET |
00067 bitfield->berr1 << AVR32_MDMA_IER_BERR1_OFFSET |
00068 bitfield->berr2 << AVR32_MDMA_IER_BERR2_OFFSET |
00069 bitfield->berr3 << AVR32_MDMA_IER_BERR3_OFFSET ;
00070
00071
00072
00073 if (global_interrupt_enabled) Disable_global_interrupt();
00074 mdma->idr = (~bitfield->ch0c & 1) << AVR32_MDMA_IDR_CH0C_OFFSET |
00075 (~bitfield->ch1c & 1) << AVR32_MDMA_IDR_CH1C_OFFSET |
00076 (~bitfield->ch2c & 1) << AVR32_MDMA_IDR_CH2C_OFFSET |
00077 (~bitfield->ch3c & 1) << AVR32_MDMA_IDR_CH3C_OFFSET |
00078 (~bitfield->berr0 & 1) << AVR32_MDMA_IDR_BERR0_OFFSET |
00079 (~bitfield->berr1 & 1) << AVR32_MDMA_IDR_BERR1_OFFSET |
00080 (~bitfield->berr2 & 1) << AVR32_MDMA_IDR_BERR2_OFFSET |
00081 (~bitfield->berr3 & 1) << AVR32_MDMA_IDR_BERR3_OFFSET ;
00082
00083 if (global_interrupt_enabled) Enable_global_interrupt();
00084
00085 }
00086
00087 void mdma_single_mode_xfert_init(volatile avr32_mdma_t *mdma, U32 channel, const mdma_opt_t *opt, U32* src, U32* dest)
00088 {
00089 mdma->channel[channel].ccr = opt->count << AVR32_MDMA_CCR0_TCNT_OFFSET |
00090 opt->size << AVR32_MDMA_CCR0_SIZE_OFFSET |
00091 opt->burst_size << AVR32_MDMA_CCR0_BURST_OFFSET |
00092 opt->tc_ienable << AVR32_MDMA_CCR0_TCIE_OFFSET ;
00093 mdma->channel[channel].rar = (U32)src ;
00094 mdma->channel[channel].war = (U32)dest;
00095 mdma->cr = (MDMA_SINGLE_TRANSFERT_MODE)<< (channel) << (AVR32_MDMA_CR_CH0M_OFFSET) ;
00096 }
00097
00098 void mdma_descriptor_mode_xfert_init(volatile avr32_mdma_t *mdma, U32 channel, U32* start_adress)
00099 {
00100 mdma->descriptor_channel[channel].dsa = (U32)start_adress;
00101 mdma->channel[channel].cdar = (U32)start_adress;
00102 }
00103
00104 void mdma_start_single_xfert(volatile avr32_mdma_t *mdma, U32 channels, U8 arbitration)
00105 {
00106 mdma->CR.arb = arbitration;
00107 mdma->cr = (1<<channels)<< (AVR32_MDMA_CR_CH0EN_OFFSET);
00108 }
00109
00110 void mdma_start_descriptor_xfert(volatile avr32_mdma_t *mdma, U32 channels, U8 arbitration)
00111 {
00112 mdma->CR.arb = arbitration;
00113 mdma->cr |= ((1<<channels)<<AVR32_MDMA_CR_CH0EN_OFFSET)|(((MDMA_DESCRIPTOR_MODE)<<channels)<<AVR32_MDMA_CR_CH0M_OFFSET);
00114 }
00115
00116 int mdma_stop_channels(volatile avr32_mdma_t *mdma, U32 channels)
00117 {
00118 int timeout = MDMA_DEFAULT_TIMEOUT;
00119
00120 while (mdma->cr & (1<<channels)<< (AVR32_MDMA_CR_CH0DIS_OFFSET) )
00121 {
00122 if (!timeout--) return MDMA_FAILURE;
00123 }
00124 return MDMA_SUCCESS;
00125 }
00126
00127 int mdma_channels_is_enable(volatile avr32_mdma_t *mdma, U32 channels)
00128 {
00129 if(mdma->cr&((1<<channels)<<(AVR32_MDMA_CR_CH0EN_OFFSET)))
00130 return MDMA_SUCCESS;
00131 else
00132 return MDMA_FAILURE;
00133 }