00001
00086 #include <string.h>
00087
00088 #include "board.h"
00089 #include "print_funcs.h"
00090 #include "gpio.h"
00091 #include "pm.h"
00092 #include "intc.h"
00093 #include "usart.h"
00094 #include "aes.h"
00095
00096
00099
00100 #if BOARD == EVK1104
00101 # define DMACA_AES_EVAL_USART (&AVR32_USART1)
00102 # define DMACA_AES_EVAL_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN
00103 # define DMACA_AES_EVAL_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION
00104 # define DMACA_AES_EVAL_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN
00105 # define DMACA_AES_EVAL_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION
00106 # define DMACA_AES_EVAL_USART_BAUDRATE 57600
00107 # define DMACA_AES_EVAL_LED1 LED0_GPIO
00108 # define DMACA_AES_EVAL_LED2 LED1_GPIO
00109 # define DMACA_AES_EVAL_LED3 LED2_GPIO
00110 #endif
00111
00112 #if !defined(DMACA_AES_EVAL_USART) || \
00113 !defined(DMACA_AES_EVAL_USART_RX_PIN) || \
00114 !defined(DMACA_AES_EVAL_USART_RX_FUNCTION) || \
00115 !defined(DMACA_AES_EVAL_USART_TX_PIN) || \
00116 !defined(DMACA_AES_EVAL_USART_TX_FUNCTION) || \
00117 !defined(DMACA_AES_EVAL_USART_BAUDRATE) || \
00118 !defined(DMACA_AES_EVAL_LED1) || \
00119 !defined(DMACA_AES_EVAL_LED2) || \
00120 !defined(DMACA_AES_EVAL_LED3)
00121 # error The USART and LEDs configuration to use for debug on your board is missing
00122 #endif
00124
00125
00126 #define DMACA_AES_EVAL_BUF_SIZE 256
00127
00128 #define DMACA_AES_EVAL_REFBUF_SIZE 16
00129
00130
00131 const unsigned int RefInputData[DMACA_AES_EVAL_REFBUF_SIZE] = {
00132 0x6bc1bee2,
00133 0x2e409f96,
00134 0xe93d7e11,
00135 0x7393172a,
00136 0xae2d8a57,
00137 0x1e03ac9c,
00138 0x9eb76fac,
00139 0x45af8e51,
00140 0x30c81c46,
00141 0xa35ce411,
00142 0xe5fbc119,
00143 0x1a0a52ef,
00144 0xf69f2445,
00145 0xdf4f9b17,
00146 0xad2b417b,
00147 0xe66c3710 };
00148
00149
00150
00151 const unsigned int CipherKey[8] = {
00152 0x603deb10,
00153 0x15ca71be,
00154 0x2b73aef0,
00155 0x857d7781,
00156 0x1f352c07,
00157 0x3b6108d7,
00158 0x2d9810a3,
00159 0x0914dff4
00160 };
00161
00162
00163
00164 const unsigned int InitVector[4] = {
00165 0x00010203,
00166 0x04050607,
00167 0x08090a0b,
00168 0x0c0d0e0f
00169 };
00170
00171
00172 const unsigned int RefOutputData[DMACA_AES_EVAL_REFBUF_SIZE] = {
00173 0xf58c4c04,
00174 0xd6e5f1ba,
00175 0x779eabfb,
00176 0x5f7bfbd6,
00177 0x9cfc4e96,
00178 0x7edb808d,
00179 0x679f777b,
00180 0xc6702c7d,
00181 0x39f23369,
00182 0xa9d9bacf,
00183 0xa530e263,
00184 0x04231461,
00185 0xb2eb05e2,
00186 0xc39be9fc,
00187 0xda6c1907,
00188 0x8c6a9d1b };
00189
00190 unsigned int InputData[DMACA_AES_EVAL_BUF_SIZE];
00191 volatile unsigned int OutputData[DMACA_AES_EVAL_BUF_SIZE];
00192
00193 unsigned int *pSrcData_HsbSram;
00194 volatile unsigned int *pDstData_HsbSram;
00195
00196 volatile unsigned int ccountt0, ccountt1;
00197
00198 pm_freq_param_t pm_freq_param =
00199 {
00200 .cpu_f = DMACA_AES_EVAL_CPU_FREQ,
00201 .pba_f = DMACA_AES_EVAL_CPU_FREQ,
00202 .osc0_f = FOSC0,
00203 .osc0_startup = OSC0_STARTUP
00204 };
00205
00206
00207
00214 void test_ram_aes_ram(unsigned short int u16BufferSize, unsigned int *pSrcBuf, unsigned int *pDstBuf)
00215 {
00216 unsigned int i;
00217 unsigned char TestResult = TRUE;
00218
00219
00220
00221
00222
00223
00224 AVR32_DMACA.dmacfgreg = 1 << AVR32_DMACA_DMACFGREG_DMA_EN_OFFSET;
00225
00226
00227
00228
00229
00230
00231
00232
00233
00234
00235
00236
00237
00238
00239
00240 AVR32_DMACA.sar0 = (unsigned long)pSrcBuf;
00241
00242
00243 AVR32_DMACA.dar0 = (AVR32_AES_ADDRESS | AVR32_AES_IDATA1R);
00244
00245
00246 AVR32_DMACA.llp0 = 0x00000000;
00247
00248
00249 AVR32_DMACA.ctl0l =
00250 (0 << AVR32_DMACA_CTL0L_INT_EN_OFFSET) |
00251 (2 << AVR32_DMACA_CTL0L_DST_TR_WIDTH_OFFSET) |
00252 (2 << AVR32_DMACA_CTL0L_SRC_TR_WIDTH_OFFSET) |
00253 (2 << AVR32_DMACA_CTL0L_DINC_OFFSET) |
00254 (0 << AVR32_DMACA_CTL0L_SINC_OFFSET) |
00255 (1 << AVR32_DMACA_CTL0L_DST_MSIZE_OFFSET) |
00256 (1 << AVR32_DMACA_CTL0L_SRC_MSIZE_OFFSET) |
00257 (0 << AVR32_DMACA_CTL0L_S_GATH_EN_OFFSET) |
00258 (0 << AVR32_DMACA_CTL0L_D_SCAT_EN_OFFSET) |
00259 (1 << AVR32_DMACA_CTL0L_TT_FC_OFFSET) |
00260 (0 << AVR32_DMACA_CTL0L_DMS_OFFSET) |
00261 (1 << AVR32_DMACA_CTL0L_SMS_OFFSET) |
00262 (0 << AVR32_DMACA_CTL0L_LLP_D_EN_OFFSET) |
00263 (0 << AVR32_DMACA_CTL0L_LLP_S_EN_OFFSET)
00264 ;
00265
00266
00267 AVR32_DMACA.ctl0h =
00268 (u16BufferSize << AVR32_DMACA_CTL0H_BLOCK_TS_OFFSET) |
00269 (0 << AVR32_DMACA_CTL0H_DONE_OFFSET)
00270 ;
00271
00272
00273 AVR32_DMACA.cfg0l =
00274 (0 << AVR32_DMACA_CFG0L_HS_SEL_DST_OFFSET) |
00275 (0 << AVR32_DMACA_CFG0L_HS_SEL_SRC_OFFSET)
00276 ;
00277
00278
00279 AVR32_DMACA.cfg0h =
00280 (AVR32_DMACA_CH_AES_TX << AVR32_DMACA_CFG0H_DEST_PER_OFFSET) |
00281 (0 << AVR32_DMACA_CFG0H_SRC_PER_OFFSET)
00282 ;
00283
00284
00285
00286
00287
00288
00289
00290
00291
00292
00293
00294
00295
00296
00297
00298
00299 AVR32_DMACA.sar1 = (AVR32_AES_ADDRESS | AVR32_AES_ODATA1R);
00300
00301
00302 AVR32_DMACA.dar1 = (unsigned long)pDstBuf;
00303
00304
00305 AVR32_DMACA.llp1 = 0x00000000;
00306
00307
00308 AVR32_DMACA.ctl1l =
00309 (0 << AVR32_DMACA_CTL1L_INT_EN_OFFSET) |
00310 (2 << AVR32_DMACA_CTL1L_DST_TR_WIDTH_OFFSET) |
00311 (2 << AVR32_DMACA_CTL1L_SRC_TR_WIDTH_OFFSET) |
00312 (0 << AVR32_DMACA_CTL1L_DINC_OFFSET) |
00313 (2 << AVR32_DMACA_CTL1L_SINC_OFFSET) |
00314 (1 << AVR32_DMACA_CTL1L_DST_MSIZE_OFFSET) |
00315 (1 << AVR32_DMACA_CTL1L_SRC_MSIZE_OFFSET) |
00316 (0 << AVR32_DMACA_CTL1L_S_GATH_EN_OFFSET) |
00317 (0 << AVR32_DMACA_CTL1L_D_SCAT_EN_OFFSET) |
00318 (2 << AVR32_DMACA_CTL1L_TT_FC_OFFSET) |
00319 (1 << AVR32_DMACA_CTL1L_DMS_OFFSET) |
00320 (0 << AVR32_DMACA_CTL1L_SMS_OFFSET) |
00321 (0 << AVR32_DMACA_CTL1L_LLP_D_EN_OFFSET) |
00322 (0 << AVR32_DMACA_CTL1L_LLP_S_EN_OFFSET)
00323 ;
00324
00325
00326 AVR32_DMACA.ctl1h =
00327 (u16BufferSize << AVR32_DMACA_CTL1H_BLOCK_TS_OFFSET) |
00328 (0 << AVR32_DMACA_CTL1H_DONE_OFFSET)
00329 ;
00330
00331
00332 AVR32_DMACA.cfg1l =
00333 (0 << AVR32_DMACA_CFG1L_HS_SEL_DST_OFFSET) |
00334 (0 << AVR32_DMACA_CFG1L_HS_SEL_SRC_OFFSET)
00335 ;
00336
00337
00338 AVR32_DMACA.cfg1h =
00339 (0 << AVR32_DMACA_CFG1H_DEST_PER_OFFSET) |
00340 (AVR32_DMACA_CH_AES_RX << AVR32_DMACA_CFG1H_SRC_PER_OFFSET)
00341 ;
00342
00343
00344
00345
00346
00347
00348 aes_set_key(&AVR32_AES, CipherKey);
00349
00350
00351 aes_set_initvector(&AVR32_AES, InitVector);
00352
00353
00354
00355
00356 ccountt0 = Get_system_register(AVR32_COUNT);
00357
00358
00359 AVR32_DMACA.chenreg = ((3<<AVR32_DMACA_CHENREG_CH_EN_OFFSET) | (3<<AVR32_DMACA_CHENREG_CH_EN_WE_OFFSET));
00360
00361
00362 while(AVR32_DMACA.chenreg & (2<<AVR32_DMACA_CHENREG_CH_EN_OFFSET));
00363
00364 ccountt1 = Get_system_register(AVR32_COUNT);
00365
00366
00367 for(i=0; i<DMACA_AES_EVAL_REFBUF_SIZE; i++)
00368 {
00369 if(OutputData[i] != RefOutputData[i])
00370 {
00371 TestResult = FALSE;
00372 break;
00373 }
00374 }
00375 if(FALSE == TestResult)
00376 print(DMACA_AES_EVAL_USART, "KO!!!\n");
00377 else
00378 {
00379 print(DMACA_AES_EVAL_USART, "OK!!! Nb cycles: ");
00380 print_ulong(DMACA_AES_EVAL_USART, ccountt1 - ccountt0);
00381 }
00382 }
00383
00384
00387 static void init_hmatrix(void)
00388 {
00389
00390
00391 avr32_hmatrix_scfg_t scfg;
00392
00393 scfg = AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_FLASH];
00394 scfg.defmstr_type = AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT;
00395 AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_FLASH] = scfg;
00396
00397 scfg = AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_AES];
00398 scfg.defmstr_type = AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT;
00399 AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_AES] = scfg;
00400
00401 scfg = AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_SRAM];
00402 scfg.defmstr_type = AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT;
00403 AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_SRAM] = scfg;
00404
00405 scfg = AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_EMBEDDED_SYS_SRAM_0];
00406 scfg.defmstr_type = AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT;
00407 AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_EMBEDDED_SYS_SRAM_0] = scfg;
00408
00409 scfg = AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_EMBEDDED_SYS_SRAM_1];
00410 scfg.defmstr_type = AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT;
00411 AVR32_HMATRIX.SCFG[AVR32_HMATRIX_SLAVE_EMBEDDED_SYS_SRAM_1] = scfg;
00412 }
00413
00414
00422 int main(void)
00423 {
00424 aes_config_t AesConf;
00425 int i;
00426 static const gpio_map_t USART_GPIO_MAP =
00427 {
00428 {DMACA_AES_EVAL_USART_RX_PIN, DMACA_AES_EVAL_USART_RX_FUNCTION},
00429 {DMACA_AES_EVAL_USART_TX_PIN, DMACA_AES_EVAL_USART_TX_FUNCTION}
00430 };
00431 static const usart_options_t USART_OPTIONS =
00432 {
00433 .baudrate = DMACA_AES_EVAL_USART_BAUDRATE,
00434 .charlength = 8,
00435 .paritytype = USART_NO_PARITY,
00436 .stopbits = USART_1_STOPBIT,
00437 .channelmode = USART_NORMAL_CHMODE
00438 };
00439
00440
00441 #if BOARD == EVK1104
00442 if( PM_FREQ_STATUS_FAIL==pm_configure_clocks(&pm_freq_param) )
00443 while(1);
00444 #endif
00445
00446 init_hmatrix();
00447
00448
00449 gpio_enable_module(USART_GPIO_MAP,
00450 sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));
00451
00452
00453 usart_init_rs232(DMACA_AES_EVAL_USART, &USART_OPTIONS, DMACA_AES_EVAL_CPU_FREQ);
00454 print(DMACA_AES_EVAL_USART, "\x1B[2J\x1B[H.: Using the AES with the DMACA at ");
00455 print_ulong(DMACA_AES_EVAL_USART, DMACA_AES_EVAL_CPU_FREQ);
00456 print(DMACA_AES_EVAL_USART, "Hz :.\n\n");
00457
00458
00459
00460
00461
00462
00463
00464
00465
00466 for(i=0; i<DMACA_AES_EVAL_BUF_SIZE; i+=DMACA_AES_EVAL_REFBUF_SIZE)
00467 {
00468 memcpy(InputData+i, RefInputData, DMACA_AES_EVAL_REFBUF_SIZE*sizeof(unsigned int));
00469 }
00470
00471
00472
00473
00474 AesConf.ProcessingMode = AES_PMODE_CIPHER;
00475 AesConf.ProcessingDelay = 0;
00476 AesConf.StartMode = AES_START_MODE_DMA;
00477 AesConf.KeySize = AES_KEY_SIZE_256;
00478 AesConf.OpMode = AES_CBC_MODE;
00479 AesConf.LodMode = 0;
00480
00481
00482 AesConf.CFBSize = 0;
00483 AesConf.CounterMeasureMask = 0;
00484 aes_configure(&AVR32_AES, &AesConf);
00485
00486
00487
00488
00489
00490
00491 print(DMACA_AES_EVAL_USART, "\n---------------------------------------------------\n");
00492 print(DMACA_AES_EVAL_USART, "------ Cipher in DMA Mode: CPUSRAM -> AES -> CPUSRAM ------\n");
00493 print(DMACA_AES_EVAL_USART, " - 256bit cryptographic key\n");
00494 print(DMACA_AES_EVAL_USART, " - CBC cipher mode\n");
00495 print(DMACA_AES_EVAL_USART, " - No counter measures\n");
00496 print(DMACA_AES_EVAL_USART, " - input of 16 32bit words in CPUSRAM\n");
00497 print(DMACA_AES_EVAL_USART, " - output of 16 32bit words in CPUSRAM\n");
00498 print(DMACA_AES_EVAL_USART, "---------------------------------------------------\n");
00499
00500 test_ram_aes_ram(16, (unsigned int *)InputData, (unsigned int *)OutputData);
00501 gpio_clr_gpio_pin(DMACA_AES_EVAL_LED1);
00502
00503
00504
00505
00506
00507 print(DMACA_AES_EVAL_USART, "\n---------------------------------------------------\n");
00508 print(DMACA_AES_EVAL_USART, "------ Cipher in DMA Mode: CPUSRAM -> AES -> CPUSRAM ------\n");
00509 print(DMACA_AES_EVAL_USART, " - 256bit cryptographic key\n");
00510 print(DMACA_AES_EVAL_USART, " - CBC cipher mode\n");
00511 print(DMACA_AES_EVAL_USART, " - No counter measures\n");
00512 print(DMACA_AES_EVAL_USART, " - input of 256 32bit words in CPUSRAM\n");
00513 print(DMACA_AES_EVAL_USART, " - output of 256 32bit words in CPUSRAM\n");
00514 print(DMACA_AES_EVAL_USART, "---------------------------------------------------\n");
00515
00516 test_ram_aes_ram(256, (unsigned int *)InputData, (unsigned int *)OutputData);
00517 gpio_clr_gpio_pin(DMACA_AES_EVAL_LED2);
00518
00519
00520
00521
00522
00523 print(DMACA_AES_EVAL_USART, "\n---------------------------------------------------\n");
00524 print(DMACA_AES_EVAL_USART, "------ Cipher in DMA Mode: HSBSRAM0 -> AES -> HSBSRAM1 ------\n");
00525 print(DMACA_AES_EVAL_USART, " - 256bit cryptographic key\n");
00526 print(DMACA_AES_EVAL_USART, " - CBC cipher mode\n");
00527 print(DMACA_AES_EVAL_USART, " - No counter measures\n");
00528 print(DMACA_AES_EVAL_USART, " - input of 256 32bit words in HSBSRAM0\n");
00529 print(DMACA_AES_EVAL_USART, " - output of 256 32bit words in HSBSRAM1\n");
00530 print(DMACA_AES_EVAL_USART, "---------------------------------------------------\n");
00531
00532
00533 pSrcData_HsbSram = (unsigned int *)AVR32_INTRAM0_ADDRESS;
00534 pDstData_HsbSram = (unsigned int *)AVR32_INTRAM1_ADDRESS;
00535
00536 for(i=0; i<DMACA_AES_EVAL_BUF_SIZE; i+=DMACA_AES_EVAL_REFBUF_SIZE)
00537 {
00538 memcpy(pSrcData_HsbSram+i, RefInputData, DMACA_AES_EVAL_REFBUF_SIZE*sizeof(unsigned int));
00539 }
00540
00541 test_ram_aes_ram(256, pSrcData_HsbSram, (unsigned int *)pDstData_HsbSram);
00542 gpio_clr_gpio_pin(DMACA_AES_EVAL_LED3);
00543 print(DMACA_AES_EVAL_USART, "\r\nDone!");
00544
00545
00546 SLEEP(AVR32_PM_SMODE_STATIC);
00547 while (TRUE);
00548 }