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AVR UC3 Series Software Framework: System Control InterFace Driver

Copyright © 2009 Atmel Corporation

System Control InterFace Software Driver

  • UC3 L series
  • The System Control Interface (SCIF) controls the Oscillators, DFLL, Generic Clocks, BODs, Temperature Sensor, VREG and retention registers.

     

    The driver is composed of scif_uc3l.c and scif_uc3l.h.

     

    This driver provides interfaces for SCIF main hardware features:

  • Power and Clocks Status Function,
  • OSC0 oscillator setup,
  • OSC32 oscillator setup,
  • DFLL setup,
  • Bandgap, voltage regulator, RCOSC, Supply Monitor 3.3V, Temperature Sensor calibration functions
  • 120MHz RCOSC setup,
  • 32kHz RCOSC setup,
  • Generic clocks setup,
  • Backup register setup,
  • SCIF interrupts setup.

     

    Three examples are available:

  • DFLL configuration to 22MHz and generic clock configuration to 44kHz and sleep mode example,
  • DFLL configuration to 24MHz and use DFLL as main clock source and clock domains configuration to 12MHz and generic clock configuration to 12MHz and sleep mode example.
  • OSC32K and generic clock configuration and sleep mode example.
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  • UC3 C series
  • The System Control Interface (SCIF) controls the Oscillators, PLL, Generic Clocks, BODs, Temperature Sensor, VREG and retention registers.

     

    The driver is composed of scif_uc3c.c and scif_uc3c.h.

     

    This driver provides interfaces for SCIF main hardware features:

  • Power and Clocks Status Function,
  • OSC0 and OSC1 oscillators setup,
  • OSC32 oscillator setup,
  • PLL0 and PLL1 setup,
  • Bandgap, voltage regulator, RCOSC, Supply Monitor 5V/3.3V, Temperature Sensor calibration functions
  • 120MHz RCOSC setup,
  • 8MHz RCOSC setup,
  • 32kHz RCOSC setup,
  • Generic clocks setup,
  • Backup register setup,
  • SCIF interrupts setup.

     

    One example is available: PLL and generic clock configuration and sleep mode example.

     


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