Definition in file smc_et024006dhu.h.
Go to the source code of this file.
Defines | |
#define | _SMC_ET024005DHU_H_ |
#define | EXT_SM_SIZE 0x200001 |
SMC Peripheral Memory Size in Bytes. | |
#define | NCS_CONTROLLED_READ FALSE |
Whether read is controlled by NCS or by NRD. | |
#define | NCS_CONTROLLED_WRITE FALSE |
Whether write is controlled by NCS or by NWE. | |
#define | NCS_RD_HOLD 30 |
#define | NCS_RD_PULSE 240 |
#define | NCS_RD_SETUP 0 |
#define | NCS_WR_HOLD 10 |
#define | NCS_WR_PULSE 90 |
#define | NCS_WR_SETUP 0 |
#define | NRD_CYCLE Max((NCS_RD_SETUP + NCS_RD_PULSE + NCS_RD_HOLD),(NRD_SETUP + NRD_PULSE + NRD_HOLD)) |
#define | NRD_HOLD 30 |
#define | NRD_PULSE 210 |
#define | NRD_SETUP 30 |
#define | NWAIT_MODE AVR32_SMC_EXNW_MODE_DISABLED |
Whether to use the NWAIT pin. | |
#define | NWE_CYCLE Max((NCS_WR_SETUP + NCS_WR_PULSE + NCS_WR_HOLD),(NWE_SETUP + NWE_PULSE + NWE_HOLD)) |
#define | NWE_HOLD 20 |
#define | NWE_PULSE 60 |
#define | NWE_SETUP 20 |
#define | PAGE_MODE DISABLED |
#define | PAGE_SIZE 0 |
#define | SMC_8_BIT_CHIPS FALSE |
Whether 8-bit SM chips are connected on the SMC. | |
#define | SMC_DBW 16 |
SMC Data Bus Width. | |
#define | TDF_CYCLES 0 |
#define | TDF_OPTIM DISABLED |
#define _SMC_ET024005DHU_H_ |
Definition at line 49 of file smc_et024006dhu.h.
#define EXT_SM_SIZE 0x200001 |
#define NCS_CONTROLLED_READ FALSE |
#define NCS_CONTROLLED_WRITE FALSE |
#define NCS_RD_HOLD 30 |
Definition at line 91 of file smc_et024006dhu.h.
#define NCS_RD_PULSE 240 |
Definition at line 88 of file smc_et024006dhu.h.
#define NCS_RD_SETUP 0 |
Definition at line 85 of file smc_et024006dhu.h.
#define NCS_WR_HOLD 10 |
Definition at line 70 of file smc_et024006dhu.h.
#define NCS_WR_PULSE 90 |
Definition at line 67 of file smc_et024006dhu.h.
#define NCS_WR_SETUP 0 |
Definition at line 64 of file smc_et024006dhu.h.
#define NRD_CYCLE Max((NCS_RD_SETUP + NCS_RD_PULSE + NCS_RD_HOLD),(NRD_SETUP + NRD_PULSE + NRD_HOLD)) |
Definition at line 103 of file smc_et024006dhu.h.
#define NRD_HOLD 30 |
Definition at line 100 of file smc_et024006dhu.h.
#define NRD_PULSE 210 |
Definition at line 97 of file smc_et024006dhu.h.
#define NRD_SETUP 30 |
Definition at line 94 of file smc_et024006dhu.h.
#define NWAIT_MODE AVR32_SMC_EXNW_MODE_DISABLED |
#define NWE_CYCLE Max((NCS_WR_SETUP + NCS_WR_PULSE + NCS_WR_HOLD),(NWE_SETUP + NWE_PULSE + NWE_HOLD)) |
Definition at line 82 of file smc_et024006dhu.h.
#define NWE_HOLD 20 |
Definition at line 79 of file smc_et024006dhu.h.
#define NWE_PULSE 60 |
Definition at line 76 of file smc_et024006dhu.h.
#define NWE_SETUP 20 |
Definition at line 73 of file smc_et024006dhu.h.
#define PAGE_MODE DISABLED |
Definition at line 112 of file smc_et024006dhu.h.
#define PAGE_SIZE 0 |
Definition at line 113 of file smc_et024006dhu.h.
#define SMC_8_BIT_CHIPS FALSE |
#define SMC_DBW 16 |
#define TDF_CYCLES 0 |
Definition at line 108 of file smc_et024006dhu.h.
#define TDF_OPTIM DISABLED |
Definition at line 109 of file smc_et024006dhu.h.