pwm4.h File Reference


Detailed Description

PWM driver for AVR32 UC3 with PWM module version above 400.

This file defines a useful set of functions for the PWM interface on AVR32 devices.

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file pwm4.h.

#include <avr32/io.h>
#include "compiler.h"

Go to the source code of this file.

Data Structures

struct  pwm_compare_opt_t
struct  pwm_opt_t
 Input parameters when initializing a PWM channel. More...
struct  pwm_output_override_opt_t

Defines

#define AVR32_PWM_LINES_MSB   4
 Local Definition for the number of PWM Lines.
#define PWM_CKSEL_GCLK   1
 PWM Clock Input is Generic Clock.
#define PWM_CKSEL_MCK   0
 PWM Clock Input is Master Clock.
#define PWM_COMPARE_MODE_DOWN   1
 PWM Compare DOWN.
#define PWM_COMPARE_MODE_UP   0
 PWM Compare UP.
#define PWM_COMPARE_OFF   0
 PWM Compare OFF.
#define PWM_COMPARE_ON   1
 PWM Compare ON.
#define PWM_EVENT_LINE0   (1<<AVR32_PWM_EL0MR_CSEL0_OFFSET)
#define PWM_EVENT_LINE1   (1<<AVR32_PWM_EL0MR_CSEL1_OFFSET)
#define PWM_EVENT_LINE2   (1<<AVR32_PWM_EL0MR_CSEL2_OFFSET)
#define PWM_EVENT_LINE3   (1<<AVR32_PWM_EL0MR_CSEL3_OFFSET)
#define PWM_EVENT_LINE4   (1<<AVR32_PWM_EL0MR_CSEL4_OFFSET)
#define PWM_EVENT_LINE5   (1<<AVR32_PWM_EL0MR_CSEL5_OFFSET)
#define PWM_EVENT_LINE6   (1<<AVR32_PWM_EL0MR_CSEL6_OFFSET)
#define PWM_EVENT_LINE7   (1<<AVR32_PWM_EL0MR_CSEL7_OFFSET)
#define PWM_FAILURE   -1
#define PWM_FAULT_INPUT_ACTIVE_HIGH   1
 PWM Fault Input Active High State.
#define PWM_FAULT_INPUT_ACTIVE_LOW   0
 PWM Fault Input Active Low State.
#define PWM_FAULT_INPUT_FILTER_OFF   0
 PWM Fault Input Filtering Option OFF.
#define PWM_FAULT_INPUT_FILTER_ON   1
 PWM Fault Input Filtering Option ON.
#define PWM_FAULT_INPUT_NOT_USED   0
 PWM Fault Input Not Used.
#define PWM_FAULT_INPUT_USED   1
 PWM Fault Input Used.
#define PWM_FAULT_LINES   8
 PWM Number of Fault Lines.
#define PWM_FAULT_MODE_LEVEL   0
 PWM Fault Mode Level.
#define PWM_FAULT_MODE_TGL   1
 PWM Fault Mode Toggle.
#define PWM_FAULT_OUTPUT   4
 PWM Fault Output Lines: PWM0,1,2,3 => 4.
#define PWM_INVALID_ARGUMENT   1
 Value returned by function when the channel number is invalid.
#define PWM_INVALID_INPUT   1
 Value returned by function when the input paramters are out of range.
#define PWM_MODE_CENTER_ALIGNED   1
 Operate PWM channel in center aligned mode.
#define PWM_MODE_LEFT_ALIGNED   0
 Operate PWM channel in left aligned mode.
#define PWM_NO_WRITE_PROTECT_VIOLATION   0xFFFFFFFF
 PWM No Write To Protected Register Status.
#define PWM_OOV_CTRL_OFF   0
 PWM Output Override Control OFF.
#define PWM_OOV_CTRL_ON   1
 PWM Output Override Control ON.
#define PWM_OOV_LINES   4
 PWM Ouptut Override Number of Lines: PWM0,1,2,3 => 4.
#define PWM_OOV_VALUE_HIGH   1
 PWM Output Override Value High Level.
#define PWM_OOV_VALUE_LOW   0
 PWM Output Override Value Low Level.
#define PWM_OUTPUT_HIGH_WHEN_FAULT_DETECTION   1
 PWM Output High Level when fault detection.
#define PWM_OUTPUT_LOW_WHEN_FAULT_DETECTION   0
 PWM Output Low Level when fault detection.
#define PWM_POLARITY_HIGH   1
 PWM channel starts output high level.
#define PWM_POLARITY_LOW   0
 PWM channel starts output low level.
#define PWM_SUCCESS   0
 Value returned by function when it completed successfully.
#define PWM_SYNC_CHANNEL_OFF   1
 PWM Sync channel OFF.
#define PWM_SYNC_CHANNEL_ON   1
 PWM Sync channel ON.
#define PWM_SYNC_UPDATE_AUTO_WRITE_AUTO_UPDATE   2
 PWM Automatic Write And Automatic Update Period, Duty Cycle and Event Method.
#define PWM_SYNC_UPDATE_MANUAL_WRITE_AUTO_UPDATE   1
 PWM Manual Write And Automatic Update Period, Duty Cycle and Event Method.
#define PWM_SYNC_UPDATE_MANUAL_WRITE_MANUAL_UPDATE   0
 PWM Manual Write And Manual Update Period, Duty Cycle and Event Method.
#define PWM_UPDATE_DUTY   0
 PWM channel write in CUPDx updates duty cycle at the next period start event.
#define PWM_UPDATE_PERIOD   1
 PWM channel write in CUPDx updates period at the next period start event.
#define PWM_UPDLOCK_TRIGGER   1
 PWM Update Lock State.
#define PWM_WPKEY   0x50574D
 PWM Protection Key.

Functions

int pwm_channel_init (unsigned int channel_id, const avr32_pwm_channel_t *pwm_channel)
 Initialize a specific PWM channel.
void pwm_clr_fault_status ()
 Return Fault Status.
int pwm_compare_disable (int line)
 Compare Match Disable.
int pwm_compare_enable (int line)
 Compare Match Enable.
int pwm_compare_event_disable (int line, int event_line)
 Compare Event Disable.
int pwm_compare_event_enable (int line, int event_line)
 Compare Event Enable.
int pwm_compare_match_reload_setup (int line, pwm_compare_opt_t *pwm_compare_t)
 Compare Match Reload Setup.
int pwm_compare_match_setup (int line, pwm_compare_opt_t *pwm_compare_t)
 Compare Match Setup.
int pwm_compare_reload_update_period_value (int line, pwm_compare_opt_t *pwm_compare_t)
 Compare Reload Update Period.
int pwm_compare_update_period_value (int line, pwm_compare_opt_t *pwm_compare_t)
 Fault Lines Enable function.
int pwm_fault_lines_enable (U8 line, U8 channel)
 Fault Lines Enable function.
int pwm_fault_lines_level_setup (U8 line, U8 channel_high, U8 channel_low)
 Fault Lines Level Setup Function.
int pwm_fault_lines_polarity_setup (U8 line, U8 polarity, U8 mode, U8 filter)
 Fault Lines Level Polarity Function.
int pwm_get_fault_status ()
 Get Fault Status.
unsigned int pwm_get_update_period_counter_value ()
 Return Current Counter of Update Period Value.
int pwm_init (pwm_opt_t *opt)
 This function initialize the PWM controller (mode register) and disable the interrupt.
int pwm_interrupt_update_channel (unsigned int channel_id, const avr32_pwm_channel_t *pwm_channel)
 Update channel register CPRDx or CDTYx with the interrupt method. This function uses the CUPDx register as a double buffer for the period or the duty cycle. Only the first 20 bits of cupd are significant.
int pwm_output_override_setup (pwm_output_override_opt_t *opt)
 Output Override Configuration. This function uses the OS and OOV registers.
int pwm_output_override_write (pwm_output_override_opt_t *opt)
 Output Override Set. This function uses the OS and OOV registers.
int pwm_start_channels (unsigned long channels_bitmask)
 Start PWM channels.
int pwm_stop_channels (unsigned long channels_bitmask)
 Stop PWM channels.
int pwm_synchronous_prepare_update (unsigned int channel_id, const avr32_pwm_channel_t *pwm_channel)
 Prepare a Synchronous Channel, User should call this function for all the synchronous channel.
int pwm_update_auto_write_auto_update_check_eot ()
 Synchronous Update with Manual Write and Auto Update Method.
int pwm_update_auto_write_auto_update_check_ready ()
 Synchronous Update with Manual Write and Auto Update Method.
int pwm_update_channel (unsigned int channel_id, const avr32_pwm_channel_t *pwm_channel)
 Update channel register CPRDx or CDTYx with the polling method. This function uses the CUPDx register as a double buffer for the period or the duty cycle. Only the first 20 bits of cupd are significant.
int pwm_update_manual_write_auto_update ()
 Synchronous Update with Manual Write and Auto Update Method.
int pwm_update_manual_write_manual_update ()
 Synchronous Update with Manual Write and Manual Update Method.
int pwm_update_period_value (unsigned int value)
 Define Update Period Value For Update Of Synchronous Channel.
int pwm_update_period_value_update (unsigned int value)
 Define Update Period Value For Update Of Synchronous Channel after a first init.
int pwm_write_protect_hw_lock (int group)
 Hardware Write Protect Lock Function. This function uses the WPMR register.
U32 pwm_write_protect_status ()
 Write Protect Status Function. This function uses the WPSR register.
int pwm_write_protect_sw_lock (int group)
 Software Write Protect Lock Function. This function uses the WPMR register.
int pwm_write_protect_sw_unlock (int group)
 Software Write Protect Unlock Function. This function uses the WPMR register.


Define Documentation

#define AVR32_PWM_LINES_MSB   4

Local Definition for the number of PWM Lines.

Definition at line 57 of file pwm4.h.

Referenced by pwm_channel_init(), pwm_init(), pwm_interrupt_update_channel(), pwm_start_channels(), pwm_stop_channels(), pwm_synchronous_prepare_update(), and pwm_update_channel().

#define PWM_CKSEL_GCLK   1

PWM Clock Input is Generic Clock.

Definition at line 170 of file pwm4.h.

Referenced by main().

#define PWM_CKSEL_MCK   0

PWM Clock Input is Master Clock.

Definition at line 167 of file pwm4.h.

#define PWM_COMPARE_MODE_DOWN   1

PWM Compare DOWN.

Definition at line 176 of file pwm4.h.

#define PWM_COMPARE_MODE_UP   0

PWM Compare UP.

Definition at line 173 of file pwm4.h.

#define PWM_COMPARE_OFF   0

PWM Compare OFF.

Definition at line 182 of file pwm4.h.

#define PWM_COMPARE_ON   1

PWM Compare ON.

Definition at line 179 of file pwm4.h.

#define PWM_EVENT_LINE0   (1<<AVR32_PWM_EL0MR_CSEL0_OFFSET)

Definition at line 184 of file pwm4.h.

#define PWM_EVENT_LINE1   (1<<AVR32_PWM_EL0MR_CSEL1_OFFSET)

Definition at line 186 of file pwm4.h.

#define PWM_EVENT_LINE2   (1<<AVR32_PWM_EL0MR_CSEL2_OFFSET)

Definition at line 188 of file pwm4.h.

#define PWM_EVENT_LINE3   (1<<AVR32_PWM_EL0MR_CSEL3_OFFSET)

Definition at line 190 of file pwm4.h.

#define PWM_EVENT_LINE4   (1<<AVR32_PWM_EL0MR_CSEL4_OFFSET)

Definition at line 192 of file pwm4.h.

#define PWM_EVENT_LINE5   (1<<AVR32_PWM_EL0MR_CSEL5_OFFSET)

Definition at line 194 of file pwm4.h.

#define PWM_EVENT_LINE6   (1<<AVR32_PWM_EL0MR_CSEL6_OFFSET)

Definition at line 196 of file pwm4.h.

#define PWM_EVENT_LINE7   (1<<AVR32_PWM_EL0MR_CSEL7_OFFSET)

Definition at line 198 of file pwm4.h.

#define PWM_FAILURE   -1

Value returned by function when it was unable to complete successfully for some unspecified reason.

Definition at line 64 of file pwm4.h.

Referenced by pwm_write_protect_hw_lock(), pwm_write_protect_sw_lock(), and pwm_write_protect_sw_unlock().

#define PWM_FAULT_INPUT_ACTIVE_HIGH   1

PWM Fault Input Active High State.

Definition at line 136 of file pwm4.h.

#define PWM_FAULT_INPUT_ACTIVE_LOW   0

PWM Fault Input Active Low State.

Definition at line 133 of file pwm4.h.

#define PWM_FAULT_INPUT_FILTER_OFF   0

PWM Fault Input Filtering Option OFF.

Definition at line 139 of file pwm4.h.

#define PWM_FAULT_INPUT_FILTER_ON   1

PWM Fault Input Filtering Option ON.

Definition at line 142 of file pwm4.h.

#define PWM_FAULT_INPUT_NOT_USED   0

PWM Fault Input Not Used.

Definition at line 152 of file pwm4.h.

#define PWM_FAULT_INPUT_USED   1

PWM Fault Input Used.

Definition at line 155 of file pwm4.h.

#define PWM_FAULT_LINES   8

PWM Number of Fault Lines.

Definition at line 130 of file pwm4.h.

#define PWM_FAULT_MODE_LEVEL   0

PWM Fault Mode Level.

Definition at line 158 of file pwm4.h.

#define PWM_FAULT_MODE_TGL   1

PWM Fault Mode Toggle.

Definition at line 161 of file pwm4.h.

#define PWM_FAULT_OUTPUT   4

PWM Fault Output Lines: PWM0,1,2,3 => 4.

Definition at line 164 of file pwm4.h.

#define PWM_INVALID_ARGUMENT   1

Value returned by function when the channel number is invalid.

Definition at line 70 of file pwm4.h.

Referenced by pwm_channel_init().

#define PWM_INVALID_INPUT   1

#define PWM_MODE_CENTER_ALIGNED   1

Operate PWM channel in center aligned mode.

Definition at line 76 of file pwm4.h.

#define PWM_MODE_LEFT_ALIGNED   0

Operate PWM channel in left aligned mode.

Definition at line 73 of file pwm4.h.

Referenced by main().

#define PWM_NO_WRITE_PROTECT_VIOLATION   0xFFFFFFFF

PWM No Write To Protected Register Status.

Definition at line 109 of file pwm4.h.

Referenced by pwm_write_protect_status().

#define PWM_OOV_CTRL_OFF   0

PWM Output Override Control OFF.

Definition at line 97 of file pwm4.h.

#define PWM_OOV_CTRL_ON   1

PWM Output Override Control ON.

Definition at line 100 of file pwm4.h.

#define PWM_OOV_LINES   4

PWM Ouptut Override Number of Lines: PWM0,1,2,3 => 4.

Definition at line 103 of file pwm4.h.

Referenced by pwm_init(), pwm_output_override_setup(), and pwm_output_override_write().

#define PWM_OOV_VALUE_HIGH   1

PWM Output Override Value High Level.

Definition at line 94 of file pwm4.h.

#define PWM_OOV_VALUE_LOW   0

PWM Output Override Value Low Level.

Definition at line 91 of file pwm4.h.

#define PWM_OUTPUT_HIGH_WHEN_FAULT_DETECTION   1

PWM Output High Level when fault detection.

Definition at line 149 of file pwm4.h.

#define PWM_OUTPUT_LOW_WHEN_FAULT_DETECTION   0

PWM Output Low Level when fault detection.

Definition at line 146 of file pwm4.h.

#define PWM_POLARITY_HIGH   1

PWM channel starts output high level.

Definition at line 82 of file pwm4.h.

#define PWM_POLARITY_LOW   0

PWM channel starts output low level.

Definition at line 79 of file pwm4.h.

Referenced by main().

#define PWM_SUCCESS   0

#define PWM_SYNC_CHANNEL_OFF   1

PWM Sync channel OFF.

Definition at line 115 of file pwm4.h.

#define PWM_SYNC_CHANNEL_ON   1

PWM Sync channel ON.

Definition at line 112 of file pwm4.h.

#define PWM_SYNC_UPDATE_AUTO_WRITE_AUTO_UPDATE   2

PWM Automatic Write And Automatic Update Period, Duty Cycle and Event Method.

Definition at line 124 of file pwm4.h.

Referenced by pwm_init().

#define PWM_SYNC_UPDATE_MANUAL_WRITE_AUTO_UPDATE   1

PWM Manual Write And Automatic Update Period, Duty Cycle and Event Method.

Definition at line 121 of file pwm4.h.

#define PWM_SYNC_UPDATE_MANUAL_WRITE_MANUAL_UPDATE   0

PWM Manual Write And Manual Update Period, Duty Cycle and Event Method.

Definition at line 118 of file pwm4.h.

Referenced by main().

#define PWM_UPDATE_DUTY   0

PWM channel write in CUPDx updates duty cycle at the next period start event.

Definition at line 85 of file pwm4.h.

#define PWM_UPDATE_PERIOD   1

PWM channel write in CUPDx updates period at the next period start event.

Definition at line 88 of file pwm4.h.

#define PWM_UPDLOCK_TRIGGER   1

PWM Update Lock State.

Definition at line 127 of file pwm4.h.

#define PWM_WPKEY   0x50574D

PWM Protection Key.

Definition at line 106 of file pwm4.h.


Function Documentation

int pwm_channel_init ( unsigned int  channel_id,
const avr32_pwm_channel_t *  pwm_channel 
)

Initialize a specific PWM channel.

Parameters:
channel_id The channel identifier mask
*pwm_channel Pointer to PWM channel struct avr32_pwm_channel_t
Returns:
PWM_SUCCESS, PWM_INVALID_INPUT or PWM_INVALID_ARGUMENT

Definition at line 248 of file pwm4.c.

References AVR32_PWM_LINES_MSB, PWM_INVALID_ARGUMENT, PWM_INVALID_INPUT, and PWM_SUCCESS.

Referenced by main().

00249 {
00250   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00251 
00252   if (pwm_channel == 0) // Null pointer.
00253     return PWM_INVALID_ARGUMENT;
00254   if (channel_id > AVR32_PWM_LINES_MSB) // Control input values.
00255     return PWM_INVALID_INPUT;
00256 
00257   pwm->channel[channel_id].cmr= pwm_channel->cmr;   // Channel mode.
00258   pwm->channel[channel_id].cdty= pwm_channel->cdty; // Duty cycle, should be < CPRD.
00259   pwm->channel[channel_id].cprd= pwm_channel->cprd; // Channel period.
00260 
00261   return PWM_SUCCESS;
00262 }

void pwm_clr_fault_status (  ) 

Return Fault Status.

Definition at line 467 of file pwm4.c.

00468 {  
00469   AVR32_PWM.fcr = 0xffff;
00470 }

int pwm_compare_disable ( int  line  ) 

Compare Match Disable.

Parameters:
line Compare Line to be used
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

int pwm_compare_enable ( int  line  ) 

Compare Match Enable.

Parameters:
line Compare Line to be used
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

int pwm_compare_event_disable ( int  line,
int  event_line 
)

Compare Event Disable.

Parameters:
line Compare Line to be used
event_line Event Line to be used
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 526 of file pwm4.c.

References PWM_INVALID_INPUT, and PWM_SUCCESS.

00527 {
00528   if (line > AVR32_PWM_CMP_NUM)
00529     return PWM_INVALID_INPUT;  
00530 
00531   // Disable Event Line
00532   AVR32_PWM.elxmr[line] &= (~event_line);
00533   
00534   return PWM_SUCCESS;
00535 }

int pwm_compare_event_enable ( int  line,
int  event_line 
)

Compare Event Enable.

Parameters:
line Compare Line to be used
event_line Event Line to be used
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 515 of file pwm4.c.

References PWM_INVALID_INPUT, and PWM_SUCCESS.

00516 {
00517   if (line > AVR32_PWM_CMP_NUM)
00518     return PWM_INVALID_INPUT;  
00519 
00520   // Enable Event Line
00521   AVR32_PWM.elxmr[line] = event_line;
00522   
00523   return PWM_SUCCESS;
00524 }

int pwm_compare_match_reload_setup ( int  line,
pwm_compare_opt_t pwm_compare_t 
)

Compare Match Reload Setup.

Parameters:
line Compare Line to be used
pwm_compare_t Parameter
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 495 of file pwm4.c.

References pwm_compare_opt_t::compare_mode, pwm_compare_opt_t::compare_period_counter_value, pwm_compare_opt_t::compare_pwm_counter_value, pwm_compare_opt_t::compare_pwm_period_counter_value, pwm_compare_opt_t::compare_pwm_update_period, pwm_compare_opt_t::compare_status, PWM_INVALID_INPUT, and PWM_SUCCESS.

00496 {
00497   if (line > AVR32_PWM_CMP_NUM)
00498     return PWM_INVALID_INPUT;
00499   
00500   // configure Compare PWM Counter Value
00501   AVR32_PWM.comp[line].CMP0VUPD.cvupd   = 
00502                     ((pwm_compare_t->compare_pwm_counter_value<<AVR32_PWM_CMP0VUPD_CVUPD_OFFSET) |
00503                      (pwm_compare_t->compare_mode<<AVR32_PWM_CMP0VUPD_CVMUPD_OFFSET));
00504     
00505   // configure Compare Trigger  
00506   AVR32_PWM.comp[line].cmp0mupd  = 
00507                     (((pwm_compare_t->compare_pwm_period_counter_value)<< AVR32_PWM_CMP0MUPD_CTRUPD_OFFSET)  |
00508                     ((pwm_compare_t->compare_period_counter_value)     << AVR32_PWM_CMP0MUPD_CPRUPD_OFFSET)  |
00509                     ((pwm_compare_t->compare_pwm_update_period)        << AVR32_PWM_CMP0MUPD_CUPRUPD_OFFSET) |
00510                     ((pwm_compare_t->compare_status)                   << AVR32_PWM_CMP0MUPD_CENUPD_OFFSET));
00511 
00512   return PWM_SUCCESS;
00513 }

int pwm_compare_match_setup ( int  line,
pwm_compare_opt_t pwm_compare_t 
)

Compare Match Setup.

Parameters:
line Compare Line to be used
pwm_compare_t Parameter
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 473 of file pwm4.c.

References pwm_compare_opt_t::compare_mode, pwm_compare_opt_t::compare_period_counter_value, pwm_compare_opt_t::compare_pwm_counter_value, pwm_compare_opt_t::compare_pwm_period_counter_value, pwm_compare_opt_t::compare_pwm_update_period, pwm_compare_opt_t::compare_status, PWM_INVALID_INPUT, and PWM_SUCCESS.

00474 {
00475   if (line > AVR32_PWM_CMP_NUM)
00476     return PWM_INVALID_INPUT;
00477  
00478   // configure Compare PWM Counter Value
00479   AVR32_PWM.comp[line].CMP0V.cv   = 
00480                     ((pwm_compare_t->compare_pwm_counter_value<<AVR32_PWM_CMP0V_CV_OFFSET) |
00481                      (pwm_compare_t->compare_mode<<AVR32_PWM_CMP0V_CVM_OFFSET));
00482 
00483   // configure Compare Trigger  
00484   AVR32_PWM.comp[line].cmp0m            = 
00485                     (((pwm_compare_t->compare_pwm_period_counter_value)<< AVR32_PWM_CMP0M_CTR_OFFSET)  |
00486                     ((pwm_compare_t->compare_period_counter_value)     << AVR32_PWM_CMP0M_CPR_OFFSET)  |
00487                     ((pwm_compare_t->compare_pwm_update_period)        << AVR32_PWM_CMP0M_CUPR_OFFSET) |
00488                     ((pwm_compare_t->compare_status)                   << AVR32_PWM_CMP0M_CEN_OFFSET));
00489     
00490   // configure Comparaison Period    
00491   return PWM_SUCCESS;
00492 }

int pwm_compare_reload_update_period_value ( int  line,
pwm_compare_opt_t pwm_compare_t 
)

Compare Reload Update Period.

Parameters:
line Compare Line to be used
pwm_compare_t Parameter
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

int pwm_compare_update_period_value ( int  line,
pwm_compare_opt_t pwm_compare_t 
)

Fault Lines Enable function.

Parameters:
line Compare Line to be used
pwm_compare_t Parameter
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

int pwm_fault_lines_enable ( U8  line,
U8  channel 
)

Fault Lines Enable function.

Parameters:
line Line
channel Channel
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 448 of file pwm4.c.

References PWM_INVALID_INPUT, and PWM_SUCCESS.

00450 {
00451   if (channel > 4 ) // Null pointer.
00452     return PWM_INVALID_INPUT;
00453     
00454   if (channel)
00455     AVR32_PWM.fpe1  |=  (line<<(AVR32_PWM_FPE1_OFFSET+8*channel));
00456   else
00457     AVR32_PWM.fpe1  &= ~(line<<(AVR32_PWM_FPE1_OFFSET+8*channel));
00458     
00459   return PWM_SUCCESS;
00460 }

int pwm_fault_lines_level_setup ( U8  line,
U8  channel_high,
U8  channel_low 
)

Fault Lines Level Setup Function.

Parameters:
line Line
channel_high Channel High
channel_low Channel Low
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 426 of file pwm4.c.

References PWM_INVALID_INPUT, and PWM_SUCCESS.

00429 {
00430   if ((line > 8 ) ||
00431       (channel_high > 1 ) ||
00432       (channel_low > 1 ))
00433     return PWM_INVALID_INPUT;
00434       
00435   if (channel_high)
00436     AVR32_PWM.fpv  |=  (channel_high<<(AVR32_PWM_FPVH0_OFFSET+line));
00437   else
00438     AVR32_PWM.fpv  &= ~(channel_high<<(AVR32_PWM_FPVH0_OFFSET+line));
00439   
00440   if (channel_low)
00441     AVR32_PWM.fpv  |=  (channel_low<<(AVR32_PWM_FPVL0_OFFSET+line));
00442   else
00443     AVR32_PWM.fpv  &= ~(channel_low<<(AVR32_PWM_FPVL0_OFFSET+line));  
00444   
00445   return PWM_SUCCESS;
00446 }

int pwm_fault_lines_polarity_setup ( U8  line,
U8  polarity,
U8  mode,
U8  filter 
)

Fault Lines Level Polarity Function.

Parameters:
line Line
polarity Polarity
mode Mode
filter Filter
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 397 of file pwm4.c.

References PWM_INVALID_INPUT, and PWM_SUCCESS.

00401 {
00402   if ((line > 8 ) ||
00403       (polarity > 1 ) ||
00404       (mode > 1 )||
00405       (filter > 1 ))        
00406     return PWM_INVALID_INPUT;
00407     
00408   if (polarity)
00409     AVR32_PWM.fmr  |=  (polarity<<(AVR32_PWM_FPOL0_OFFSET+line));
00410   else
00411     AVR32_PWM.fmr  &= ~(polarity<<(AVR32_PWM_FPOL0_OFFSET+line));
00412   
00413   if (mode)
00414     AVR32_PWM.fmr  |=  (mode<<(AVR32_PWM_FMOD0_OFFSET+line));
00415   else
00416     AVR32_PWM.fmr  &= ~(mode<<(AVR32_PWM_FMOD0_OFFSET+line));
00417 
00418   if (filter)
00419     AVR32_PWM.fmr  |=  (filter<<(AVR32_PWM_FFIL0_OFFSET+line));
00420   else
00421     AVR32_PWM.fmr  &= ~(filter<<(AVR32_PWM_FFIL0_OFFSET+line));  
00422     
00423   return PWM_SUCCESS;
00424 }

int pwm_get_fault_status (  ) 

Get Fault Status.

Returns:
Value of FSR register

Definition at line 462 of file pwm4.c.

00463 {  
00464   return AVR32_PWM.fsr;
00465 }

unsigned int pwm_get_update_period_counter_value (  ) 

Return Current Counter of Update Period Value.

Returns:
Value of Counter

int pwm_init ( pwm_opt_t opt  ) 

This function initialize the PWM controller (mode register) and disable the interrupt.

Parameters:
opt PWM Channel structure parameter
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 198 of file pwm4.c.

References AVR32_PWM_LINES_MSB, pwm_opt_t::cksel, pwm_opt_t::diva, pwm_opt_t::divb, pwm_opt_t::fault_detection_activated, pwm_opt_t::prea, pwm_opt_t::preb, PWM_INVALID_INPUT, PWM_OOV_LINES, PWM_SUCCESS, PWM_SYNC_UPDATE_AUTO_WRITE_AUTO_UPDATE, pwm_write_protect_sw_unlock(), pwm_opt_t::sync_channel_activated, pwm_opt_t::sync_channel_select, and pwm_opt_t::sync_update_channel_mode.

Referenced by main().

00199 {
00200   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00201   Bool global_interrupt_enabled = Is_global_interrupt_enabled();
00202 
00203   if (opt == 0 ) // Null pointer.
00204     return PWM_INVALID_INPUT;
00205 
00206   // First Unlock Register
00207   pwm_write_protect_sw_unlock(0);
00208   pwm_write_protect_sw_unlock(1);
00209   pwm_write_protect_sw_unlock(2);
00210   pwm_write_protect_sw_unlock(3);  
00211   
00212   // Disable interrupt.
00213   if (global_interrupt_enabled) Disable_global_interrupt();
00214   pwm->idr1 = ((1 << (AVR32_PWM_LINES_MSB + 1)) - 1) << AVR32_PWM_IDR1_CHID0_OFFSET;
00215   if (opt->fault_detection_activated)
00216     pwm->idr1 |= ((1 << (AVR32_PWM_LINES_MSB + 1)) - 1) << AVR32_PWM_IDR1_FCHID0_OFFSET;
00217   pwm->isr1;
00218   // Check if synchronous channel ...
00219   if (opt->sync_channel_activated)
00220   {
00221     pwm->idr2 = (1 << AVR32_PWM_IDR2_UNRE_OFFSET) | (1 << AVR32_PWM_IDR2_WRDY_OFFSET);  
00222     if (opt->sync_update_channel_mode==PWM_SYNC_UPDATE_AUTO_WRITE_AUTO_UPDATE)
00223     pwm->idr2 |= (1 << AVR32_PWM_IDR2_ENDTX_OFFSET) | (1 << AVR32_PWM_IDR2_TXBUFE_OFFSET);    
00224     pwm->isr2;  
00225   }
00226   if (global_interrupt_enabled) Enable_global_interrupt();
00227 
00228   // Set PWM mode register.
00229   pwm->clk =
00230     ((opt->diva)<<AVR32_PWM_DIVA_OFFSET) |
00231     ((opt->divb)<<AVR32_PWM_DIVB_OFFSET) |
00232     ((opt->prea)<<AVR32_PWM_PREA_OFFSET) |
00233     ((opt->preb)<<AVR32_PWM_PREB_OFFSET) |
00234     ((opt->cksel)<<AVR32_PWM_CLKSEL_OFFSET)
00235     ;
00236   
00237   // Set PWM Sync register
00238   pwm->SCM.updm = opt->sync_update_channel_mode;
00239   int i;
00240   for (i=0;i<PWM_OOV_LINES;i++)
00241   {  
00242     pwm->scm     |= ((opt->sync_channel_select[i])<<(AVR32_PWM_SCM_SYNC0_OFFSET+i));
00243   }
00244   
00245   return PWM_SUCCESS;
00246 }

int pwm_interrupt_update_channel ( unsigned int  channel_id,
const avr32_pwm_channel_t *  pwm_channel 
)

Update channel register CPRDx or CDTYx with the interrupt method. This function uses the CUPDx register as a double buffer for the period or the duty cycle. Only the first 20 bits of cupd are significant.

Parameters:
channel_id The channel identifier (0 to max channel-1)
*pwm_channel Pointer to PWM channel struct avr32_pwm_channel_t
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 302 of file pwm4.c.

References AVR32_PWM_LINES_MSB, PWM_INVALID_INPUT, and PWM_SUCCESS.

00303 {
00304   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00305 
00306   if (channel_id > AVR32_PWM_LINES_MSB)
00307      return PWM_INVALID_INPUT;
00308 
00309   pwm->channel[channel_id].cdtyupd= pwm_channel->cdtyupd; // Channel update Duty Cycle
00310   pwm->channel[channel_id].cprdupd= pwm_channel->cprdupd; // Channel update Period
00311   pwm->channel[channel_id].dtupd= pwm_channel->dtupd;     // Channel update Dead Time
00312 
00313   return PWM_SUCCESS;
00314 }

int pwm_output_override_setup ( pwm_output_override_opt_t opt  ) 

Output Override Configuration. This function uses the OS and OOV registers.

Parameters:
opt Output Override Parameter
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 316 of file pwm4.c.

References pwm_output_override_opt_t::oov, PWM_INVALID_INPUT, PWM_OOV_LINES, and PWM_SUCCESS.

00317 {
00318   if (opt == 0 ) // Null pointer.
00319     return PWM_INVALID_INPUT;
00320   
00321   AVR32_PWM.oov = 0; // Clear output override value register
00322   int i;  
00323   for (i=0;i<PWM_OOV_LINES;i++)
00324   {
00325       AVR32_PWM.oov  = ((opt->oov[0][i]<<(AVR32_PWM_OOVH0_OFFSET+i))|(opt->oov[1][i]<<(AVR32_PWM_OOVL0_OFFSET+i))); 
00326   }
00327   
00328   return PWM_SUCCESS;
00329 }

int pwm_output_override_write ( pwm_output_override_opt_t opt  ) 

Output Override Set. This function uses the OS and OOV registers.

Parameters:
opt Output Override Parameter
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 331 of file pwm4.c.

References pwm_output_override_opt_t::os, PWM_INVALID_INPUT, PWM_OOV_LINES, and PWM_SUCCESS.

00332 {
00333   if (opt == 0 ) // Null pointer.
00334     return PWM_INVALID_INPUT;
00335   
00336   U32 tmp=0;
00337   int i;
00338   for (i=0;i<PWM_OOV_LINES;i++)
00339   {
00340         if (opt->os[0][i])
00341           tmp |= (1<<(AVR32_PWM_OSH0_OFFSET+i));
00342         else
00343           tmp &= ~(1<<(AVR32_PWM_OSH0_OFFSET+i));    
00344         if (opt->os[1][i])
00345           tmp |= (1<<(AVR32_PWM_OSL0_OFFSET+i));
00346         else
00347           tmp &= ~(1<<(AVR32_PWM_OSL0_OFFSET+i));         
00348   }
00349   AVR32_PWM.os  = tmp; 
00350   return PWM_SUCCESS;
00351 }

int pwm_start_channels ( unsigned long  channels_bitmask  ) 

Start PWM channels.

Parameters:
channels_bitmask A bit-mask with set bits indicating channels to start.
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 264 of file pwm4.c.

References AVR32_PWM_LINES_MSB, PWM_INVALID_INPUT, and PWM_SUCCESS.

Referenced by main().

00265 {
00266   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00267   if (channels_bitmask & ~((1 << (AVR32_PWM_LINES_MSB + 1)) - 1))
00268     return PWM_INVALID_INPUT;
00269   
00270   //pwm->wpsr; // Clear Fault register
00271   pwm->ena = channels_bitmask; // Enable channels.
00272 
00273   return PWM_SUCCESS;
00274 }

int pwm_stop_channels ( unsigned long  channels_bitmask  ) 

Stop PWM channels.

Parameters:
channels_bitmask A bit-mask with set bits indicating channels to stop.
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 276 of file pwm4.c.

References AVR32_PWM_LINES_MSB, PWM_INVALID_INPUT, and PWM_SUCCESS.

00277 {
00278   if (channels_bitmask & ~((1 << (AVR32_PWM_LINES_MSB + 1)) - 1))
00279     return PWM_INVALID_INPUT;
00280 
00281   AVR32_PWM.dis = channels_bitmask; // Disable channels.
00282 
00283   return PWM_SUCCESS;
00284 }

int pwm_synchronous_prepare_update ( unsigned int  channel_id,
const avr32_pwm_channel_t *  pwm_channel 
)

Prepare a Synchronous Channel, User should call this function for all the synchronous channel.

Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 359 of file pwm4.c.

References AVR32_PWM_LINES_MSB, PWM_INVALID_INPUT, and PWM_SUCCESS.

00360 {
00361   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00362 
00363   if (channel_id > AVR32_PWM_LINES_MSB)
00364      return PWM_INVALID_INPUT;
00365     
00366   AVR32_PWM.isr1;                                    // Acknowledgement and clear previous register state.
00367   while (!(AVR32_PWM.isr1 & (1 << channel_id)));     // Wait until the last write has been taken into account.
00368   pwm->channel[channel_id].cdtyupd= pwm_channel->cdtyupd; // Channel update Duty Cycle
00369   pwm->channel[channel_id].cprdupd= pwm_channel->cprdupd; // Channel update Period
00370   return PWM_SUCCESS;
00371 }

int pwm_update_auto_write_auto_update_check_eot (  ) 

Synchronous Update with Manual Write and Auto Update Method.

Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 391 of file pwm4.c.

References PWM_SUCCESS.

00392 {
00393   while(!AVR32_PWM.ISR2.endtx);
00394   return PWM_SUCCESS;   
00395 }

int pwm_update_auto_write_auto_update_check_ready (  ) 

Synchronous Update with Manual Write and Auto Update Method.

Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 385 of file pwm4.c.

References PWM_SUCCESS.

00386 {
00387   while(!AVR32_PWM.ISR2.wrdy);
00388   return PWM_SUCCESS;    
00389 }

int pwm_update_channel ( unsigned int  channel_id,
const avr32_pwm_channel_t *  pwm_channel 
)

Update channel register CPRDx or CDTYx with the polling method. This function uses the CUPDx register as a double buffer for the period or the duty cycle. Only the first 20 bits of cupd are significant.

Parameters:
channel_id The channel identifier (0 to max channel-1)
*pwm_channel Pointer to PWM channel struct avr32_pwm_channel_t
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 286 of file pwm4.c.

References AVR32_PWM_LINES_MSB, PWM_INVALID_INPUT, and PWM_SUCCESS.

00287 {
00288   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00289 
00290   if (channel_id > AVR32_PWM_LINES_MSB)
00291      return PWM_INVALID_INPUT;
00292 
00293   AVR32_PWM.isr1;                                    // Acknowledgement and clear previous register state.
00294   while (!(AVR32_PWM.isr1 & (1 << channel_id)));     // Wait until the last write has been taken into account.
00295   pwm->channel[channel_id].cdtyupd= pwm_channel->cdtyupd; // Channel update Duty Cycle
00296   pwm->channel[channel_id].cprdupd= pwm_channel->cprdupd; // Channel update Period
00297   pwm->channel[channel_id].dtupd= pwm_channel->dtupd;     // Channel update Dead Time
00298   
00299   return PWM_SUCCESS;
00300 }

int pwm_update_manual_write_auto_update (  ) 

Synchronous Update with Manual Write and Auto Update Method.

Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 379 of file pwm4.c.

References PWM_SUCCESS.

00380 {
00381   while(!AVR32_PWM.ISR2.wrdy);
00382   return PWM_SUCCESS;  
00383 }

int pwm_update_manual_write_manual_update (  ) 

Synchronous Update with Manual Write and Manual Update Method.

Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 373 of file pwm4.c.

References PWM_SUCCESS.

00374 {
00375   AVR32_PWM.scuc = (1<<AVR32_PWM_SCUC_UPDULOCK_OFFSET);
00376   return PWM_SUCCESS;  
00377 }

int pwm_update_period_value ( unsigned int  value  ) 

Define Update Period Value For Update Of Synchronous Channel.

Parameters:
value Update Period Value
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 353 of file pwm4.c.

References PWM_SUCCESS.

Referenced by main().

00354 {
00355   AVR32_PWM.scup = value;
00356   return PWM_SUCCESS;  
00357 }

int pwm_update_period_value_update ( unsigned int  value  ) 

Define Update Period Value For Update Of Synchronous Channel after a first init.

Parameters:
value Update Period Value
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

int pwm_write_protect_hw_lock ( int  group  ) 

Hardware Write Protect Lock Function. This function uses the WPMR register.

Parameters:
group 
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 52 of file pwm4.c.

References PWM_FAILURE, and PWM_SUCCESS.

00053 {
00054   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00055   switch(group)
00056   {
00057     case 0:
00058       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00059               AVR32_PWM_WPCR_WPRG0_MASK                            |
00060               (AVR32_PWM_WPCR_WPCMD_HWENA << AVR32_PWM_WPCR_WPCMD);      
00061       if (pwm->wpsr != (AVR32_PWM_WPSR_WPHWS0_YES << AVR32_PWM_WPSR_WPHWS0)) return PWM_FAILURE;      
00062       break;
00063     case 1:
00064       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00065               AVR32_PWM_WPCR_WPRG1_MASK                            |
00066               (AVR32_PWM_WPCR_WPCMD_HWENA << AVR32_PWM_WPCR_WPCMD);      
00067       if (pwm->wpsr != (AVR32_PWM_WPSR_WPHWS1_YES << AVR32_PWM_WPSR_WPHWS1)) return PWM_FAILURE;          
00068       break;
00069     case 2:
00070       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00071               AVR32_PWM_WPCR_WPRG2_MASK                            |
00072               (AVR32_PWM_WPCR_WPCMD_HWENA << AVR32_PWM_WPCR_WPCMD);      
00073       if (pwm->wpsr != (AVR32_PWM_WPSR_WPHWS2_YES << AVR32_PWM_WPSR_WPHWS2)) return PWM_FAILURE;        
00074       break;
00075     case 3:
00076       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00077               AVR32_PWM_WPCR_WPRG3_MASK                            |
00078               (AVR32_PWM_WPCR_WPCMD_HWENA << AVR32_PWM_WPCR_WPCMD);      
00079       if (pwm->wpsr != (AVR32_PWM_WPSR_WPHWS3_YES << AVR32_PWM_WPSR_WPHWS3)) return PWM_FAILURE;       
00080       break;
00081     case 4:
00082       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00083               AVR32_PWM_WPCR_WPRG4_MASK                            |
00084               (AVR32_PWM_WPCR_WPCMD_HWENA << AVR32_PWM_WPCR_WPCMD);      
00085       if (pwm->wpsr != (AVR32_PWM_WPSR_WPHWS4_YES << AVR32_PWM_WPSR_WPHWS4)) return PWM_FAILURE;       
00086       break;
00087     case 5:
00088       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00089               AVR32_PWM_WPCR_WPRG5_MASK                            |
00090               (AVR32_PWM_WPCR_WPCMD_HWENA << AVR32_PWM_WPCR_WPCMD);      
00091       if (pwm->wpsr != (AVR32_PWM_WPSR_WPHWS5_YES << AVR32_PWM_WPSR_WPHWS5)) return PWM_FAILURE;       
00092       break;
00093   }    
00094   return PWM_SUCCESS;
00095 }

U32 pwm_write_protect_status (  ) 

Write Protect Status Function. This function uses the WPSR register.

Returns:
PWM_NO_WRITE_PROTECT_VIOLATION or Write Protection Violation Source

Definition at line 187 of file pwm4.c.

References PWM_NO_WRITE_PROTECT_VIOLATION.

00188 {
00189   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00190   U32 status;
00191   status = pwm->wpsr;
00192   if (status&AVR32_PWM_WPSR_WPVS_MASK)
00193     return ((status&AVR32_PWM_WPSR_WPVSRC_MASK)>>AVR32_PWM_WPSR_WPVSRC_OFFSET);
00194   else
00195     return PWM_NO_WRITE_PROTECT_VIOLATION;
00196 }

int pwm_write_protect_sw_lock ( int  group  ) 

Software Write Protect Lock Function. This function uses the WPMR register.

Parameters:
group 
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 97 of file pwm4.c.

References PWM_FAILURE, and PWM_SUCCESS.

00098 {
00099   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00100   switch(group)
00101   {
00102     case 0:
00103       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00104               AVR32_PWM_WPCR_WPRG0_MASK                            |
00105               (AVR32_PWM_WPCR_WPCMD_SWENA << AVR32_PWM_WPCR_WPCMD);      
00106       if (pwm->wpsr != (AVR32_PWM_WPSR_WPSWS0_YES << AVR32_PWM_WPSR_WPSWS0)) return PWM_FAILURE;      
00107       break;
00108     case 1:
00109       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00110               AVR32_PWM_WPCR_WPRG1_MASK                            |
00111               (AVR32_PWM_WPCR_WPCMD_SWENA << AVR32_PWM_WPCR_WPCMD);      
00112       if (pwm->wpsr != (AVR32_PWM_WPSR_WPSWS1_YES << AVR32_PWM_WPSR_WPSWS1)) return PWM_FAILURE;          
00113       break;
00114     case 2:
00115       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00116               AVR32_PWM_WPCR_WPRG2_MASK                            |
00117               (AVR32_PWM_WPCR_WPCMD_SWENA << AVR32_PWM_WPCR_WPCMD);      
00118       if (pwm->wpsr != (AVR32_PWM_WPSR_WPSWS2_YES << AVR32_PWM_WPSR_WPSWS2)) return PWM_FAILURE;        
00119       break;
00120     case 3:
00121       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00122               AVR32_PWM_WPCR_WPRG3_MASK                            |
00123               (AVR32_PWM_WPCR_WPCMD_SWENA << AVR32_PWM_WPCR_WPCMD);      
00124       if (pwm->wpsr != (AVR32_PWM_WPSR_WPSWS3_YES << AVR32_PWM_WPSR_WPSWS3)) return PWM_FAILURE;       
00125       break;
00126     case 4:
00127       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00128               AVR32_PWM_WPCR_WPRG4_MASK                            |
00129               (AVR32_PWM_WPCR_WPCMD_SWENA << AVR32_PWM_WPCR_WPCMD);      
00130       if (pwm->wpsr != (AVR32_PWM_WPSR_WPSWS4_YES << AVR32_PWM_WPSR_WPSWS4)) return PWM_FAILURE;       
00131       break;
00132     case 5:
00133       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00134               AVR32_PWM_WPCR_WPRG5_MASK                            |
00135               (AVR32_PWM_WPCR_WPCMD_SWENA << AVR32_PWM_WPCR_WPCMD);      
00136       if (pwm->wpsr != (AVR32_PWM_WPSR_WPSWS5_YES << AVR32_PWM_WPSR_WPSWS5)) return PWM_FAILURE;       
00137       break;
00138   }    
00139   return PWM_SUCCESS;
00140 }

int pwm_write_protect_sw_unlock ( int  group  ) 

Software Write Protect Unlock Function. This function uses the WPMR register.

Parameters:
group 
Returns:
PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 142 of file pwm4.c.

References PWM_FAILURE, and PWM_SUCCESS.

Referenced by pwm_init().

00143 {
00144   volatile avr32_pwm_t *pwm = &AVR32_PWM;
00145   switch(group)
00146   {
00147     case 0:
00148       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00149               AVR32_PWM_WPCR_WPRG0_MASK                            |
00150               (AVR32_PWM_WPCR_WPCMD_SWDIS << AVR32_PWM_WPCR_WPCMD);      
00151       if (pwm->wpsr != 0) return PWM_FAILURE;      
00152       break;
00153     case 1:
00154       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00155               AVR32_PWM_WPCR_WPRG1_MASK                            |
00156               (AVR32_PWM_WPCR_WPCMD_SWDIS << AVR32_PWM_WPCR_WPCMD);      
00157       if (pwm->wpsr != 0) return PWM_FAILURE;          
00158       break;
00159     case 2:
00160       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00161               AVR32_PWM_WPCR_WPRG2_MASK                            |
00162               (AVR32_PWM_WPCR_WPCMD_SWDIS << AVR32_PWM_WPCR_WPCMD);      
00163       if (pwm->wpsr != 0) return PWM_FAILURE;        
00164       break;
00165     case 3:
00166       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00167               AVR32_PWM_WPCR_WPRG3_MASK                            |
00168               (AVR32_PWM_WPCR_WPCMD_SWDIS << AVR32_PWM_WPCR_WPCMD);      
00169       if (pwm->wpsr != 0) return PWM_FAILURE;       
00170       break;
00171     case 4:
00172       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00173               AVR32_PWM_WPCR_WPRG4_MASK                            |
00174               (AVR32_PWM_WPCR_WPCMD_SWDIS << AVR32_PWM_WPCR_WPCMD);      
00175       if (pwm->wpsr != 0) return PWM_FAILURE;       
00176       break;
00177     case 5:
00178       pwm->wpcr = (AVR32_PWM_WPCR_WPKEY_KEY   << AVR32_PWM_WPCR_WPKEY) |
00179               AVR32_PWM_WPCR_WPRG5_MASK                            |
00180               (AVR32_PWM_WPCR_WPCMD_SWDIS << AVR32_PWM_WPCR_WPCMD);      
00181       if (pwm->wpsr != 0) return PWM_FAILURE;       
00182       break;
00183   }    
00184   return PWM_SUCCESS;
00185 }


Generated on Fri Feb 19 02:26:12 2010 for AVR32 - PWM4 Driver by  doxygen 1.5.5