The CS2200-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2200-CP is based on an analog PLL architecture comprised of a Delta-Sigma Fractional-N Frequency Synthesizer. This architecture allows for frequency synthesis and clock generation from a stable reference clock.
The datasheet can be downloaded here: http://www.cirrus.com/en/pubs/proDatasheet/CS2200-CP_F1.pdf
Definition in file cs2200.c.
#include <avr32/io.h>
#include "compiler.h"
#include "cs2200.h"
#include "gpio.h"
#include "board.h"
Go to the source code of this file.
Defines | |
Expected Protocol Version | |
#define | CS2200_DEVICE_CTRL_LOCKED 0x00 |
#define | CS2200_EXPECTED_DEVICE_ID 0x00 |
Device ID Register Bit-Masks | |
#define | CS2200_DEVICE_CTRL_UNLOCK_REG_MASK 0x80 |
#define | CS2200_DEVICE_CTRL_UNLOCK_REG_OFFSET 8 |
#define | CS2200_DEVICE_ID_REG_MASK 0xF8 |
#define | CS2200_DEVICE_ID_REG_OFFSET 3 |
Functions | |
void | cs2200_enter_test_mode (void) |
Enter into the test mode. | |
void | cs2200_freq_clk_adjust (U16 lsh_ratio) |
Function used to adjust the CLK_OUT frequency (LSW only). | |
void | cs2200_freq_clk_out (U32 ratio) |
Function used to program the CLK_OUT frequency. | |
void | cs2200_leave_test_mode (void) |
Leave the test mode. | |
Bool | cs2200_setup (U32 out_freq) |
Function used to initialize the chip and communication interface. | |
void | cs2200_switch_off (void) |
void | cs2200_switch_on (void) |
#define CS2200_DEVICE_ID_REG_MASK 0xF8 |
#define CS2200_DEVICE_ID_REG_OFFSET 3 |
#define CS2200_EXPECTED_DEVICE_ID 0x00 |
void cs2200_enter_test_mode | ( | void | ) |
Enter into the test mode.
Definition at line 136 of file cs2200.c.
Referenced by cs2200_setup().
00137 { 00138 CS2200_WRITE_TEST_MODE_1(0x99); // Unlock 00139 CS2200_WRITE_TEST_MODE_2(0x80); // force_normal state 00140 }
void cs2200_freq_clk_adjust | ( | U16 | lsh_ratio | ) |
Function used to adjust the CLK_OUT frequency (LSW only).
Definition at line 156 of file cs2200.c.
References CS2200_REG_LSW_RATIO_ADDR, and cs2200_write_ex().
Referenced by main().
00157 { 00158 static U16 s_ratio; 00159 s_ratio=lsh_ratio; 00160 cs2200_write_ex(CS2200_REG_LSW_RATIO_ADDR, &s_ratio, sizeof(lsh_ratio)); 00161 }
void cs2200_freq_clk_out | ( | U32 | ratio | ) |
void cs2200_leave_test_mode | ( | void | ) |
Bool cs2200_setup | ( | U32 | out_freq | ) |
Function used to initialize the chip and communication interface.
Definition at line 98 of file cs2200.c.
References _32_BITS_RATIO, CS2200_DEVICE_ID_REG_MASK, CS2200_DEVICE_ID_REG_OFFSET, cs2200_enter_test_mode(), CS2200_EXPECTED_DEVICE_ID, and CS2200_NB_TRIES.
Referenced by main().
00099 { 00100 int device_id; 00101 int nb_tries = CS2200_NB_TRIES; 00102 00103 do 00104 { 00105 device_id = (CS2200_READ_DEVICE_ID() & CS2200_DEVICE_ID_REG_MASK) >> CS2200_DEVICE_ID_REG_OFFSET; 00106 // Make sure the chip is functional. 00107 } while ((device_id != CS2200_EXPECTED_DEVICE_ID) 00108 && --nb_tries); 00109 00110 // If number of tries is over, return an error. 00111 if (!nb_tries) 00112 return FALSE; 00113 00114 // Freeze chip during the programmation 00115 CS2200_WRITE_GLOBAL_CFG(1<<3); 00116 00117 CS2200_WRITE_DEVICE_CTRL(0x00); // AUX_OUT output driver enabled. CLK_OUT output driver enabled. 00118 CS2200_WRITE_DEVICE_CFG_1( 0 << 5 // Left-shift R-value by 0 (x 1). 00119 | 0 << 1 // RefClk: is the source of the AUX_OUT signal 00120 ); 00121 CS2200_WRITE_32_BITS_RATIO(_32_BITS_RATIO(out_freq)); // Program a default clock. 00122 CS2200_WRITE_FUNCT_CFG_1( 0x00 << 6 // Push-Pull, Active High (output ‘high’ for unlocked condition, ‘low’ for locked condition). 00123 | 0x02 << 3 // Reference Clock Input Divider: ÷ 1 [8 MHz to 18.75 MHz] 00124 ); 00125 CS2200_WRITE_FUNCT_CFG_2( 0x00 << 4 // Clock outputs are driven ‘low’ when PLL is unlocked. 00126 ); 00127 00128 // Unleash chip 00129 CS2200_WRITE_GLOBAL_CFG( 0x00 << 3 // Freeze 00130 | 0x01 << 0 // EnDevCfg2 00131 ); 00132 cs2200_enter_test_mode(); 00133 return TRUE; 00134 }