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00048 #include <avr32/io.h>
00049 #include "compiler.h"
00050 #include "adcifb.h"
00051
00052
00053 long int adcifb_configure( volatile avr32_adcifb_t *adcifb,
00054 adcifb_opt_t *p_adcifb_opt )
00055 {
00056 unsigned long int prescal_tempo;
00057
00058
00059
00060 adcifb->cr = AVR32_ADCIFB_CR_EN_MASK;
00061
00062
00063
00064 prescal_tempo = (p_adcifb_opt->ratio_clkadcifb_clkadc >> 1) -1;
00065
00066
00067 adcifb->acr = (p_adcifb_opt->sleep_mode_enable << AVR32_ADCIFB_ACR_SLEEP_OFFSET)
00068 | (p_adcifb_opt->resolution << AVR32_ADCIFB_ACR_RES_OFFSET)
00069 | (prescal_tempo << AVR32_ADCIFB_ACR_PRESCAL_OFFSET)
00070 | (p_adcifb_opt->startup << AVR32_ADCIFB_ACR_STARTUP_OFFSET)
00071 | (p_adcifb_opt->shtim << AVR32_ADCIFB_ACR_SHTIM_OFFSET);
00072
00073
00074 return(adcifb_sr_statushigh_wait(adcifb, AVR32_ADCIFB_SR_READY_MASK));
00075 }
00076
00077
00078 long int adcifb_configure_trigger( volatile avr32_adcifb_t *adcifb,
00079 unsigned char trgmod,
00080 unsigned short int trgper )
00081 {
00082
00083 if(AVR32_ADCIFB_TRGMOD_PT != trgmod)
00084 trgper = 0;
00085
00086 adcifb->trgr = ((trgmod&AVR32_ADCIFB_TRGMOD_MASK)<<AVR32_ADCIFB_TRGMOD_OFFSET)
00087 | ((trgper&AVR32_ADCIFB_TRGPER_MASK)<<AVR32_ADCIFB_TRGPER_OFFSET);
00088 return PASS;
00089 }
00090
00091
00092 void adcifb_channels_enable( volatile avr32_adcifb_t *adcifb,
00093 unsigned long int channels_mask )
00094 {
00095 adcifb->cher |= channels_mask;
00096 }
00097
00098
00099 void adcifb_start_conversion_sequence( volatile avr32_adcifb_t *adcifb )
00100 {
00101 adcifb->cr = AVR32_ADCIFB_CR_START_MASK;
00102 }
00103
00104
00105 unsigned long adcifb_get_last_data( volatile avr32_adcifb_t *adcifb )
00106 {
00107 return(adcifb->lcdr);
00108 }
00109
00110
00111 long int adcifb_sr_statushigh_wait( volatile avr32_adcifb_t *adcifb,
00112 unsigned long statusMask )
00113 {
00114 unsigned int timeout = ADCIFB_POLL_TIMEOUT;
00115
00116 while(!(adcifb->sr & statusMask))
00117 {
00118 if(--timeout == 0)
00119 return -1;
00120 }
00121 return PASS;
00122 }
00123
00124
00125 bool adcifb_is_ready( volatile avr32_adcifb_t *adcifb )
00126 {
00127 return((adcifb->sr & AVR32_ADCIFB_SR_READY_MASK)>>AVR32_ADCIFB_SR_READY_OFFSET);
00128 }
00129
00130
00131 bool adcifb_is_drdy( volatile avr32_adcifb_t *adcifb )
00132 {
00133 return((adcifb->sr & AVR32_ADCIFB_SR_DRDY_MASK)>>AVR32_ADCIFB_SR_DRDY_OFFSET);
00134 }
00135
00136
00137 bool adcifb_is_ovre( volatile avr32_adcifb_t *adcifb )
00138 {
00139 return((adcifb->sr & AVR32_ADCIFB_SR_OVRE_MASK)>>AVR32_ADCIFB_SR_OVRE_OFFSET);
00140 }