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AVR UC3 Series Software Framework: Interrupt Controller (INTC) Driver

Copyright © 2007 Atmel Corporation

Introduction

The INTC collects interrupt requests from the peripherals, prioritizes them, and delivers an interrupt request and an autovector to the CPU. The AVR32 architecture supports 4 priority levels for regular, maskable interrupts, and a Non-Maskable Interrupt (NMI).


The INTC supports up to 64 groups of interrupts. Each group can have up to 32 interrupt request lines, these lines are connected to the peripherals. Each group has an Interrupt Priority Register (IPR) and an Interrupt Request Register (IRR). The IPRs are used to assign a priority level and an autovector to each group, and the IRRs are used to identify the active interrupt request within each group. If a group has only one interrupt request line, an active interrupt group uniquely identifies the active interrupt request line, and the corresponding IRR is not needed. The INTC also provides one Interrupt Cause Register (ICR) per priority level. These registers identify the group that has a pending interrupt of the corresponding priority level. If several groups have a pending interrupt of the same level, the group with the lowest number takes priority.

 

INTC Software Driver

This driver provides an API to get access to the main features of the INTC controller.

 

The driver is composed of :

  • intc.c
  • intc.h (for accurate API description, read this header file).
  • exception.S (for Exception and interrupt vectors handeling).
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    INTC Software Driver Examples

    One examples are currently available:

  • Use the INTC driver for the USART RXRDY interrupt.
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