00001 /*This file is prepared for Doxygen automatic documentation generation.*/ 00018 /* Copyright (c) 2009 Atmel Corporation. All rights reserved. 00019 * 00020 * Redistribution and use in source and binary forms, with or without 00021 * modification, are permitted provided that the following conditions are met: 00022 * 00023 * 1. Redistributions of source code must retain the above copyright notice, this 00024 * list of conditions and the following disclaimer. 00025 * 00026 * 2. Redistributions in binary form must reproduce the above copyright notice, 00027 * this list of conditions and the following disclaimer in the documentation 00028 * and/or other materials provided with the distribution. 00029 * 00030 * 3. The name of Atmel may not be used to endorse or promote products derived 00031 * from this software without specific prior written permission. 00032 * 00033 * 4. This software may only be redistributed and used in connection with an Atmel 00034 * AVR product. 00035 * 00036 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 00037 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00038 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 00039 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 00040 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 00041 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00042 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 00043 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00044 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 00045 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 00046 * 00047 */ 00048 #ifndef _SMC_ET024006DHU_H_ 00049 #define _SMC_ET024005DHU_H_ 00050 00051 00053 #define EXT_SM_SIZE 0x200001 00054 00056 #define SMC_DBW 16 00057 00059 #define SMC_8_BIT_CHIPS FALSE 00060 00061 00062 00063 // NCS setup time. Unit: ns. 00064 #define NCS_WR_SETUP 0 00065 00066 // NCS pulse time. Unit: ns. 00067 #define NCS_WR_PULSE 90 00068 00069 // NCS hold time. Unit: ns. 00070 #define NCS_WR_HOLD 10 00071 00072 // NWE setup time. Unit: ns. 00073 #define NWE_SETUP 20 00074 00075 // NWE pulse time. Unit: ns. 00076 #define NWE_PULSE 60 00077 00078 // NWE hold time. Unit: ns. 00079 #define NWE_HOLD 20 00080 00081 // Write cycle time. Unit: ns. 00082 #define NWE_CYCLE Max((NCS_WR_SETUP + NCS_WR_PULSE + NCS_WR_HOLD),(NWE_SETUP + NWE_PULSE + NWE_HOLD)) 00083 00084 // NCS setup time. Unit: ns. 00085 #define NCS_RD_SETUP 0 00086 00087 // NCS pulse time. Unit: ns. 00088 #define NCS_RD_PULSE 240 00089 00090 // NCS hold time. Unit: ns. 00091 #define NCS_RD_HOLD 30 00092 00093 // NRD setup time. Unit: ns. 00094 #define NRD_SETUP 30 00095 00096 // NRD pulse time. Unit: ns. 00097 #define NRD_PULSE 210 00098 00099 // NRD hold time. Unit: ns. 00100 #define NRD_HOLD 30 00101 00102 // Read cycle time. Unit: ns. 00103 #define NRD_CYCLE Max((NCS_RD_SETUP + NCS_RD_PULSE + NCS_RD_HOLD),(NRD_SETUP + NRD_PULSE + NRD_HOLD)) 00104 00105 00106 00107 // Data float time 00108 #define TDF_CYCLES 0 00109 #define TDF_OPTIM DISABLED 00110 00111 // Page mode 00112 #define PAGE_MODE DISABLED 00113 #define PAGE_SIZE 0 00114 00116 #define NCS_CONTROLLED_READ FALSE 00117 00119 #define NCS_CONTROLLED_WRITE FALSE 00120 00122 #define NWAIT_MODE AVR32_SMC_EXNW_MODE_DISABLED 00123 00124 #endif //_SMC_ET024006DHU_H_