Design Overview for pwm

PropertyValue
Project Name:d:\documents\ntnu\crayxd1\!fpwmv3\src\80-0037_vhdl\par\xc2vp50
Target Device:xc2vp50
Report Generated:Tuesday 10/31/06 at 15:33
Printable Summary (View as HTML)pwm_summary.html

Device Utilization Summary (estimated values)

Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slices:219236160% 
Number of Slice Flip Flops:363472320% 
Number of 4 input LUTs:235472320% 
Number of bonded IOBs:35469251% 

Performance Summary

PropertyValue
Data Not Yet Available  

Failing Constraints

Constraint(s)RequestedActualLogic Levels
Data Not Yet Available   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentTuesday 10/31/06 at 15:33