Property | Value |
Project Name: | d:\documents\ntnu\crayxd1\!fpwmv3\src\80-0037_vhdl\par\xc2vp50 |
Target Device: | xc2vp50 |
Report Generated: | Thursday 12/14/06 at 14:19 |
Printable Summary (View as HTML) | user_app_summary.html |
Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slices: | 538 | 23616 | 2% | |
Number of Slice Flip Flops: | 687 | 47232 | 1% | |
Number of 4 input LUTs: | 1018 | 47232 | 2% | |
Number of bonded IOBs: | 1175 | 692 | 169% | Resource Overuse |
Property | Value |
Data Not Yet Available |
Constraint(s) | Requested | Actual | Logic Levels |
Data Not Yet Available |
Report Name | Status | Last Date Modified |
Synthesis Report | Current | Thursday 12/14/06 at 14:19 |