interconnect_slave.cc

00001 
00002 #include <iostream>
00003 #include <vector>
00004 
00005 // Template instantiation includes
00006 #include "mem/config/cache.hh"
00007 #include "mem/config/compression.hh"
00008 
00009 #include "mem/cache/cache.hh"
00010 
00011 #include "mem/cache/tags/cache_tags.hh"
00012 
00013 #if defined(USE_CACHE_LRU)
00014 #include "mem/cache/tags/lru.hh"
00015 #endif
00016 
00017 #if defined(USE_CACHE_FALRU)
00018 #include "mem/cache/tags/fa_lru.hh"
00019 #endif
00020 
00021 #if defined(USE_CACHE_IIC)
00022 #include "mem/cache/tags/iic.hh"
00023 #endif
00024 
00025 #if defined(USE_CACHE_SPLIT)
00026 #include "mem/cache/tags/split.hh"
00027 #endif
00028 
00029 #if defined(USE_CACHE_SPLIT_LIFO)
00030 #include "mem/cache/tags/split_lifo.hh"
00031 #endif
00032 
00033 #include "base/compression/null_compression.hh"
00034 #if defined(USE_LZSS_COMPRESSION)
00035 #include "base/compression/lzss_compression.hh"
00036 #endif
00037 
00038 #include "mem/cache/miss/blocking_buffer.hh"
00039 #include "mem/cache/miss/miss_queue.hh"
00040 
00041 #include "mem/cache/coherence/simple_coherence.hh"
00042 #include "mem/cache/coherence/uni_coherence.hh"
00043 
00044 // Busses
00045 
00046 #include "interconnect_slave_impl.hh"
00047 
00048 #ifndef DOXYGEN_SHOULD_SKIP_THIS
00049 
00050 #if defined(USE_CACHE_FALRU)
00051 template class InterconnectSlave<Cache<CacheTags<FALRU,NullCompression>, BlockingBuffer, SimpleCoherence> >;
00052 template class InterconnectSlave<Cache<CacheTags<FALRU,NullCompression>, BlockingBuffer, UniCoherence> >;
00053 template class InterconnectSlave<Cache<CacheTags<FALRU,NullCompression>, MissQueue, SimpleCoherence> >;
00054 template class InterconnectSlave<Cache<CacheTags<FALRU,NullCompression>, MissQueue, UniCoherence> >;
00055 #if defined(USE_LZSS_COMPRESSION)
00056 template class InterconnectSlave<Cache<CacheTags<FALRU,LZSSCompression>, BlockingBuffer, SimpleCoherence> >;
00057 template class InterconnectSlave<Cache<CacheTags<FALRU,LZSSCompression>, BlockingBuffer, UniCoherence> >;
00058 template class InterconnectSlave<Cache<CacheTags<FALRU,LZSSCompression>, MissQueue, SimpleCoherence> >;
00059 template class InterconnectSlave<Cache<CacheTags<FALRU,LZSSCompression>, MissQueue, UniCoherence> >;
00060 #endif
00061 #endif
00062 
00063 #if defined(USE_CACHE_IIC)
00064 template class InterconnectSlave<Cache<CacheTags<IIC,NullCompression>, BlockingBuffer, SimpleCoherence> >;
00065 template class InterconnectSlave<Cache<CacheTags<IIC,NullCompression>, BlockingBuffer, UniCoherence> >;
00066 template class InterconnectSlave<Cache<CacheTags<IIC,NullCompression>, MissQueue, SimpleCoherence> >;
00067 template class InterconnectSlave<Cache<CacheTags<IIC,NullCompression>, MissQueue, UniCoherence> >;
00068 #if defined(USE_LZSS_COMPRESSION)
00069 template class InterconnectSlave<Cache<CacheTags<IIC,LZSSCompression>, BlockingBuffer, SimpleCoherence> >;
00070 template class InterconnectSlave<Cache<CacheTags<IIC,LZSSCompression>, BlockingBuffer, UniCoherence> >;
00071 template class InterconnectSlave<Cache<CacheTags<IIC,LZSSCompression>, MissQueue, SimpleCoherence> >;
00072 template class InterconnectSlave<Cache<CacheTags<IIC,LZSSCompression>, MissQueue, UniCoherence> >;
00073 #endif
00074 #endif
00075 
00076 #if defined(USE_CACHE_LRU)
00077 template class InterconnectSlave<Cache<CacheTags<LRU,NullCompression>, BlockingBuffer, SimpleCoherence> >;
00078 template class InterconnectSlave<Cache<CacheTags<LRU,NullCompression>, BlockingBuffer, UniCoherence> >;
00079 template class InterconnectSlave<Cache<CacheTags<LRU,NullCompression>, MissQueue, SimpleCoherence> >;
00080 template class InterconnectSlave<Cache<CacheTags<LRU,NullCompression>, MissQueue, UniCoherence> >;
00081 #if defined(USE_LZSS_COMPRESSION)
00082 template class InterconnectSlave<Cache<CacheTags<LRU,LZSSCompression>, BlockingBuffer, SimpleCoherence> >;
00083 template class InterconnectSlave<Cache<CacheTags<LRU,LZSSCompression>, BlockingBuffer, UniCoherence> >;
00084 template class InterconnectSlave<Cache<CacheTags<LRU,LZSSCompression>, MissQueue, SimpleCoherence> >;
00085 template class InterconnectSlave<Cache<CacheTags<LRU,LZSSCompression>, MissQueue, UniCoherence> >;
00086 #endif
00087 #endif
00088 
00089 #if defined(USE_CACHE_SPLIT)
00090 template class InterconnectSlave<Cache<CacheTags<Split,NullCompression>, BlockingBuffer, SimpleCoherence> >;
00091 template class InterconnectSlave<Cache<CacheTags<Split,NullCompression>, BlockingBuffer, UniCoherence> >;
00092 template class InterconnectSlave<Cache<CacheTags<Split,NullCompression>, MissQueue, SimpleCoherence> >;
00093 template class InterconnectSlave<Cache<CacheTags<Split,NullCompression>, MissQueue, UniCoherence> >;
00094 #if defined(USE_LZSS_COMPRESSION)
00095 template class InterconnectSlave<Cache<CacheTags<Split,LZSSCompression>, BlockingBuffer, SimpleCoherence> >;
00096 template class InterconnectSlave<Cache<CacheTags<Split,LZSSCompression>, BlockingBuffer, UniCoherence> >;
00097 template class InterconnectSlave<Cache<CacheTags<Split,LZSSCompression>, MissQueue, SimpleCoherence> >;
00098 template class InterconnectSlave<Cache<CacheTags<Split,LZSSCompression>, MissQueue, UniCoherence> >;
00099 #endif
00100 #endif
00101 
00102 #if defined(USE_CACHE_SPLIT_LIFO)
00103 template class InterconnectSlave<Cache<CacheTags<SplitLIFO,NullCompression>, BlockingBuffer, SimpleCoherence> >;
00104 template class InterconnectSlave<Cache<CacheTags<SplitLIFO,NullCompression>, BlockingBuffer, UniCoherence> >;
00105 template class InterconnectSlave<Cache<CacheTags<SplitLIFO,NullCompression>, MissQueue, SimpleCoherence> >;
00106 template class InterconnectSlave<Cache<CacheTags<SplitLIFO,NullCompression>, MissQueue, UniCoherence> >;
00107 #if defined(USE_LZSS_COMPRESSION)
00108 template class InterconnectSlave<Cache<CacheTags<SplitLIFO,LZSSCompression>, BlockingBuffer, SimpleCoherence> >;
00109 template class InterconnectSlave<Cache<CacheTags<SplitLIFO,LZSSCompression>, BlockingBuffer, UniCoherence> >;
00110 template class InterconnectSlave<Cache<CacheTags<SplitLIFO,LZSSCompression>, MissQueue, SimpleCoherence> >;
00111 template class InterconnectSlave<Cache<CacheTags<SplitLIFO,LZSSCompression>, MissQueue, UniCoherence> >;
00112 #endif
00113 #endif
00114 
00115 
00116 #endif // DOXYGEN_SHOULD_SKIP_THIS

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