Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
inst5|LPM_COUNTER_component|auto_generated |
1 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst5 |
1 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|TEST2 |
35 |
0 |
0 |
0 |
33 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|data_filt |
9 |
0 |
0 |
0 |
3 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|STR_SYNC |
11 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|watch |
16 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|sample |
13 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|tim_1us |
11 |
0 |
0 |
0 |
23 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|E_RG3 |
48 |
0 |
0 |
0 |
34 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|E_RG2 |
63 |
0 |
0 |
0 |
58 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|E_RG1AL |
11 |
0 |
0 |
0 |
3 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|E_RG1H |
9 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|E_RG1 |
56 |
0 |
0 |
0 |
49 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|sp_w |
33 |
0 |
0 |
0 |
60 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|ps_w |
51 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|sende |
36 |
0 |
0 |
0 |
33 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|pres |
38 |
0 |
0 |
0 |
30 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|eclk|Frequ |
19 |
0 |
0 |
0 |
30 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|eclk |
104 |
0 |
0 |
0 |
116 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|ctrl|STA |
157 |
0 |
0 |
0 |
37 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|ctrl|KDO3 |
15 |
0 |
0 |
0 |
9 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|ctrl|KDO2 |
40 |
0 |
0 |
0 |
40 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|ctrl|KDO1 |
42 |
0 |
0 |
0 |
41 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|ctrl|IMR |
40 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|ctrl |
228 |
0 |
0 |
0 |
188 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_DUI |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_TST_D_RC |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_DE |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_DV |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_IR7_2 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_IR7 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_IR6_2 |
2 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_IR6 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_NSTR_2 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_NSTR |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_DRC_2 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL|U_DRC |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG|KERNEL |
128 |
0 |
0 |
0 |
375 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|U_INTREG |
128 |
0 |
0 |
0 |
375 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB|port_1_2_io1 |
406 |
0 |
0 |
0 |
142 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|U_INTAPB |
54 |
0 |
0 |
0 |
55 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|port_1_2_port_uc_io_port |
71 |
0 |
0 |
0 |
58 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1|port_1_2_SPI1_SPI_1 |
24 |
0 |
0 |
0 |
26 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst1 |
10 |
9 |
0 |
9 |
10 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
inst2|altpll_component|auto_generated |
2 |
0 |
0 |
0 |
5 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst2 |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|TEST2 |
35 |
0 |
0 |
0 |
33 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|data_filt |
9 |
0 |
0 |
0 |
3 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|STR_SYNC |
11 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|watch |
16 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|sample |
13 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|tim_1us |
11 |
0 |
0 |
0 |
23 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|E_RG3 |
48 |
0 |
0 |
0 |
34 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|E_RG2 |
63 |
0 |
0 |
0 |
58 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|E_RG1AL |
11 |
0 |
0 |
0 |
3 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|E_RG1H |
9 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|E_RG1 |
56 |
0 |
0 |
0 |
49 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|sp_w |
33 |
0 |
0 |
0 |
60 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|ps_w |
51 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|sende |
36 |
0 |
0 |
0 |
33 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|pres |
38 |
0 |
0 |
0 |
30 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|eclk|Frequ |
19 |
0 |
0 |
0 |
30 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|eclk |
104 |
0 |
0 |
0 |
116 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|ctrl|STA |
157 |
0 |
0 |
0 |
37 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|ctrl|KDO3 |
15 |
0 |
0 |
0 |
9 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|ctrl|KDO2 |
40 |
0 |
0 |
0 |
40 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|ctrl|KDO1 |
42 |
0 |
0 |
0 |
41 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|ctrl|IMR |
40 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|ctrl |
228 |
0 |
0 |
0 |
188 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_DUI |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_TST_D_RC |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_DE |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_DV |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_IR7_2 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_IR7 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_IR6_2 |
2 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_IR6 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_NSTR_2 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_NSTR |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_DRC_2 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL|U_DRC |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG|KERNEL |
128 |
0 |
0 |
0 |
375 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|U_INTREG |
128 |
0 |
0 |
0 |
375 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB|port_1_2_io1 |
406 |
0 |
0 |
0 |
142 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|U_INTAPB |
54 |
0 |
0 |
0 |
55 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|port_1_2_port_uc_io_port |
71 |
0 |
0 |
0 |
58 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst|port_1_2_SPI1_SPI_1 |
24 |
0 |
0 |
0 |
26 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
inst |
10 |
9 |
0 |
9 |
10 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |